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How to extend the iMac Pro to X99 [Successful Build/Extended Guide]

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@kgp When do you plan to update the guide for 10.13.5 ? :)

Thank you

No plans so far... still thinking on how to implement iMac Pro X99...

The current X99 macPro guide is obsolete at least for Broadwell-E/EP and Haswell-E/EP. But what about Broadwell and Haswell users? Would these users also like to change to iMac Pro, or do they rather prefer to stay with the MacPro X99 guide in it's present state?

Anyway, updating the current macPro X99 guide to a new iMacPro X99 guide would result in a guide very, very similar to my iMacPro X299 guide, with some minor deviations in the EFI-folder. I don't know if it is really worth the effort. The actual simple reference to post 1700 in fact is totally sufficient.

Thus, maybe a new iMacPro X99 guide in the originating post of this thread should mainly depict all major deviations from my X299 guide?

I would like to hear opinions, ladies and gentleman!

In any case, here we are not just talking about a simple update. To depict all implications of post 1700, one basically needs to write up a completely new guide (and to repeat most of what is anyway stated and explained in my X299 guide), and I don't know if I currently have the time or energy to do so.

All my attention presently rather focuses on what will happen in 28 hours from now ;)...

Cheers,

KGP
 
Last edited:
You saved me thousands of dollars right now (purchasing x299 system)

Today I'm updating the new guide and I'll let you know!

you're the king!




:headbang:;):lol:Who wants to kiss me for this?:lol:;):headbang:

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Code:
AppleIntelInfo.kext v2.9 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0xc43970e860 (28 MHz)
MWAIT C-States...........................: 8480

Processor Brandstring....................: Intel(R) Core(TM) i7-6950X CPU @ 3.00GHz

Processor Signature..................... : 0x406F1
------------------------------------------
- Family............................... : 6
- Stepping............................. : 1
- Model................................ : 0x4F (79)

Model Specific Registers (MSRs)
------------------------------------------

MSR_IA32_PLATFORM_ID.............(0x17)  : 0x8000000000000
------------------------------------------
- Processor Flags...................... : 2

MSR_CORE_THREAD_COUNT............(0x35)  : 0xA0014
------------------------------------------
- Core Count........................... : 10
- Thread Count......................... : 20

MSR_PLATFORM_INFO................(0xCE)  : 0x20080C3BF3811E00
------------------------------------------
- Maximum Non-Turbo Ratio.............. : 0x1E (3000 MHz)
- Ratio Limit for Turbo Mode........... : 1 (programmable)
- TDP Limit for Turbo Mode............. : 1 (programmable)
- Low Power Mode Support............... : 1 (LPM supported)
- Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
- Maximum Efficiency Ratio............. : 12
- Minimum Operating Ratio.............. : 8

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x1E000005
------------------------------------------
- I/O MWAIT Redirection Enable......... : 0 (not enabled)
- CFG Lock............................. : 0 (MSR not locked)
- C3 State Auto Demotion............... : 1 (enabled)
- C1 State Auto Demotion............... : 1 (enabled)
- C3 State Undemotion.................. : 1 (enabled)
- C1 State Undemotion.................. : 1 (enabled)
- Package C-State Auto Demotion........ : 0 (disabled/unsupported)
- Package C-State Undemotion........... : 0 (disabled/unsupported)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x10414
------------------------------------------
- LVL_2 Base Address................... : 0x414
- C-state Range........................ : 1 (C-States not included, I/O MWAIT redirection not enabled)

IA32_MPERF.......................(0xE7)  : 0x982A5FC00
IA32_APERF.......................(0xE8)  : 0xC38DDBABB
MSR_0x150........................(0x150) : 0x0

MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------

MSR_IA32_PERF_STATUS.............(0x198) : 0x194F00000C00
------------------------------------------
- Current Performance State Value...... : 0xC00 (1200 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0xFF00
------------------------------------------
- Target performance State Value....... : 0xFF00 (25500 MHz)
- Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0

IA32_THERM_INTERRUPT.............(0x19B) : 0x0

IA32_THERM_STATUS................(0x19C) : 0x88420000
------------------------------------------
- Thermal Status....................... : 0
- Thermal Log.......................... : 0
- PROCHOT # or FORCEPR# event.......... : 0
- PROCHOT # or FORCEPR# log............ : 0
- Critical Temperature Status.......... : 0
- Critical Temperature log............. : 0
- Thermal Threshold #1 Status.......... : 0
- Thermal Threshold #1 log............. : 0
- Thermal Threshold #2 Status.......... : 0
- Thermal Threshold #2 log............. : 0
- Power Limitation Status.............. : 0
- Power Limitation log................. : 0
- Current Limit Status................. : 0
- Current Limit log.................... : 0
- Cross Domain Limit Status............ : 0
- Cross Domain Limit log............... : 0
- Digital Readout...................... : 66
- Resolution in Degrees Celsius........ : 1
- Reading Valid........................ : 1 (valid)

MSR_THERM2_CTL...................(0x19D) : 0x0

IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
- Fast-Strings......................... : 1 (enabled)
- FOPCODE compatibility mode Enable.... : 0
- Automatic Thermal Control Circuit.... : 1 (enabled)
- Split-lock Disable................... : 0
- Performance Monitoring............... : 1 (available)
- Bus Lock On Cache Line Splits Disable : 0
- Hardware prefetch Disable............ : 0
- Processor Event Based Sampling....... : 0 (PEBS supported)
- GV1/2 legacy Enable.................. : 0
- Enhanced Intel SpeedStep Technology.. : 1 (enabled)
- MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
- Adjacent sector prefetch Disable..... : 0
- CFG Lock............................. : 0 (MSR not locked)
- xTPR Message Disable................. : 1 (disabled)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x640A00
------------------------------------------
- Turbo Attenuation Units.............. : 0
- Temperature Target................... : 100
- TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x402000
------------------------------------------
- EIST Hardware Coordination........... : 0 (hardware coordination enabled)
- Energy/Performance Bias support...... : 1
- Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
- Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)
- SpeedShift Technology Enable......... : 0 (disabled)
- SpeedShift Interrupt Coordination.... : 0 (disabled)
- SpeedShift Energy Efficient Perf..... : 0 (disabled)
- SpeedShift Technology Setup for HWP.. : No (not setup for HWP)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2B2B2B2B2B2B2B2B
------------------------------------------
- Maximum Ratio Limit for C01.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C02.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C03.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C04.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C05.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C06.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C07.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C08.......... : 2B (4300 MHz)

MSR_TURBO_RATIO_LIMIT1...........(0x1AE) : 0x2222222222222B2B
------------------------------------------
- Maximum Ratio Limit for C09.......... : 2B (4300 MHz)
- Maximum Ratio Limit for C10.......... : 2B (4300 MHz)

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x5
------------------------------------------
- Power Policy Preference...............: 5 (balanced performance and energy saving)

MSR_POWER_CTL....................(0x1FC) : 0x2904005B
------------------------------------------
- Bi-Directional Processor Hot..........: 1 (enabled)
- C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
- Power Units.......................... : 3 (1/8 Watt)
- Energy Status Units.................. : 14 (61 micro-Joules)
- Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFF80015FFF8
------------------------------------------
- Package Power Limit #1............... : 4095 Watt
- Enable Power Limit #1................ : 1 (enabled)
- Package Clamping Limitation #1....... : 1 (allow going below OS-requested P/T state during Time Window for Power Limit #1)
- Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
- Package Power Limit #2............... : 4095 Watt
- Enable Power Limit #2................ : 1 (enabled)
- Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
- Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
- Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0x6150A37
------------------------------------------
- Total Energy Consumed................ : 6228 Joules (Watt = Joules / seconds)

MSR_PKGC3_IRTL...................(0x60a) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKGC7_IRTL...................(0x60c) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x8A2A86A06
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x16DE2AE
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x8A2A86A06
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x16DE2AE
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x18AE80A5F4
MSR_PKG_C7_RESIDENCY.............(0x3fa) : 0x0

IA32_TSC_DEADLINE................(0x6E0) : 0xC43E467AA7

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 30 (3000 MHz)
Maximum Turbo Ratio/Frequency............: 43 (4300 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ 32 (43) ]
CPU C3-Cores [ 0 2 4 8 10 12 14 16 19 ]
CPU C6-Cores [ 1 3 5 7 9 11 13 15 17 19 ]
CPU P-States [ 32 39 (43) ]
CPU C3-Cores [ 0 2 4 5 8 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 5 6 7 9 11 12 13 15 17 19 ]
CPU C6-Cores [ 0 1 3 5 6 7 9 11 12 13 15 16 17 19 ]
CPU P-States [ (12) 32 39 43 ]
CPU C3-Cores [ 0 1 2 4 5 8 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 5 6 7 9 11 12 13 14 15 16 17 19 ]
CPU C3-Cores [ 0 1 2 4 5 8 9 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 5 6 7 8 9 11 12 13 14 15 16 17 19 ]
CPU C3-Cores [ 0 1 2 4 5 8 9 10 12 13 14 16 18 19 ]
CPU P-States [ 12 32 37 39 (43) ]
CPU P-States [ (12) 32 37 39 41 43 ]
CPU C6-Cores [ 0 1 2 3 5 6 7 8 9 11 12 13 14 15 16 17 19 ]
CPU P-States [ 12 32 37 39 40 41 (43) ]
CPU C3-Cores [ 0 1 2 3 4 5 8 9 10 12 13 14 16 18 19 ]
CPU P-States [ (12) 32 37 38 39 40 41 43 ]
CPU P-States [ 12 32 36 37 38 39 40 41 (43) ]
CPU P-States [ 12 32 36 37 38 39 40 41 42 (43) ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 11 12 13 14 15 16 17 19 ]
CPU P-States [ 12 32 35 36 37 38 39 40 41 42 (43) ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 19 ]
CPU C3-Cores [ 0 1 2 3 4 5 8 9 10 11 12 13 14 16 18 19 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU C3-Cores [ 0 1 2 3 4 5 8 9 10 11 12 13 14 16 17 18 19 ]
CPU P-States [ 12 29 32 35 36 37 38 39 40 41 42 (43) ]
CPU C3-Cores [ 0 1 2 3 4 5 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ 12 29 32 34 35 36 37 38 39 40 41 42 (43) ]
CPU P-States [ (12) 29 32 33 34 35 36 37 38 39 40 41 42 43 ]
CPU P-States [ 12 29 30 32 33 34 35 36 37 38 39 40 41 42 (43) ]
CPU C3-Cores [ 0 1 2 3 4 5 6 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ (12) 28 29 30 32 33 34 35 36 37 38 39 40 41 42 43 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ 12 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 (43) ]

  • Broadwell-E OC problem solved
  • No PMDrvr.kext
  • Full Sleep/Wake Functionality
View attachment 333330
 
  • Like
Reactions: kgp
You saved me thousands of dollars right now (purchasing x299 system)

Today I'm updating the new guide and I'll let you know!

you're the king!

:lol:
 
No plans so far... still thinking on how to implement iMac Pro X99...

The current X99 macPro guide is obsolete at least for Broadwell-E/EP and Haswell-E/EP. But what about Broadwell and Haswell users? Would these users also like to change to iMac Pro, or do they rather prefer to stay with the MacPro X99 guide in it's present state?

Anyway, updating the current macPro X99 guide to a new iMacPro X99 guide would result in a guide very, very similar to my iMacPro X299 guide, with some minor deviations in the EFI-folder. I don't know if it is really worth the effort. The actual simple reference to post 1700 in fact is totally sufficient.

Thus, maybe a new iMacPro X99 guide in the originating post of this thread should mainly depict all major deviations from my X299 guide?

I would like to hear opinions, ladies and gentleman!

In any case, here we are not just talking about a simple update. To depict all implications of post 1700, one basically needs to write up a completely new guide (and to repeat most of what is anyway stated and explained in my X299 guide), and I don't know if I currently have the time or energy to do so.

All my attention presently rather focuses on what will happen in 28 hours from now ;)...

Cheers,

KGP


I think a new guide might be better all around. Might be easier on you as well....
 
I think a new guide might be better all around. Might be easier on you as well....

Too late... Already messing up the former guide ;):lol:.. Huge work likely for nothing.. macOS High Sierra is more dead than alive .. and within a few weeks it will be dead completely ;):lol:

New guide and thread for iMac Pro X99 and 10.14 Mojave ... :thumbup:
 
Too late... Already messing up the former guide ;):lol:.. Huge work likely for nothing.. macOS High Sierra is more dead than alive .. and within a few weeks it will be dead completely ;):lol:

New guide and thread for iMac Pro X99 and 10.14 Mojave ... :thumbup:

Great!!! Can't wait!!

In the meantime, @kgp would you please take a look at mi BIOS setting and check if anything is wrong in order to improve my CPU Power Management?
 

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Great!!! Can't wait!!

In the meantime, @kgp would you please take a look at mi BIOS setting and check if anything is wrong in order to improve my CPU Power Management?

Guess you can imagine that I am currently quite busy with the guide update, right? What else do you expect me to do at the same time?

Anybody else able to help in the meanwhile?
 
Guess you can imagine that I am currently quite busy with the guide update, right? What else do you expect me to do at the same time?

Anybody else able to help in the meanwhile?

Wow! When you said "already messing up with the former guide" I didn't think It was RIGHT NOW. That's even better, I can definitely wait. No problem, no hurry. Sorry!
 
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Can some moderator please change the title of this thread to:

How to extend the iMac Pro to X99 [Successful Build / Extended Guide]

Guide Update nearly completed..

Thanks in advance,

KGP
 
Can some moderator please change the title of this thread to:

How to extend the iMac Pro to X99 [Successful Build / Extended Guide]

Guide Update nearly completed..

Thanks in advance,

KGP
It is your thread - You may do it yourself.
 
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