How to extend the iMac Pro to X99 [Successful Build/Extended Guide]

Discussion in 'High Sierra Desktop Guides' started by kgp, Jul 12, 2017.

  1. kgp

    kgp

    Joined:
    May 30, 2014
    Messages:
    4,478
    Motherboard:
    Asus Prime X299 Deluxe, Asus X99-A II
    CPU:
    Intel i9-7980XE, Intel I7-6950X
    Graphics:
    AORUS GTX 1080 TI-X WB, AORUS GTX 1080 TI-X
    Mac:
    iMac, MacBook Pro, Mac mini
    Mobile Phone:
    iOS
    Jul 12, 2017 at 3:52 PM #1
    kgp

    kgp

    Joined:
    May 30, 2014
    Messages:
    4,478
    Motherboard:
    Asus Prime X299 Deluxe, Asus X99-A II
    CPU:
    Intel i9-7980XE, Intel I7-6950X
    Graphics:
    AORUS GTX 1080 TI-X WB, AORUS GTX 1080 TI-X
    Mac:
    iMac, MacBook Pro, Mac mini
    Mobile Phone:
    iOS
    iMacPro-X99.png

    Up and successfully running iMac Pro Broadwell-E/X99 with macOS High Sierra 10.13.5 (17F77)!

    X99-10.13.5-Vega.png


    Abstract and Introduction:

    For nearly one entire year, this Broadwell-E/EP, Hasell-E/EP, X99, macOS High Sierra 10.13 Desktop Guide was the logical continuation of my Broadwell-E/EP, Hasell-E/EP, X99 macOS Sierra 10.12 Desktop Guide "The Perfect Customac-Pro: X99-A II, i7-6950X, 128GB G.Skill TridentZ, Aorus GTX TI Xtreme", based on SMBIOS MacPro6,1.

    However, very recently, I achieved the successful implementation of SMBIOS iMacPro1,1 and iMacPro macOS build 10.13.5 (17F77), which apparently also resolves Broadwell-E/EP, Haswell-E/EP OC and performance flaw issues, observed in connection with macOS builds >/= 10.13.4. Thus, the recent guide update was "millennium" and resulted in a totally new iMac Pro X99 macOS 10.13.5 (17F77) build and Desktop guide very close and very similar to my successful iMac Pro X299 macOS High Sierra 10.13 build and Desktop guide https://www.tonymacx86.com/threads/...c-pro-successful-build-extended-guide.229353/.

    The new iMac Pro X99 macOS High Sierra Desktop guide should provide full compatibly with all Broadwell-E/EP, Haswell-E/EP CPUs and most X99 mobos (ASUS, GYGABYTE, ASRock, MSI etc.).

    Nevertheless, in Section A.) - Hardware Summary, I describe my actual build, which constitutes the baseline for this iMac Pro X99 macOS High Sierra Desktop Guide.

    However, before starting with all tiny details, please find below a Table of Content that provides an overview of the individual topics addressed within this guide:

    --------------------------------------------------------------------------------------------------------------

    Table of Contents:

    A.) Hardware Summary

    B.) ASUS Mainboard BIOS
    B.1) ASUS BIOS Firmware Patching
    B.2) ASUS X99-A II BIOS Configuration

    C.) Important General Note/ Advice and Error Prevention

    D.) iMac Pro macOS 10.13 High Sierra System Setup
    This chapter includes a general guideline how to perform the initial setup of your iMac Pro with macOS High Sierra 10.13.5 (17F77). Note that the macOS High Sierra 10.13.5 (17F77) full package installer apparently can be only successfully downloaded on non-iMacPro systems. For iMacPro systems, there we provide a sophisticated workaround that bases on pristine sources from Apple.
    D.1) iMac Pro EFI-Folder Preparation
    D.2) iMac Pro macOS High Sierra 10.13.5 (17F77) Installer Package Creation
    D.3) iMac Pro macOS High Sierra 10.13.5 (17F77) USB Flash Drive Installer Creation
    D.4) iMac Pro macOS High Sierra 10.13.5 (17F77) Clean Install on Broadwell-E/EP/Haswell-E/EP X99
    D.5) Direct iMac Pro conversions of a functional X99 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation
    D.6) iMac Pro macOS High Sierra Build Update Procedure

    E.) Post Installation Process
    E.1) Xnu CPU Power Management (XCPM) Configuration
    E.2) Graphics Configuration
    E.3) Audio Configuration
    E.4) USB Configuration
    E.5) M.2/NVMe Configuration
    E.6) SSD/NVMe TRIM Support
    E.7) Thunderbolt EX3 PCIe Add-On Implementation
    E.8) Gbit and 10-Gbit Ethernet Implementations
    E.8.1) ASUS X99-A II on-board Gbit Ethernet Functionality
    E.8.2) 10-Gbit LAN Implementations
    E.8.2.1) ASUS XG-C100C Aquantia AQC107 10-Gbit NIC
    E.8.2.2) Intel X540-T1 10-Gbit NIC
    E.8.2.3) Small-Tree P2EI0G-2T 10-Gbit NIC
    E.8.2.4) NetGear ProSave XS508M 8-port 10-Gbit Switch
    E.8.2.5) QNAP TS-431X2 Quad-core 4-Bay NAS tower
    E.8.2.6) 10-GBit Ethernet Optimisation
    E.9) ASUS X99-A II PCI Device Implementation
    E.9.1) ACPI DSDT Replacement Implementation
    E.9.2) SSDT-ASUS-X99-A-II.aml PCI Device Implementation
    E.9.2.1) HDEF - onboard Audio Controller PCI Implementation:
    E.9.2.2) GFX1, HDAU - GPU and HDMI/DP Audio PCI implementation
    E.9.2.3) XGBE - 10GBit NIC Implementation:
    E.9.2.4) ETH0 - onboard LAN Controller PCI Implementation
    E.9.2.5) SAT1 - Intel AHCI SATA Controller PCI Implementation
    E.9.2.6) EVSS - Intel X99 sSata Controller PCI Implementation
    E.9.2.7) NVMe Controller PCI Implementation
    E.9.2.8) - USBX:
    E.9.2.9) XHCI - onboard Extended Host Controller Interface (XHCI) PCI Implementation
    E.9.2.10) ASMedia ASM1142 USB 3.1 Controller PCI Implementation
    E.9.2.11) ARPT - OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI Implementation:
    E.9.2.12) DTGP Method
    E.9.2.13) - Debugging Sleep Issues
    E.9.3) SSDT-X99-TB3-iMacPro.aml PCI Device Implementation
    E.10) System Overview CPU Cosmetics
    E.11) iMac Pro Boot Splash Screen Cosmetics
    E.12) iMac Pro Desktop Background cosmetics
    E.13) Native Display Brightness Control / Native NightShift Functionality for Monitors with DCC/IC Support
    E.14) iStatMenus Hardware Monitoring

    F.) Benchmarking

    F.1) i7-6950X CPU Benchmarks
    F.2) Gigabyte Radeon RX Vega 64 Gaming OC 8GB OpenGL and Metal Benchmarks
    F.3) Gigabyte AORUS GTX 1080 Ti 11GB Xterme Edition OpenGL and Metal Benchmarks
    F.4) Blackmagic Disk Speed Benchmarks

    G.) Summary and Conclusion

    --------------------------------------------------------------------------------------------------------------

    Now enjoy and have have fun with the detailed guidelines below.

    A.) Hardware Summary

    Motherboard:
    Asus X99-A II
    CPU: I7-6950X(10-core)
    RAM: 128GB KIT (8x16GB) G.Skill TridentZ (F4-3200C14Q2-128GTZSW)
    System Disk: Samsung 850 EVO 1TB (SSD) / Samsung 960 EVO 1TB (NVMe, M.2)
    RAID: 3x Western Digital Red Pro 6TB (18TB);
    Graphics: Gigabyte Radeon Rx Vega 64 Gaming OC 8GB
    Wifi + Bluetooth: OSXWIFI PC/Hackintosh - Apple Broadcom Bcm94360cd - 802.11 A/B/G/N/AC + Bluetooth 4.0 PCIe
    Power Supply: Corsair AX860
    CPU Cooler: Corsair H80i v2
    Webcam: Logitech HD Pro Webcam C930
    Monitor: LG 38UC99-W, 38", WQHD, 21:9, 3840x1600 pixel, 75 Hz.
    Case: Corsair CC600TWM-WHT, Graphite Series 600T, Mid Tower
    Keyboard: Logitech K811
    Mouse: Logitech Ultra-Thin Touch Mouse T631
    Blu-Ray/DVD Writer: LG Super Multi Blue BH16 (BH16NS55)

    Thunderbolt: ASUS TBEX 3 and Gigabyte Alpine Ridge

    10Gbit Ethernet components:
    - 1x ASUS XG-C100C AQC107 PCIe x4 10GBit LAN Adapter (for testing purposes)
    - 1x Intel X540-T1 single port 10GBit LAN PCIe Adapter (for testing purposes, now installed in my X99 rig)
    - 1x Small-Tree P2EI0G-2T 2-Port 10GBit LAN PCIe Adapter (now default configuration)
    - 1x NetGear ProSave XS508M 8-port 10GBit switch
    - 1x QNAP TS-431X2 Quad-core 4-Bay NAS tower with Built-in 10GbE SFP+ Port and 4x 12 TB Seagate IronWolf in RAID 0 configuration.

    Let me express my gratitude to @gxsolace at this place for providing me with 1x Intel X540-T1, 1x Small-tree P2EI0G-2T and 4x 12 TB Seagate IronWolf hardware.

    screen.png


    B.) ASUS Mainboard BIOS

    Please find below a detailed instruction for ASUS X99 mainboard BIOS Firmware patching, as well as a summary of my actual Asus X99-A II BIOS settings.

    B1.) ASUS Mainboard BIOS Firmware Patching

    On a real Mac with native OSX XCPM power management, the MSR 0xE2 register is unlocked and therefore writeable. However, on ASUS mobos this register is usually read only. This is also the case for all ASUS X99 mobos. When the kernel tries to write to this locked register, it causes a kernel panic. This panic can happen very early in the boot process, with the result that your system freezes or reboots during the boot process. We can circumvent the MSR 0xE2 register write with a dedicated KernelToPatch entry in the config.plist, namely "xcpm_core_scope_msrs © Pike R. Alpha" and by enabling the "KernelPM" in the config.plist in Section "Kernel and Kext Patches" of the Clover Configurator. See Section E.1) for further details.

    However, thanks to CodeRush's Longsoft UEFIPatch distribution and sophisticated MSR 0xE2 Register patches, we are able to successfully patch any ASUS X99 mainboard BIOS distribution and unlock the MSR 0xE2 register. This makes the "xcpm_core_scope_msrs © Pike R. Alpha" KernelToPatch entry obsolete and allows full native read/write MSR 0xE2 register access by the OSX kernel. The patched ASUS mainboard BIOS firmware finally can be uploaded each specific ASUS X99 mainboard by means of the ASUS EZ BIOS Flashback Procedure.

    The individual steps for the ASUS X99 BIOS Patching are detailed below:

    1.) Download and unzip the CodeRush's UEFI patch (attached towards the bottom of this guide) to your Desktop.

    2.) To patch the latest BIOS for your ASUS mobo, download the most actual BIOS version from the ASUS mobo support page (e.g., follow the subsequent link to obtain the latest BIOS Version for the Asus X99-A II).

    3.) Unzip the bios file and copy the CAP file into the UEFIPatch directory on your Desktop.

    4.) Open a terminal; type "cd " and drag the "UEFIPatch"-folder on your Desktop into the Terminal window and press "Enter". One can also use the terminal command equivalent:

    Code (Text):
    cd ~/Desktop/UEFIPatch_0.3.9_osx/
    Note that this step is important to successfully execute the UEFI-Patch procedure! You must be in the UEFIPatch directory on your terminal, in order to successfully execute step 5.) below!

    Once in the UEFIPatch directory on your terminal, drop the "UEFIPatch"-executable into the terminal window; Also drop the most actual BIOS CAP file into the terminal window; Press enter to execute the "UEFIPatch"-procedure. The equivalent terminal command is:

    Code (Text):
    ./UEFIPatch X99-A-II-ASUS-1902.CAP
    by assuming that you want to patch the latest X99-A-II-ASUS-1902.CAP BIOS-files for the ASUS X99-A II. For other mobos, please adapt the adequate BIOS CAP-filename in the command!

    During the patch procedure, you will see something like the following message, which can be simply ignored:

    Code (Text):
    parseImageFile: Aptio capsule signature may become invalid after image modifications
    parseSection: section with unknown type 52h
    parseFile: non-empty pad-file contents will be destroyed after volume modifications
    parseSection: section with unknown type 52h
    parseFile: non-empty pad-file contents will be destroyed after volume modifications
    patch: replaced 6 bytes at offset F69h 0FBA6C24400F -> 0FBA7424400F
    Image patched
    6.) You will now find a ***.CAP.patched BIOS-file in the UEFIPatch folder, which is your patched (MSR 0xE2 unlocked) BIOS file.

    7.) Rename the ***.CAP.patched BIOS file to X99A2.CAP, the required filename for the ASUS X99-A II BIOS Flashback procedure. Note that the required filename varies for each ASUS mobo. For details see the ASUS BIOS Flashback filename convention.

    8.) Copy the X99A2.CAP (or it's derivative in case you use a different ASUS mobo) to a FAT-formatted USB2.0 storage device.

    9.) Shut-down your hack, connect the USB2.0 storage device to the USB-port assigned to the ASUS BIOS Flashback procedure (see the mobo manual for details). Press the BIOS-Flashback button for three seconds until the flashback-led starts to blink, indicating that the BIOS Flashback is in progress. Release the button. The locations of the BIOS-Flashback button and the USB-port assigned to the BIOS-Flashback procedure on the ASUS X99-A II are indicated in the figure below:

    Flashback.png

    10.) Wait until the Flashback-led stops blinking and turns off, indicating that the BIOS Flashback process as been successfully completed. You now successfully installed the most actual patched BIOS, compatible with native OSX/MacOS power management.

    11.) Boot your system and apply the BIOS settings described below.

    For all ASUS X99A-II users, the most actual patched BIOS firmware 1902 with an iMac Pro Splash Screen Boot Image is attached towards the end of this guide (X99A2.CAP).


    B.2) ASUS X99-A II BIOS Configuration

    bios.jpg

    To overclock your RAM memory in concordance with your RAM specifications, enable the EZ XMP Switch on your ASUS Mainboard and enable posteriorly XMP in the Standard ASUS BIOS Setup mode (F7). Subsequently switch from standard to advanced ASUS BIOS Setup mode by pressing again F7.

    BIOS-Settings.png

    Press F7 and subsequently F10 key to change to "Standard Mode", Save and Reboot

    Important Note:

    "ASUS MultiCore Enhancement": When set to "Auto", MCE allows you to maximise the overclocking performance optimised by the ASUS core ratio settings. When disabled, MCE allows to set to default core ratio settings.

    "Sync All Cores": Tremendous increase in CPU performance can be achieved with the CPU Core Ratio set to "Sync All Cores". In case of i9-7980XE stock settings (4.4 Ghz, Sync All Cores), the Geekbench score difference is approx. 51.000 (disabled) compared to 58.000 (enabled)! Note however, that Sync All Cores should be used only in case of the availability of an excellent water cooling system! Otherwise, CPU Core Ratio should be set to "Auto". Further note that with CPU Core Ratio set to "Sync All Cores", one might have to set the AVX Instruction Core Ratio Negative Offset to "3" in case of system freezes or system instabilities.

    VT-d Note: For compatibility with VM or parallels, VT-d can be also ENABLED... Verify however, in this case that in your config.plist the boot flag "dart=0" is checked under Arguments in the "Boot" Section of Clover Configurator!

    Above 4G Decoding Note: Enable this function on X99 systems to avoid memory relocation errors, when using AptioMemoryFix.efi.

    CPU SVID Support:
    In addition to the BIOS settings mentioned above one should also Enable CPU SVID support in BIOS Section AI Tweaker, which is fundamental for the proper Intel Power Gadget (IPG) CPU power consumption display.


    C.) Important General Note/Advice and Error Prevention

    Please note the following important General Note / Advice and Error Prevention, when setting up your X99 System by implementing the latest macOS High Sierra 10.13 distribution.

    1.) The /EFI/Clover/drivers64UEFI/-directory of EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip contains by default AptioMemoryFix.efithanks to @vit9696. Note that with Clover_v2.4k_r4392, AptioMemoryFix.efi has become an official Customization Option of Clover and can now be selected and therefore also just easily implemented in the frame of the Clover Boot Loader Installation.

    For native NVRAM implementation, Clover's RC Scripts have to be omitted during the clover boot loader installation. If already previously installed, remove Clover's RC Scripts from the /etc directory of your macOS USB Flash Drive Installer or System Disk:

    Code (Text):
    sudo rm -rf /etc/rc.boot.d
    sudo rm -rf /etc/rc.shutdown.d


    Also the "slide" boot flag needs to be disabled.

    Enable BIOS function "Above 4G decoding" to avoid memory relocation errors on X99.

    2.a.) Most ATI GPUs, e.g. RX Vega 64, RX Vega Frontier, RX 580, RX 560 are now natively implemented. Remaining HDMI/DP port errors, hot plug errors and flaws with multi-monitor or 5K display configurations can be fixed by means of VegaGraphicsFixup.kext, kindly provided by @jyavenard. Important notifications for all Vega users with 4K monitors: When connecting e.g. the Vega Frontier with e.g. the LG 38UC99-W (WUHD, 3840 pix x 1600 pix) via one of the Display Ports (DPs), the screen resolution is fine under both Windows 10 and macOS High Sierra but is totally at odd during boot (VGA like boot screen resolution). @DSM2 reported similar issues with his true 4K display. Thus the VEGA DP 4K boot screen resolution issue is not related with the fact that the LG 38UC99-W is a ultra-wide (3840x1600) and not a true UHD (3840x2160) monitor. It is definitely a Vega firmware problem in combination with 4K displays, as the DP 4K boot screen resolution issue is totally absent with my Nvidia GPU and the problem also does not only affect the ASUS Splash Screen but also spreads over the entire boot process until the login screen is reached (Windows and macOS). Splash Screen, Apple logo or verbose boot messages are not stretched but rather have VGA like resolution. Any fix of the AMD vBIOS would be highly appreciated. It is more than disappointing to witness such issues with 1000$ GPUs... Fortunately, the 4K boot screen issue is restricted to the Vega DP ports and likely due to the fact that the LG 38UC99-W only supports DP 1.2. Solution: Connect your Vega and your 4K display via the HDMI port and everything will work as expected.

    b.) Nvidia Kepler Graphics Cards were already natively implemented in the earlier beta distributions of macOS 10.13.

    c.) All Users with Maxwell and Pascal Nvidia Graphics Cards Users and SMBIOS MacPro1,1 can employ officially distributed Nvidia 10.13 Web Drivers for their Nvidia Pascal and Maxwell graphics cards! Upon my request from 7 January 2018, Nvidia officially released first WebDriver-387.10.10.10.25.105 for 10.13.2 (17C2120) and first WebDriver-387.10.10.10.25.106 for 10.13.2 SA (17C2205) - Supplemental Update on 11 January 2018. On 25 January 2018, Nvidia released a Web Driver 387.10.10.10.25.157 for 10.13.3 (17D2047), which worked flawless with Pascal GPUs (lagging issues have been reported for Maxwell GPUs). On 20 February 2018, Nvidia released a Web Diver 387.10.10.10.30.159 for 10.13.3 SA (17D2102). On 31 March 2018 and 18 April 2018, Nvidia also released Web Driver 387.10.10.10.30.103 and 387.10.10.10.30.106 for 10.13.4 (17E199). On 25 April 2018, Web Driver 387.10.10.10.30.107 has been released for 10.13.4 SU (17E202). On 02 June 2018, finally we Driver 387.10.10.10.35.106 followed for 10.13.5. Since Web Driver 387.10.10.10.30.106 former lagging issues have been fully removed. 10.13.6 Public Beta 5 (17G62a) users can use WebDriver-78.10.10.10.35.106 after a simple patching procedure detailed in Section E.1)

    For further details and error prevention see Section E.1).

    3.) Avoid any MacOS assignments in KextToPatch and KernelToPatch entries implemented in the "Kernel and Kext Patches" Section of the Clover Configurator. If subsequently in my Guide you still find MatchOS assignments in respective figures or text, just ignore all likely yet persistent MatchOS assignments. In the config.plist of the EFI-Folder contained in EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip, all MatchOS assignments have been definitely removed.

    4.) If you have the Thunderbolt EX3 or Gigabyte Alpine Ridge PCIe extension card already successfully connected with your mainboard and properly implemented in your system, disconnect any Thunderbolt device during the macOS installation/upgrade procedure. However, if any Thunderbolt PCIe extension card has not been properly configured and implemented yet in your system, remove the card for the macOS Upgrade or Clean Install procedure.

    5.) Note that non ASUS mobo owners might have to check the "KernelPm" entry in the "Kernel and Kext Patches" Section of the Clove Configurator to successfully boot the 10.13 MacOS USB Flash Drive Installer or 10.13 System Disk! However, this entry is currently unchecked in the config.plist of the EFI-Folder contained in EFI-X99-10.13.5-Release-iMacPro1,1-160618.zipip for all ASUS boarders.

    Kernel-PM.png

    6.) The /EFI/Clover/drivers64UEFI/-directory of all former EFI-Folder distributions contained a patched version of the actual apfs.efi. The actual apfs.efi can be obtained by following the respective guideline detailed below:

    Right-click with your mouse on the "Install macOS High Sierra.app" and select "Show Package Contents" -> click with the mouse on "Contents" and subsequently on "Shared Support" -> double-click with the mouse on "BaseSystem.dmg" for mounting.

    Go to "usr" -> "standalone" -> "i386". Drop the apfs.efi to your Desktop.

    To patch the apfs.efi for non-verbose boot, follow THIS LINK. Credits to @PMheart and @ermac.

    Note however, that the entire apsf.efi approach detailed above recently has become totally obsolete.

    Thanks to the ApfsSupportPkgdeveloped by @acidenthera & Co. and thanks to it's recent implementation to Clover (thanks to @Slice, @Philip Petev & Co.) in form of ApsfDriverLoader.efi, there is no further need of the former apsf.efi in the /EFI/Clover/drivers64UEFI/ directory.

    Screenshot 2018-06-16 at 20.13.18.png

    The actual Clover distribution package including the ApsfDriverLoader.efi can by build by means of the Build_Clover.command available on Gitub. Since Version 4.8.8, the latter script also can be used with 10.14 and Xcode 10 + Xcode 10 Command Line Tools thanks to @vector sigma. By adding

    Code (Text):
    export PATH="/usr/local/bin:/usr/bin:/bin:/usr/sbin:/sbin" && buildclover
    View attachment 336331
    to the script,

    Screenshot 2018-06-16 at 19.22.20.png

    the latter also can be used in case of Brew, QT5, UEFITool or MacPorts implementations like Latex, X11, gcc, etc. not yet fully compatible with 10.14 Mojave. Again thanks to @vector sigma for also providing/enabling this trick/possibility.

    7.) To avoid CPU thread TSC desynchronisation errors during boot and wake from S3, likely induced by yet erroneous CPU BIOS microcode implementations, we need to use TSCAdjustReset.kext provided by @interferenc in the /EFI/CLOVER/kexts/Other/ directory of both USB Flash Drive and System Disk in the latter case.

    To access TSCAdjustRest.kext, download primarily its source distribution from Github with the following terminal command:

    Code (Text):
    git clone https://github.com/interferenc/TSCAdjustReset
    Subsequently copy the TSCAdjustRest source distribution to your Desktop using the following terminal command:

    Code (Text):
    mv /TSCAdjustReset ~/Desktop
    Now change in the terminal to the TSCAdjustReset source distribution on your Desktop with the following terminal command:

    Code (Text):
    cd ~/Desktop/TSCAdjustReset/
    Now compile the source distribution with Xcode by using the following terminal command:

    Code (Text):
    xcodebuild
    After successful compilation, you will find the TSCAdjustRest.kext in ~/Desktop/TSCAdjustReset/build/Release/

    Please note that the TSCAdjustRest.kext by default is configured for a 8-core CPU (16 threads).

    To adopt the kext for CPUs with more or less than 8 cores, apply the following approach:

    a.) Right-click with the mouse on the TSCAdjustRest.kext file and select "Show Packet Contents".

    b.) Double-click with the mouse on /contents/ . After a right-click on the "Info.plist" file, select "Open with /Other". Select the TextEdit.app and edit the "Info.plist" file.

    c.) Use the "find"-function of TextEdit.app and search for the term "IOCPUNumber"

    d.) Note that the adequate IOCPUNumber for your particular CPU is the number of its threads -1, by always keeping in mind that the number of it's threads is always 2x the number of it's cores.

    Thus, in case of the 10 core i7-6950X, the IOCPUNumber is 19 (20 threads - 1).

    Code (Text):
    <key>IOCPUNumber</key>
    <integer>19</integer>
    and following the same methodology, the correct IOCPUNumber for the 6-core i7-6800K is 11 (12 threads -1)

    Code (Text):
    <key>IOCPUNumber</key>
    <integer>11</integer>
    e.) After adopting the IOCPUNumber for your particular Broadwell-E/EP, Haswell-E/EP processor, save the info.plist file and copy the modified TSCAdjustRest.kext to the /EFI/CLOVER/kexts/Other/ - directories of both USB Flash Drive Installer and System Disk!

    8.) Already during the first Beta Versions of macOS 10.13 High Sierra, Apple forced the beta users to use the new Apple file system APFS in case of a Clean Install/update of MacOS High Sierra 10.13. Also within macOS High Sierra 10.13.5 (17F77) this is the case. Most APSF incompatibilities with available system related software apparently have been already removed. All recent versions of Carbon Copy Cloner (CCC) support the direct cloning of APFS system disks and provide the previously missing option for APFS system backups. Until Boot-Loader Distribution Clover_v2.4k_r4210, it was also impossible to install the Clover Boot-Loader in the EFI-Partition of an APFS System Disk by means of the Clover Boot-Loader Installer Package (the Clover Boot-Loader files had to be added manually). However, all recent Clover Boot-Loader Distributions work absolutely flawless with APFS System Disks.

    In any case, with @Brumbear's UnSolid.kext in the /EFI/Clover/kexts/Other/ directory, OSX is forced to remain with the HFS+ file format when installing or updating to the most recent macOS 10.13 distribution.

    Note that there is no way to convert an APFS disk back to HFS+ without the loss of all data, but one can easily reformat an APFS formatted disk to HFS+ under OSX by using either Apple's Disk Utility App or "diskutil" commands. All you need to do is to previously unmount the APFS volume before erasing it with a journaled HFS+ file system and a GRUB Partition Table (GTP). If you want to maintain the disk's content, perform a backup before erasing the disk with a HFS+ format.

    The application of Apple's Disk utility is straight forward. The "diskutil" equivalent is detailed below:

    In the Terminal app, type:

    Code (Text):
    diskutil list
    In the output which you can read by scrolling back, you will find all internal disks named /dev/disk0, /dev/disk1, depending upon how many physical disks are present in your system.

    Make a note of the disk identifier for the disk you intend to format (you can eliminate risk by removing all disks but the intended target).

    In the Terminal app, type:

    Code (Text):
    diskutil unmount /dev/diskX
    where diskX is a place holder for the disk to be unmounted.

    Now delete the APFS container of diskX:

    Code (Text):
    diskutil apfs deleteContainer /dev/diskX
    Subsequently, you can erase the entire disk with HFS+ and a GPT by typing the following terminal command:

    Code (Text):
    diskutil partitionDisk /dev/diskX 1 GPT jhfs+ "iMacPro" R
    where /dev/diskX is again a place holder for disk to be erased and iMacPro would be the label for the single partition created. The remaining 1 GPT jhfs+ and R arguments tell diskutil to create a single partition, within a GUID partition table, formatted as Journaled HFS+ and using the entire disk, respectively.

    Alternatively one can also use the following terminal command:

    Code (Text):
    diskutil partitionDisk /dev/diskX GPT JHFS+ iMacPro 0b
    where /dev/diskX is again a place holder for disk to be erased and iMacPro is again the label for the disk partition created. The GPT HFFS+ and 0b arguments again tell diskutil to create a single partition, within a GUID partition table, formatted as Journaled HFS+ and covering the entire disk, respectively.

    In the Terminal app, type now:

    Code (Text):
    diskutil mount /dev/diskX
    where diskX is again a place holder for the disk to be remounted.

    Note, that by means of the "diskutil approach", brand new unformatted or not compatibly formatted system NVMe, SSD and HDD system drives can be also directly formatted within the macOS Clean Install procedure. When presented with the initial install screen where you are presented options to Restore From Backup or Install, select Terminal from the Utilities menu bar item;

    The "diskutil" terminal approach is also able to convert a HFS+ macOS High Sierra 10.13 System Disk to APFS. To do so enter the following terminal command:

    Code (Text):
    diskutil apfs convert /dev/diskX
    where diskX is again a place holder for the HFS+ disk to be converted to APFS. The same procedure again can also be directly performed by means of Apple's Disk Utility.

    If you opt for an APFS System Disk implementation, please note that all other disks on your system also should be formatted with APFS. On systems with APFS disks and non-APFS disks, the boot duration will increase, as apsf.efi will perform a fsck check of non-AFPS disks (like HFS+ or Fat32) during boot. However, dual boot APFS Systems with an NTFS Windows System Disk are not effected by the apsf.efi issue, as OSX does not know how to properly deal with NTFS.

    9.) To clearly get kernel panic images with a call trace in case of kernel panics, I implemented (checked) boot flags "debug=0x100" and "keepsyms=1" in the config.plist of EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip in the "Boot" Section of Clover Configurator under "Arguments".

    10.) Note that in the current EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip distributions, I also removed CsmVideoDxe-64.efi from /EFI/CLOVER/drivers64UEFI, as the latter file is only required for proper Legacy screen resolution purposes with CSM enabled, which is definitely not our case.


    D.) iMac Pro macOS 10.13 High Sierra System Setup

    Below, one finds a detailed description for the Clean Install of macOS High Sierra 10.13.5 (17F77) - special iMacPro build (D.4). This also includes the iMacPro EFI-Folder Preparation (D.1) as well as the macOS High Sierra 10.13.5 (17F77) Installer Package (D.2) and macOS macOS High Sierra 10.13.5 (17F77) USB Flash Drive Installer Creation (D.3). One also finds instructions for a direct iMac Pro conversion of a functional X99 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation (D.5), as well as for the subsequent iMac Pro macOS High Sierra Update Procedure.


    D.1) MacPro EFI-Folder Preparation

    In order to successfully boot a macOS USB Flash Drive Installer or System Disk on a Hackintosh system, both drives must be equipped with an EFI-Folder in their EFI partitions. In this Section we will prepare a fully equipped EFI-Folder with SMBIOS iMacPro1,1 System definition.

    1.) Download and unzip EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip attached at the bottom of this originating post/guide and copy the therein contained EFI-Folder to your Desktop.

    2.) Open the config.plist in /EFI/Clover/ with the latest version of Clover Configurator (>/= v.4.60.0), proceed to the "SMBIOS" Section and complete the SMBIOS iMacPro1,1 Serial Number, Board Serial Number and SMUUID entries. These details are mandatory to successfully run iMessage and FaceTime on your iMac Pro System. Note that all other iMacPro1,1 SMBIOS Details are already implemented in the config.plist of EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip.

    Press several times the "Generate New" Button next to serial number text field.

    Open a terminal, enter repeatedly the command "uuidgen", and copy the output value to the SMUUID field in the "SMBIOS" Section of the Clover Configurator.

    Depending on your system configuration (Broadwell-E/EP or Haswell-E/EP) change or adopt the following settings if necessary

    KernelPatches.png

    "FakeCPUID" in "Kernel and Kext Patches" Section of Clover Configurator:

    Broadwell-E/EP FakeCPUID:
    "0x040674"

    Haswell-E/EP standard FakeCPUID:
    "0x0306F2"

    All Broadwell-E/EP and Haswell-E/EP users have to enable the Broadwell-E performance Kernel patch by @PMheart in their config.plist under "KernelToPatch" in Section "Kernel and Kext Patches" of Clover Configurator, to overcome persistent OC and performance flaw issues.

    Note that the Broadwell-E performance Kernel patch changes from macOS 10.13.5

    Code (Text):

    Find: C1E30848 63D389D0 48C1EA20 B9990100 000F3048 FF05B9AD 6B004883 C4085B5D C3662E0F 1F840000 000000
    Replace: BB00FF00 004863D3 89D048C1 EA20B999 0100000F 3048FF05 B9AD6B00 4883C408 5B5DC390 90909090 909090
    to macOS 10.13.6 PB1

    Code (Text):
    Find: C1 E3 08 48 63 D3 89 D0 48 C1 EA 20 B9 99 01 00 00 0F 30 48 FF 05 B9 BD 6B 00 48 83 C4 08 5B 5D C3 66 2E 0F 1F 84 00 00 00 00 00
    Replace: BB 00 FF 00 00 48 63 D3 89 D0 48 C1 EA 20 B9 99 01 00 00 0F 30 48 FF 05 B9 BD 6B 00 48 83 C4 08 5B 5D C3 90 90 90 90 90 90 90 90
    I also still need to include the xcpm_pkg_scope_msrs Kernel patch of Pike Alpha to successfully boot my system.

    Enable "PluginType" in your config.plist under SSDT/Generate Options/ in Section ACPI of Clover Configurator for a fully working XCPM implementation. Note that by this, Pike Alpha's former ssdt.aml XCPM implementation becomes totally obsolete.

    Plugin-Type.png

    Note that the appropriate Xnu Cpu Power Management (XCPM) settings for each CPU architecture are once more addressed, discussed and finalised in the Xnu Cpu Power Management (XCPM) Section of this guide below.

    Finally save the modified config.plist.

    3.) Copy the appropriate TSCAdjustRest.kext, which you modified in error prevention C.7), to the /EFI/CLOVER/kexts/Other/ directory of the EFI-Folder.

    You know have a fully equipped EFI-Folder for subsequent implementations as detailed below.

    D.2) iMac Pro macOS High Sierra 10.13.5 (17F77) Installer Package Creation

    All users not able to retrieve the macOS High Sierra 10.13.5 (17F77) full package installer (5.22 GB) from the Appstore, can obtain the latter by just following the individual steps below:

    1.) Open a terminal and create a "091-86775" directory on your Desktop. Subsequently change to the newly created directory. All this can be done with the following terminal commands:

    Code (Text):

    mkdir ~/Desktop/091-86775/
    cd ~/Desktop/091-86775/
     
    2.) Download the following files from the Apple server (public links) to your ~/Desktop/091-86775/ directory by a copy & paste of the following terminal commands:

    Code (Text):

    curl https://swdist.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/091-86775.English.dist -o 091-86775.English.dist
    curl https://swdist.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/RecoveryHDMetaDmg.pkm -o RecoveryHDMetaDmg.pkm
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/RecoveryHDMetaDmg.pkg -o RecoveryHDMetaDmg.pkg
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/OSInstall.mpkg -o OSInstall.mpkg
    curl https://swdist.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/InstallAssistantAuto.pkm -o InstallAssistantAuto.pkm
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/InstallAssistantAuto.pkg -o InstallAssistantAuto.pkg
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/BaseSystem.dmg -o BaseSystem.dmg
    curl https://swdist.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/InstallESDDmg.pkm -o InstallESDDmg.pkm
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/InstallESDDmg.pkg -o InstallESDDmg.pkg
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/BaseSystem.chunklist -o BaseSystem.chunklist
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/InstallESDDmg.chunklist -o InstallESDDmg.chunklist
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/InstallInfo.plist -o InstallInfo.plist
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/AppleDiagnostics.chunklist -o AppleDiagnostics.chunklist
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/AppleDiagnostics.dmg -o AppleDiagnostics.dmg
     
    The full list of package files can be found within the following catalog URL, searching for key "1fn3s8c48wk0u34dyujciitmn0nx3ul3dc":

    https://swscan.apple.com/content/ca...ion-snowleopard-leopard.merged-1.sucatalog.gz

    3.) Create the installer.pkg on your Desktop with the following terminal command:

    Code (Text):

    cd ..
    productbuild --distribution ./091-86775/091-86775.English.dist --package-path ./091-86775/ installer.pkg
     

    4.) Create the "Install MacOS High Sierra.app" in the /Applications folder of your System Disk with the following terminal command:

    Code (Text):
    sudo /usr/sbin/installer -pkg installer.pkg -target /
    In case that you receive an error message, ignore the latter and proceed with 5.)

    5.) Now add the following files to your "Install High Sierra.app" with the following terminal commands:

    Code (Text):

    sudo cp ./091-86775/InstallESDDmg.pkg /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/InstallESD.dmg
    sudo cp ./091-86775/AppleDiagnostics.dmg /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
    sudo cp ./091-86775/AppleDiagnostics.chunklist /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
    sudo cp ./091-86775/BaseSystem.dmg /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
    sudo cp ./091-86775/BaseSystem.chunklist /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
     
    Verify your "Install High Sierra.app" for completeness. You should now have a complete macOS High Sierra 10.13.5 (17F77) Installer package in your /Applications Folder.

    The entire iMac Pro macOS Installer Package Creation Approach detailed above has been verified and approved by Motbod and is fully in line with the actual board rules.

    Many thanks to @macandrea for his substantial and extensive contributions. He even now automatised the entire "Install High Sierra.app" creation procedure detailed above within one single script:

    createInstaller.sh will automatically create on any MacOS System the "Install High Sierra.app" for macOS High Sierra 10.13.5 (17F77) in the /Applications folder.

    Just download und unzip createInstaller.sh.zip and run the following terminal commands:

    Code (Text):

    cd ~/Downloads
    chmod +x createInstaller.sh
    ./createInstaller.sh
     
    Absolutely brilliant, gorgeous and genius job man!


    D.3) iMac Pro macOS High Sierra 10.13.5 (17F77) USB Flash Drive Installer Creation

    Follow the individual steps detailed below to successfully create a bootable iMac Pro macOS High Sierra 10.13.4 (17E199) USB Flash Drive Installer.

    1.) Format a USB Flash Drive of your choice (source, named USB) with HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility on any other Hackintosh or Mac of your choice. This will create an empty HFS+ Partition and a yet empty EFI-partition on your iMac Pro macOS USB Flash Drive Installer.

    2.) With the iMac Pro macOS High Sierra 10.13.4 (17E199) Installer Package in your /Application Folder, connect your USB Flash Drive (named USB) and run the following terminal command:

    Code (Text):
    sudo /Applications/Install\ macOS\ High\ Sierra.app/Contents/Resources/createinstallmedia --volume /Volumes/USB --applicationpath /Applications/Install\ macOS\ High\ Sierra.app --nointeraction
    Alternatively, one can create the iMac Pro macOS USB Flash Drive Installer also by means of the Install Disk Creator.app

    3.) Yet we have to make our iMac Pro macOS USB Flash Drive Installer also bootable. This can be partly done by means of the following terminal commands:

    Code (Text):

    cd /Volumes/YOUR_USB_VOLUME
    mkdir .IABootFiles
    cd .IABootFiles
    cp /Volumes/YOUR_USB_VOLUME/System/Library/CoreServices/boot.efi .
     
    This is a tricky part where many people fail. Note that "YOUR_USB_VOLUME" is a place holder in the above commands for the name of your real USB Flash Drive. Before executing the above commands, replace "YOUR_USB_VOLUME" by the real name of your USB Flash Drive.

    To make the entire thing idiot proofed, let me explain the entire procedure by means of some nice example once provided by @paulotex to some user:

    If your USB is called "Super USB I Like It Very Much" then you have to use:

    cd /Volumes/Super\ USB\ I\ Like\ It\ Very\ Much

    Note the "\" before each space.

    The entire procedure for the assumed USB Flash Drive with the above name convention would look like that (don't forgot the isolated dot "." at the end of the last copy (cp) command below):

    Code (Text):
    cd /Volumes/Super\ USB\ I\ Like\ It\ Very\ Much
    mkdir .IABootFiles
    cd  .IABootFiles
    cp /Volumes/Super\ USB\ I\ Like\ It\ Very\ Much/System/Library/CoreServices/boot.efi .
    With the terminal command:

    Code (Text):
    ls boot.efi
    you can subsequently verify that boot.efi is there where it should be.

    If you mistake at this point, your USB Flash Drive Installer will not be bootable and the USB Flash Drive macOS Installer partition will be simply invisible in the Clover Boot Menu!

    4.) For successfully booting your iMac Pro macOS USB Flash Drive Installer, the latter must however also contain a valid EFI- Folder with an SMBIOS iMacPro1,1 system definition. Thus, copy the EFI-Folder you prepared in Section D.1) to the yet empty EFI Partition of your iMac Pro macOS USB Flash Drive Installer.

    You now have a fully functional and bootable iMac Pro macOS High Sierra 10.13.5 (17F77) USB Flash Drive Installer.

    Many thanks to @macandrea for his substantial and extensive contributions.


    D.4) iMac Pro macOS High Sierra 10.13.5 (17F77) Clean Install on Broadwell-E/EP/Haswell-E/EP X99

    clean-install.png

    Follow the individual steps detailed below to successfully setup macOS High Sierra 10.13.5 (17F77) on a virgin system drive of your choice (NVMe, SSD or HDD).

    1.) In order to perform a clean install of macOS High Sierra 10.13.5 (17F77), prepare a virgin NVMe, SDD or HDD destination drive for the iMac Pro macOS installation by formatting the drive with HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility on any other Hackintosh or Mac of your choice. This will create an empty HFS+ Partition and a yet empty EFI-partition on the drive.

    2.) Copy the EFI-Folder you prepared in Section D.1) to the yet empty EFI Partition.

    3.) Now connect the Destination Drive to your Hackintosh System and boot the latter with the plugged iMac Pro macOS High Sierra 10.13.5 (17F77) USB Flash Drive Installer, your created in Section D.2)

    4.) While booting your system, press the F8 button to enter the BIOS boot menu. Select to boot from your iMac Pro macOS USB Flash Drive Installer.

    5.) Subsequently, click on the USB Flash Drive Installer Icon in the clover boot menu to boot the respective macOS Installer partition on your iMac Pro macOS USB Flash Drive Installer

    6.) After successful boot, pass the individual steps of the macOS high Sierra 10.13 installation menu and finally select the destination drive of your macOS High Sierra 10.13 Installation, which should be logically the system disk you successfully configured above. In the next step, the Installer will create a macOS High Sierra 10.13 Installer Partition on the system disk and subsequently reboot your system.

    7.) During system reboot, just press again the F8 button to enter the BIOS boot menu. Select again to boot from your USB Flash Drive. In contrary to 6.), click this time on the "Install MacOS.." Icon in the clover boot screen to boot the newly created macOS High Sierra 10.13 Installer Partition on your system disk.

    8.) After successful boot, you will enter now the macOS High Sierra 10.13 Installer Screen with a progress bar starting at 34 minutes.

    9.) After another reboot, press again the F8 button to enter the BIOS boot menu. Select to boot with your System Disk EFI-folder. Click on the "MacOS High Sierra" icon in the clover boot screen to boot the updated macOS High Sierra 10.13 partition on your system disk.

    10.) After successful boot you will enter again the macOS High Sierra 10.13 Installer Screen with a progress bar starting at 18 minutes. After successfully registration at iCloud at the end of the macOS installation, you now have your first iMac Pro macOS High Sierra 10.13.5 (17F77) build.

    Proceed with Section D.6) - iMac Pro macOS High Sierra Build Updates (if necessary) or E.) - Post Installation Process.

    D.5) Direct iMac Pro conversions of a functional 99 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation

    1.) Replace the EFI-Folder of your System Disk by the EFI-Folder you created in Section D.1)

    2.) Copy /System/Library/CoreServices/PlatformSupport.plist to your Desktop, add BoardID "Mac-7BA5B2D9E42DDD94" under SupportedBoardIDs by means of Xcode as suggested by user Griven from the German Hackintosh-Forum and copy back the modified PlatformSupport.plist to System/Library/CoreServices/.


    3.) If not already in your /Applications folder after performing Section D.2), copy the iMac Pro macOS Installer Package ("Install High Sierra.app") to your /Applications folder. Alternatively to D.2) and the macOS Full Package Installer, it is also sufficient to just download the original unmodified macOS High Sierra 10.13.5 (17F77) BaseSystem.dmg distribution from the Apple Server to your Desktop with the following terminal commands:

    Code (Text):
    cd ~/Desktop/
    curl http://swcdn.apple.com/content/downloads/51/08/091-86775/1fn3s8c48wk0u34dyujciitmn0nx3ul3dc/BaseSystem.dmg -o BaseSystem.dmg
    4.) Double click on the "Install High Sierra.app" in the /Applications Folder to start the macOS High Sierra 10.13.5 (17F77) installation. Alternatively, double click on the BaseSystem.dmg to mount the macOS installer and double click on the therein contained "Install macOS High Sierra.app" to start the macOS High Sierra 10.13.5 (17F77) installation.

    5.) After reboot, click on the "Install MacOS.." Icon in the clover boot screen to boot the newly created macOS High Sierra 10.13 Installer Partition on your system disk.

    6.) After successful boot, you will enter now the macOS High Sierra 10.13 Installer Screen with a progress bar starting at 43 minutes.


    7.) After another reboot, click on the "MacOS High Sierra" icon in the clover boot screen to boot the updated macOS High Sierra 10.13 partition on your system disk.

    8.) After successful boot you will enter again the macOS High Sierra 10.13 Installer Screen with a progress bar starting at 18 minutes. After successfully registration at iCloud at the end of the macOS installation, you now have your first iMac Pro macOS High Sierra 10.13.5 (17F77) build.

    Proceed with Section D.6) - iMac Pro macOS High Sierra Build Updates (if necessary) or Section E.) - Post Installation Process.

    D.6) iMac Pro macOS High Sierra Build Update Procedure

    After the successful clean install or conversion you will be able to update your iMac Pro macOS High Sierra 10.13.5 (17F77) build to macOS High Sierra 10.13.6 Public Beta 5 (17G62a) directly via the Appstore. For macOS beta builds it is recommended to clone your macOS High Sierra System Disk with Carbon Copy Cloner (CCC) to a test drive and to update to the Public Beta on the latter.

    Also any other future macOS High Sierra Update can be directly performed via the Appstore.


    E.) Post Installation Process

    post-installation.png

    By following the individual steps listed below, you will gain an absolutely stable and fully functional system.

    E.1) Xnu CPU Power Management (XCPM) Configuration

    power-management.png

    The EFI folder of EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip, attached towards the end of this post, already contains a fully functional XCPM configuration for the i7-6950X Broadwell-E CPU, which just needs to be adopted for other CPU configurations (Broadwell-E/EP different from i7-6950X, Haswell-E/EP).

    Before adapting the XCPM configuration, verify the following BIOS settings:
    • Advanced\CPU Configuration\CPU Power Management Configuration\
    • Enhanced Intel SpeedStep Technology (EIST): Disabled
    • Turbo mode: Enabled
    • CPU C-State: Enabled
    • Enhanced C1 State: Enabled
    • CPU C3 Report: Enabled
    • CPU C6 Report: Enabled
    • Package C State Limit: C6(non Retention) state
    Subsequently, follow the individual steps below.

    1.) Open the config.plist of your 10.13 test drive and revise the "Kernel and Kext Patches" Section.

    KernelPatches.png

    Verify "FakeCPUID" in "Kernel and Kext Patches" Section of Clover Configurator:

    Broadwell-E/EP FakeCPUID:
    "0x040674"

    Haswell-E/EP standard FakeCPUID:
    "0x0306F2"

    All Broadwell-E/EP and Haswell-E/EP users have to enable the Broadwell-E performance Kernel patch by @PMheart in their config.plist under "KernelToPatch" in Section "Kernel and Kext Patches" of Clover Configurator, to overcome persistent OC and performance flaw issues.

    Note that the Broadwell-E performance Kernel patch changes from macOS 10.13.5:

    Code (Text):

    Find: C1E30848 63D389D0 48C1EA20 B9990100 000F3048 FF05B9AD 6B004883 C4085B5D C3662E0F 1F840000 000000
    Replace: BB00FF00 004863D3 89D048C1 EA20B999 0100000F 3048FF05 B9AD6B00 4883C408 5B5DC390 90909090 909090
    to macOS 10.13.6 PB1:

    Code (Text):
    Find: C1 E3 08 48 63 D3 89 D0 48 C1 EA 20 B9 99 01 00 00 0F 30 48 FF 05 B9 BD 6B 00 48 83 C4 08 5B 5D C3 66 2E 0F 1F 84 00 00 00 00 00
    Replace: BB 00 FF 00 00 48 63 D3 89 D0 48 C1 EA 20 B9 99 01 00 00 0F 30 48 FF 05 B9 BD 6B 00 48 83 C4 08 5B 5D C3 90 90 90 90 90 90 90 90
    I also still need to include the xcpm_pkg_scope_msrs Kernel patch of Pike Alpha to successfully boot my system.

    Enable "PluginType" in your config.plist under SSDT/Generate Options/ in Section ACPI of Clover Configurator for a fully working XCPM implementation. Note that by this, Pike Alpha's former ssdt.aml XCPM implementation becomes totally obsolete.

    Plugin-Type.png

    All other former XCPM kernel patches have become obsolete already with 10.13.4.

    There is also no need for injecting any additional frequency vector.

    2.) Reboot after applying any changes.

    To verify your XCPM configuration, perform the following steps:

    1.) Verify with the terminal command "sysctl machdep.xcpm.mode" if the XCPM mode is active. If so, "sysctl machdep.xcpm.mode" should return "1".

    2.) a.) Verify that in the IORegistryExplorer you have now under CP00@0 the following entry:

    Code (Text):
    Property:         Type:         Value:
    plugin-type       Number        0x1
    b.) Verify with the terminal command

    Code (Text):
    kextstat|grep -y x86plat
    that the "X86PlatformPlugin.kext" is now loaded. If the command returns something like

    Code (Text):
     112    1 0xffffff7f822bc000 0x17000    0x17000    com.apple.driver.X86PlatformPlugin (1.0.0) FD88AF70-3E2C-3935-99E4-C48669EC274B <111 19 18 13 11 7 6 5 4 3 1>
     146    1 0xffffff7f822d3000 0x7000     0x7000     com.apple.driver.X86PlatformShim (1.0.0) DCEA94A4-3547-3129-A888-E9D5C77B275E <112 111 13 7 4 3>
    you are fine.

    c.) Verify with the terminal command

    Code (Text):
    kextstat|grep -y appleintelcpu
    that you got rid of the Apple Intel CPU power management. If the result is empty you are fine.

    3.) To verify that the Frequency-Vectors are now loaded, use the following terminal command:

    Code (Text):
    sysctl -n machdep.xcpm.vectors_loaded_count
    If everything is ok, the command returns "1".

    4.) To obtain further information on your XCPM Power Management configuration, download Piker Alpha’s AppleIntelInfo.kext from Github. To compile the source code, you need to primarily install Xcode (Appstore) and Xcode Command Line Tools! This guideline might be helpful for the successfully installation of the latter.

    Now enter the following terminal commands:

    Code (Text):
    cd ~/Downloads/AppleIntelInfo-master
    xcodebuild
    cd build/Release
    chmod -R 755 AppleIntelInfo.kext
    sudo chown -R root:wheel AppleIntelInfo.kext
    Load the AppleIntelInfo.kext with "kextload" and "cat" the info-results with the following terminal commands:

    Code (Text):
    sudo kextload AppleIntelInfo.kext
    Code (Text):
    sudo cat /tmp/AppleIntelInfo.dat
    The cat command should reveal something like the following result:

    Code (Text):

    AppleIntelInfo.kext v2.5 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.

    Settings:
    ------------------------------------------
    logMSRs..................................: 1
    logIGPU..................................: 0
    logCStates...............................: 1
    logIPGStyle..............................: 1
    InitialTSC...............................: 0x11d3a1760ecb2 (10453 MHz)
    MWAIT C-States...........................: 8480

    Processor Brandstring....................: Intel(R) Core(TM) i7-6950X CPU @ 3.00GHz

    Processor Signature..................... : 0x406F1
    ------------------------------------------
     - Family............................... : 6
     - Stepping............................. : 1
     - Model................................ : 0x4F (79)

    Model Specific Registers (MSRs)
    ------------------------------------------

    MSR_CORE_THREAD_COUNT............(0x35)  : 0x0
    ------------------------------------------
     - Core Count........................... : 10
     - Thread Count......................... : 20

    MSR_PLATFORM_INFO................(0xCE)  : 0x20080C3BF3811E00
    ------------------------------------------
     - Maximum Non-Turbo Ratio.............. : 0x1E (3000 MHz)
     - Ratio Limit for Turbo Mode........... : 1 (programmable)
     - TDP Limit for Turbo Mode............. : 1 (programmable)
     - Low Power Mode Support............... : 1 (LPM supported)
     - Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
     - Maximum Efficiency Ratio............. : 12
     - Minimum Operating Ratio.............. : 8

    MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x1E000005
    ------------------------------------------
     - I/O MWAIT Redirection Enable......... : 0 (not enabled)
     - CFG Lock............................. : 0 (MSR not locked)
     - C3 State Auto Demotion............... : 1 (enabled)
     - C1 State Auto Demotion............... : 1 (enabled)
     - C3 State Undemotion.................. : 1 (enabled)
     - C1 State Undemotion.................. : 1 (enabled)
     - Package C-State Auto Demotion........ : 0 (disabled/unsupported)
     - Package C-State Undemotion........... : 0 (disabled/unsupported)

    MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x10414
    ------------------------------------------
     - LVL_2 Base Address................... : 0x414
     - C-state Range........................ : 1 (C-States not included, I/O MWAIT redirection not enabled)

    IA32_MPERF.......................(0xE7)  : 0xACF485063
    IA32_APERF.......................(0xE8)  : 0xB96AC7BB7
    MSR_0x150........................(0x150) : 0x0

    MSR_FLEX_RATIO...................(0x194) : 0xE0000
    ------------------------------------------

    MSR_IA32_PERF_STATUS.............(0x198) : 0x204900001E00
    ------------------------------------------
     - Current Performance State Value...... : 0x1E00 (3000 MHz)

    MSR_IA32_PERF_CONTROL............(0x199) : 0x2A00
    ------------------------------------------
     - Target performance State Value....... : 0x2A00 (4200 MHz)
     - Intel Dynamic Acceleration........... : 0 (IDA engaged)

    IA32_CLOCK_MODULATION............(0x19A) : 0x0

    IA32_THERM_INTERRUPT.............(0x19B) : 0x0

    IA32_THERM_STATUS................(0x19C) : 0x883D0000
    ------------------------------------------
     - Thermal Status....................... : 0
     - Thermal Log.......................... : 0
     - PROCHOT # or FORCEPR# event.......... : 0
     - PROCHOT # or FORCEPR# log............ : 0
     - Critical Temperature Status.......... : 0
     - Critical Temperature log............. : 0
     - Thermal Threshold #1 Status.......... : 0
     - Thermal Threshold #1 log............. : 0
     - Thermal Threshold #2 Status.......... : 0
     - Thermal Threshold #2 log............. : 0
     - Power Limitation Status.............. : 0
     - Power Limitation log................. : 0
     - Current Limit Status................. : 0
     - Current Limit log.................... : 0
     - Cross Domain Limit Status............ : 0
     - Cross Domain Limit log............... : 0
     - Digital Readout...................... : 61
     - Resolution in Degrees Celsius........ : 1
     - Reading Valid........................ : 1 (valid)

    MSR_THERM2_CTL...................(0x19D) : 0x0

    IA32_MISC_ENABLES................(0x1A0) : 0x850089
    ------------------------------------------
     - Fast-Strings......................... : 1 (enabled)
     - FOPCODE compatibility mode Enable.... : 0
     - Automatic Thermal Control Circuit.... : 1 (enabled)
     - Split-lock Disable................... : 0
     - Performance Monitoring............... : 1 (available)
     - Bus Lock On Cache Line Splits Disable : 0
     - Hardware prefetch Disable............ : 0
     - Processor Event Based Sampling....... : 0 (PEBS supported)
     - GV1/2 legacy Enable.................. : 0
     - Enhanced Intel SpeedStep Technology.. : 1 (enabled)
     - MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
     - Adjacent sector prefetch Disable..... : 0
     - CFG Lock............................. : 0 (MSR not locked)
     - xTPR Message Disable................. : 1 (disabled)

    MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x640A00
    ------------------------------------------
     - Turbo Attenuation Units.............. : 0
     - Temperature Target................... : 100
     - TCC Activation Offset................ : 0

    MSR_MISC_PWR_MGMT................(0x1AA) : 0x402000
    ------------------------------------------
     - EIST Hardware Coordination........... : 0 (hardware coordination enabled)
     - Energy/Performance Bias support...... : 1
     - Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
     - Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

    MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2A2A2A2A2A2A2A2A
    ------------------------------------------
     - Maximum Ratio Limit for C01.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C02.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C03.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C04.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C05.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C06.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C07.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C08.......... : 2A (4200 MHz)

    MSR_TURBO_RATIO_LIMIT1...........(0x1AE) : 0x2222222222222A2A
    ------------------------------------------
     - Maximum Ratio Limit for C09.......... : 2A (4200 MHz)
     - Maximum Ratio Limit for C10.......... : 2A (4200 MHz)

    IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x5
    ------------------------------------------
     - Power Policy Preference...............: 5 (balanced performance and energy saving)

    MSR_POWER_CTL....................(0x1FC) : 0x2904005B
    ------------------------------------------
     - Bi-Directional Processor Hot..........: 1 (enabled)
     - C1E Enable............................: 1 (enabled)

    MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
    ------------------------------------------
     - Power Units.......................... : 3 (1/8 Watt)
     - Energy Status Units.................. : 14 (61 micro-Joules)
     - Time Units .......................... : 10 (976.6 micro-Seconds)

    MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFF80015FFF8
    ------------------------------------------
     - Package Power Limit #1............... : 4095 Watt
     - Enable Power Limit #1................ : 1 (enabled)
     - Package Clamping Limitation #1....... : 1 (allow going below OS-requested P/T state during Time Window for Power Limit #1)
     - Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
     - Package Power Limit #2............... : 4095 Watt
     - Enable Power Limit #2................ : 1 (enabled)
     - Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
     - Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
     - Lock................................. : 0 (MSR not locked)

    MSR_PKG_ENERGY_STATUS............(0x611) : 0xC06AC
    ------------------------------------------
     - Total Energy Consumed................ : 48 Joules (Watt = Joules / seconds)

    MSR_PKGC3_IRTL...................(0x60a) : 0x0
    MSR_PKGC6_IRTL...................(0x60b) : 0x0
    MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x298ED1EE0
    MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0xD638F0
    MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x298ED1EE0
    MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0xD638F0
    MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x44911A9AC

    IA32_TSC_DEADLINE................(0x6E0) : 0x11D3A1BDB3826

    CPU Ratio Info:
    ------------------------------------------
    Base Clock Frequency (BLCK)............. : 100 MHz
    Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
    Maximum non-Turbo Ratio/Frequency........: 30 (3000 MHz)
    Maximum Turbo Ratio/Frequency............: 42 (4200 MHz)
    P-State ratio * 100 = Frequency in MHz
    ------------------------------------------
    CPU P-States [ (12) 27 30 ]
    CPU C3-Cores [ 1 2 4 6 8 10 12 14 16 18 ]
    CPU C6-Cores [ 0 2 4 6 8 10 12 14 16 18 ]
    CPU P-States [ 12 17 27 (30) ]
    CPU C3-Cores [ 1 2 3 4 6 7 8 10 11 12 14 15 16 18 19 ]
    CPU C6-Cores [ 0 2 4 6 8 9 10 12 14 16 17 18 ]
    CPU P-States [ (12) 17 27 30 31 ]
    CPU C3-Cores [ 0 1 2 3 4 6 7 8 9 10 11 12 14 15 16 18 19 ]
    CPU P-States [ (12) 14 17 27 30 31 ]
    CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 18 19 ]
    CPU C6-Cores [ 0 2 4 6 8 9 10 12 14 15 16 17 18 ]
    CPU P-States [ (12) 14 17 20 27 30 31 ]
    CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
    CPU C6-Cores [ 0 1 2 4 6 7 8 9 10 12 14 15 16 17 18 ]
    CPU P-States [ (12) 14 16 17 20 27 30 31 ]
    CPU P-States [ (12) 14 16 17 18 20 27 30 31 ]
    CPU P-States [ (12) 14 16 17 18 20 27 30 31 32 ]
    CPU P-States [ (12) 14 16 17 18 20 22 27 30 31 32 ]
    CPU C6-Cores [ 0 1 2 3 4 6 7 8 9 10 12 14 15 16 17 18 ]
    CPU P-States [ (12) 13 14 16 17 18 20 22 27 30 31 32 ]
    CPU C6-Cores [ 0 1 2 3 4 6 7 8 9 10 12 13 14 15 16 17 18 19 ]
    CPU P-States [ (12) 13 14 16 17 18 20 22 23 27 30 31 32 ]
    CPU P-States [ 12 13 14 (15) 16 17 18 20 22 23 27 30 31 32 ]
    CPU P-States [ (12) 13 14 15 16 17 18 20 22 23 25 27 30 31 32 ]
    CPU P-States [ (12) 13 14 15 16 17 18 20 21 22 23 25 27 30 31 32 ]
    CPU C6-Cores [ 0 1 2 3 4 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
    CPU P-States [ 12 13 14 15 16 17 18 20 21 22 23 (24) 25 27 30 31 32 ]
    CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 27 30 31 32 ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 29 (30) 31 32 ]
    CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 36 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 36 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 35 36 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 35 36 41 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 35 36 37 41 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 35 36 37 38 41 (42) ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 35 36 37 38 39 41 (42) ]
    CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 34 35 36 37 38 39 40 41 42 ]
    CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 34 35 36 37 38 39 40 41 42 ]
    CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 (42) ]
     
    To unload the AppleIntelInfo.kext, enter the terminal command:

    Code (Text):
    sudo kextunload AppleIntelInfo.kext
    E.2) Graphics Configuration

    Grphics.png

    Most ATI GPUs, e.g. RX Vega 64, RX Vega Frontier, RX 580, RX 560 are now natively implemented. Remaining HDMI/DP port errors, hot plug errors and flaws with multi-monitor or 5K display configurations can be fixed by means of VegaGraphicsFixup.kext, kindly provided by @jyavenard. Important notifications for all Vega users with 4K monitors: When connecting e.g. the Vega Frontier with e.g. the LG 38UC99-W (WUHD, 3840 pix x 1600 pix) via one of the Display Ports (DPs), the screen resolution is fine under both Windows 10 and macOS High Sierra but is totally at odd during boot (VGA like boot screen resolution). @DSM2 reported similar issues with his true 4K display. Thus the VEGA DP 4K boot screen resolution issue is not related with the fact that the LG 38UC99-W is a ultra-wide (3840x1600) and not a true UHD (3840x2160) monitor. It is definitely a Vega firmware problem in combination with 4K displays, as the DP 4K boot screen resolution issue is totally absent with my Nvidia GPU and the problem also does not only affect the ASUS Splash Screen but also spreads over the entire boot process until the login screen is reached (Windows and macOS). Splash Screen, Apple logo or verbose boot messages are not stretched but rather have VGA like resolution. Any fix of the AMD vBIOS would be highly appreciated. It is more than disappointing to witness such issues with 1000$ GPUs... Fortunately, the 4K boot screen issue is restricted to the Vega DP ports and likely due to the fact that the LG 38UC99-W only supports DP 1.2. Solution: Connect your Vega and your 4K display via the HDMI port and everything will work as expected.

    Nvidia Kepler Graphics Cards were already natively implemented in the earlier beta distributions of macOS 10.13.

    All Users with Maxwell and Pascal Nvidia Graphics Cards Users and SMBIOS MacPro1,1 can employ officially distributed Nvidia 10.13 Web Drivers for their Nvidia Pascal and Maxwell graphics cards! Upon my request from 7 January 2018, Nvidia officially released first WebDriver-387.10.10.10.25.105 for 10.13.2 (17C2120) and first WebDriver-387.10.10.10.25.106 for 10.13.2 SA (17C2205) - Supplemental Update on 11 January 2018. On 25 January 2018, Nvidia released a Web Driver 387.10.10.10.25.157 for 10.13.3 (17D2047), which worked flawless with Pascal GPUs (lagging issues have been reported for Maxwell GPUs). On 20 February 2018, Nvidia released a Web Diver 387.10.10.10.30.159 for 10.13.3 SA (17D2102). On 31 March 2018 and 18 April 2018, Nvidia also released Web Driver 387.10.10.10.30.103 and 387.10.10.10.30.106 for 10.13.4 (17E199). On 25 April 2018, Web Driver 387.10.10.10.30.107 has been released for 10.13.4 SU (17E202). On 02 June 2018, finally we Driver 387.10.10.10.35.106 followed for 10.13.5. Since Web Driver 387.10.10.10.30.106 former lagging issues have been fully removed. 10.13.6 Public Beta 5 (17G62a) users can use WebDriver-78.10.10.10.35.106 after a simple patching procedure detailed below.

    How to patch an Nvidia WebDriver:

    Download the Nvidia WebDriver-Payload Repackager from InsanelyMac. Credits to @Chris111 and @Pavo.

    The patch procedure is simple and fully described in the implemented Readme.txt and will reveal a Repackaged-WebDriver.pkg, which can be used for installing the patched Nvidia Web Driver under macOS 10.13.6 Public Beta distributions.

    Nvidia Web Driver Installation and Black Screen Prevention:

    Apparently with SMBIOS iMacPro1,1, the Nvidia Black Screen Prevention has become obsolete. Thanks to @fabiosun from InsanelyMac for this finding. Thus, NvidiaGraphicsFixup.kext, subverting AppleMobileFileIntegrity banning the driver can be theoretically removed from the /EFI/CLOVER/kexts/Other/ directory of your macOS Flash Drive Installer and 10.13 System Disk. However, the most actual releases of NvidiaGraphicsFixup.kext v.1.2.6 and Lilu.kext v1.2.3 apparently help in fixing the Nvidia HDAU implementation and sporadic black screen issues while wake from sleep. Thus, the latter kext combination might still represent potential workarounds for few likely remaining system issues.

    a.) Install the original or patched Nvidia 10.13 Web Driver Package.

    b.) In case of the original Web Driver, just reboot as requested and you will already have a fully functional Web Driver.

    c.) In case of the patched Web Driver, perform the following additional steps:

    i.) Copy /L/E/ NVDAStartupWeb.kext to your Desktop.

    ii.) Right-click on NVDAStartupWeb.kext and select show package content.

    iii.) Change to "Contents" and edit the "Info.plist" with Xcode.

    iv.) Go to IOKitPersonalities -> NVDAStartup -> change "NVDARequiredOS" from "17F77" to "17G62a", the corresponding build number of 10.13.6 Public Beta 5.

    v.) Save the "Info.plist" file and copy the modified "NVDAStartupWeb.kext" to /L/E/ with root permission.

    vi.) Open a terminal and enter the following commands:

    Code (Text):
    sudo chmod -R 755 /Library/Extensions/NVDAStartupWeb.kext


    Code (Text):
    sudo chown -R root:wheel /Library/Extensions/NVDAStartupWeb.kext


    Code (Text):
    sudo touch /System/Library/Extensions && sudo kextcache -u /


    Code (Text):
    sudo touch /Library/Extensions && sudo kextcache -u /


    vii.) Reboot.

    viii.) The patched Web Driver will not be active yet. Therefore, open the Nvidia Driver Manager and select "Nvidia Web Driver".

    ix.) Now reboot as requested and you will have a fully functional patched Web Driver under 10.13.6 Public Beta 5 (17G62a).


    E.3) Audio Configuration

    audio.jpg

    The EFI folder attached towards the end of this post already contains a fully functional AppleALC audio configuration, which consists of:

    1.) codeccommander.kext, AppleALC.kext v1.2.6 and Lilu.kext v1.2.3 in "/EFI/CLOVER/kexts/Other/

    2.) ALZA -> HDEF "DSDT patch" in the config.plist in Section "ACPI" of Clover Configurator

    Code (Text):
    Comment:                Find:           Replace:
    Rename ALZA to HDEF     414c5a41        48444546
    Note that in Section 9.2), we will implement this ACPI replacement directly in the system-SSDT. By then, the DSDT patch detailed above again needs to be removed from the config.plist.

    3.) Audio ID Injection "1" in the config.plist under Audio/Inject in Section "Devices" of Clover Configurator.

    This audio configuration provides a correct analogue onboard audio chipset system implementation.

    The correct digital HDMI/DP HDAU PCI device implementation will be detailed in Section E.9) in line with the HDEF and GPU PCI device implementation.



    E.4) USB Configuration

    USB.png

    With AppleIntelPCHPMC, Apple should properly implement all external and internal XHC USB 3.0 (USB 3.1 Gen 1 Type-A) and USB 2.0 (USB 2.0 Gen 1 Type-A) ports. All external and internal USB 3.1 (USB 3.1 Gen 2 Type-A and Type-C) ports are natively implemented on different controllers than XHC.

    All ASUS A99-A II users, not content with the XHC USB implementation, can download, unzip and use my board-specific XHC USB Kext KGP-ASUS-X99-A-II-iMacPro-XHCI.kext.zip in /EFI/Clover/kexts/Other/. All users of mainboards different from the ASUS X99-A II, can create their own board specific XHC USB kext by following my XHC USB Kext Creation guide line https://www.tonymacx86.com/threads/macos-high-sierra-10-13-xhc-usb-kext-creation-guideline.242999/.

    Note that in addition one needs to implement the XHC USB port limit patch in the config.plist under "KextsToPatch" in Section "Kernel and Kext Patches" of Clover Configurator, as else not all available XHC USB ports will be implemented.

    Code (Text):
    Name*          Find*[Hex]               Replace* [Hex]           Comment
    AppleUSBXHCI   837d940f 0f839704 0000   837d941a 90909090 9090   10.13.4 USB Port Limit Patch
    Many thanks to @PMheart from InsanelyMac for providing the respective XHC USB port limit patches.

    3.) All following USB settings in the "Device" section of the Clover Configurator: "Inject", "Add ClockID", "FixOwnership", "HighCurrent" need to be unchecked.

    E.5) M.2/NVME Configuration

    evo.jpg

    In contrary to macOS Sierra 10.12, macOS High Sierra 10.13 provides native support of non-4Kn NVMe SSDs, like my Samsung EVO 960 M.2/NVMe. All patches applied under macOS Sierra 10.12 are now obsolete. The native support of non-4Kn NVMe SSDs enables the unique opportunity to directly perform a clean-install of macOS High Sierra 10.13 on M.2 NVMEs like the Samsung EVO 960.

    The only current drawback consists in the external drive implementation of NVMEs. This minor issue should be easily solved by adding the actual External NVME Icon KextToPatch entry to the config.plist by means of the Clover Configurator.

    Code (Text):

    Name*            Find* [HEX]           Replace* [HEX]        Comment
    IONVMeFamily     4885c074 07808b20     4885c090 90808b20     External NVME Icon Patch
    Not however, that within the actual macOS High Sierra distribution, this approach does not seem to work anymore, despite the KextToPatch entry detailed above. If you still have your NVMe implemented in form of an external drive you have to perform the following workaround, detailed below.

    1.) Disable the not working External NVME Icon KextToPatch entry.

    2.) Open the IORegistryExplorer, in the upright search field type nvme and take not of values in the left column, i.e. indicated as v.1, v.2 and v.3 and marked by red rectangles in the figure below. As you can see by following these entries, your nvme device shows up in PCI0@0 > BR1B@1,1 > H000@0

    NVMe-Patch.png

    3.) Download and unzip the SSDT-NVMe-extern-icon-patch.aml.zip, and open the SSDT-NVMe-extern-icon-patch.aml with MaciASL-DSDT.app, both attached towards the end of this guide. For deviating system configurations, replace the values highlighted in blue color in the figure below with those of your IOReg, marked by red rectangles and indicated by v.1, v.2 and v.3 in the figure of my IOReg above.

    nvme-patch.aml.png

    4.) Save and copy the modified SSDT-NVMe-extern-icon-patch.aml to the /EFI/CLOVER/ACPI/patched/ folder of your system drive.

    5.) Reboot

    Now your NVMe drive should correctly show up as internal.

    storage.png

    Disk-Utility.png


    E.6) SSD/NVMe TRIM Support

    Macs only enable TRIM for Apple-provided solid-state drives they come with. If you upgrade a Mac with an aftermarket SSD/MVMe, the Mac won’t use TRIM with it. The same applies for SSDs/NVMes used by a Hackintosh. When an operating system uses TRIM with a solid-state drive, it sends a signal to the SSD/MVMe every time you delete a file. The SSD/NVMe knows that the file is deleted and it can erase the file’s data from its flash storage. With flash memory, it’s faster to write to empty memory — to write to full memory, the memory must first be erased and then written to. This causes your SSD/NVMe to slow down over time unless TRIM is enabled. TRIM ensures the physical NAND memory locations containing deleted files are erased before you need to write to them. The SSD/NVMe can then manage its available storage more intelligently.

    Note that the config.plist in the EFI folder of EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip, attached towards the end of this originating post/guide, contains an SSD/NVMe "TRIM Enabler" KextsToPatch entry, which can be found in the " Kernel and Kext Patches" Section of the Clover Configurator.

    SSD-Trim-Enabler.png

    Code (Text):
    Name*                   Find*[HEX]                  Replace*[HEX]               Comment
    IOAHCIBlockStorage      4150504c 45205353 4400      00000000 00000000 0000      Trim Enabler
    With this KextToPatch entry, SSD/NVMe TRIM is fully enabled on your 10.13 System, see Apple's System Report below.

    TRIM-SystemReport.png


    E.7) Thunderbolt EX3 PCIe Add-On Implementation

    For the successful implementation of the Thunderbolt EX3 PCIe Add-On Adapter, a fully working Dual Boot System with an UEFI Windows Implementation is unfortunately absolutely mandatory. You will not be able to configure your Thunderbolt EX3 PCIe Add-On Adapter in the mainboard BIOS, until the Adapter has been successfully recognised and initialised by the UEFI Windows System. Fortunately legal and official License Keys for the actual Windows 10 Pro distribution can be purchased with a little bit of temporal effort on Google for an actual price of 20 $ or even below! Thus, the installation of a dual boot system with Windows will require some additional temporal user effort but will not noticeably further affect the users's budget.

    Please note that I especially emphasize the term UEFI, when speaking about the parallel Windows implementation. Don't use or perform a Legacy Implementation of Windows! In order to properly implement your Windows partition later-on in the Clover Bootloader and to comply with the actual Mainbaord-BIOS settings requirements, it is absolutely mandatory to run or perform an UEFI Windows implementation!

    So if not already implemented, how to achieve a fully working UEFI Windows Implementation and Dual boot System with Windows?

    1.) Important Note! For the implementation of the UEFI Windows Distribution disconnect all usually plugged macOSDrives from your rig! The Windows installer will implement a Windows Boot Loader! If you have any macOS Drive connected during installation, the latter Windows Boot Loader might overwrite and destroy your current Clover Boot Loader. This is the last thing you want! Thus for the windows installation just connect the destination drive for the installation and the Windows USB Flash Drive Installer your will create in the subsequent step below!

    2.) This Tutorial explains in all necessary detail how to download an actual Windows 10 Creator distribution, and how to subsequently create a bootable USB Flash Drive Installer for a subsequent UEFI Windows 10 installation by means RUFUS! Don't put emphasis on alternative optional methods and always take care that you just follow the instructions for a successful subsequent UEFI Windows Installation!

    3.) This Tutorial explains in all necessary detail how to properly perform the actual Windows 10 Pro Creator UEFIInstallation, subsequent to the a bootable Windows USB Flash Drive Installer realisation detailed in 2.) above.

    4.) This Tutorial explains in all necessary detail, how to migrate/clone/backup your Windows 10 UEFI System Disk afterinstallation for future maintenance and safety.

    5.) After successfully performing the UEFI Windows 10 Pro Creator Implementation, you can reconnect your macOS drive to your rig. The newly created UEFI Windows 10 Pro Creator Partition will automatically appear as a further boot option in both BIOS Boot Option Menu (F8) and Clover Boot Menu! No additional or further actions or measurements have to be taken!

    6.) Once your Windows 10 Pro Creator Partition is fully operational, install all mainboard drivers and programs implemented on the DVD attached to your mainboard.

    7.) Now switch of your rig and start with the installation of the Thunderbolt EX3 PCIe Add-On Adapter

    a.) I recommend to install the adapter in third PCIe Slot from the bottom which is PCIEX_3

    b.) For full TB hot plug functionality skip or remove the THB_C cable between the TBEX 3 and the respective mainboard connector.

    8.) Reboot into windows and install the ASUS ThunderboltEX 3 DVD.

    9.) Reboot and enter the Mainboard BIOS (F2)

    Go to /Advanced/ Thunderbolt(TM) Configuration/ and apply the following BIOS Settings detailed below:


    IMG_0451.jpg

    IMG_0452.jpg

    10.) Shut down your rig, connect the Thunderbolt Device with the Thunderbolt EX3 Adaptor and boot

    11.) You are done! Your Thunderbolt EX3 PCIe Adapter and connected devices should be now fully implemented and functional.

    12.) We will add TB XHC USB and TB Hot Plug functionality by means of the SSDT-X99-TB3-iMacPro.aml implemented and described in Section E.9.3) of this guide.


    E.8) Gbit and 10-Gbit Ethernet Implementations

    Section E.8.1) and and E.8.2.) below, describe in all necessary detail how to gain full Gbit and 10-Gbit LAN functionality on X99 systems.

    E.8.1) ASUS X99-A II onboard Gbit Ethernet Functionality

    The Intel I218-V2 Gigabit on-board LAN controller of the ASUS X99-A II is implemented by means of IntelMausiEthernet.kext (already part of my EFI-Folder distributions).

    E.8.2) 10-Gbit LAN Implementations


    E.8.2.1)
    ASUS XG-C100C Aquantia AQC107 10-Gbit NIC

    Starting with 10.13.2 there is native support for Aquantia based 10GBit network cards, which are implemented by means of a Apple Vanilla kext called "AppleEthernetAquantiaAqtion.kext", which is further part of "IONetworkingFamily.kext/Contents/PlugIns/" placed in /System/Library/Extensions/ (credits to @mikeboss). First success with the ASUS XG-C100C under MacOS 10.13.3 has been reported by @d5aqoep. @Mieze finally came up with a AppleEthernetAquantiaAqtion KextPatch for the use of the ASUS XG-C100C also under 10.13.4 and and later macOS versions.
    For further information and discussion see https://www.tonymacx86.com/threads/high-sierra-native-support-for-10gb-ethernet.239690/ or https://www.insanelymac.com/forum/t...7-10-gbe-native-support-in-high-sierra-10132/.

    How to successfully implement the ASUS XG-C100C AQC107 PCIe x4 10GBit Ethernet Adapter:

    1.) A temporal macOS High Sierra 10.13.3 (17D2047 in case of the iMac Pro) installation is absolutely mandatory at first place. Only within the latter macOS High Sierra build, the ASUS XG-C100C will receive the proper AQC107 Apple firmware to be recognised and fully implemented by OSX. The firmware update will be performed during system boot. Several boot intents might be necessary until the firmware update finally succeeds. Only subsequently, the ASUS XG-C100C will be natively implemented in macOS High Sierra 10.13.3 and fully functional.

    2.) To finally use the ASUS XG-C100C with macOS builds >10.13.4, one has to implement the following AppleEthernetAquantiaAqtion KextPatch provided by @Mieze:

    Code (Text):
    Name*                            Find*[HEX]         Replace*[HEX]      Comment
    AppleEthernetAquantiaAqtion      0F84C003 0000      90909090 9090      Aquantia patch ©Mieze
    3.) The proper XGBE ASUS XG-C100C PCI SSDT implementation is detailed in Section E.9.2)

    4.) Note that after the firmware update under macOS High Sierra 10.13.3, the ASUS XG-C100C will refuse the official Windows Lan drivers provided by ASUS and will only work with Apple's customised Aquantia64.zip boot camp drivers attached below.

    E.8.2.2) Intel X540-T1 10-Gbit NIC

    Thanks to some Ubuntu EEPROM modding, I also achieved the successful implementation of the Intel X540-T1 single port 10GB LAN PCIe Adapter by means of the Small-Tree 10GB macOS 10.13 driver.

    Important additional notes to the EEPROM modding guideline linked above can be assessed in Section E.8.2.2) of my iMac Pro X299 Desktop guide.

    The proper Intel X540-T1 PCI SSDT implementation is detailed in Section E.9.2)

    E.8.2.3) Small-Tree P2EI0G-2T 10-Gbit NIC

    The Small-Tree P2EI0G-2T 2-Port 10GB LAN PCIe Adapter constitutes now the actual base line in my iMac Pro X299 10Gbit LAN configuration. It works OoB with the Small-Tree 10GB macOS 10.13 driver.

    The proper Small-Tree P2EI0G-2T PCI SSDT implementation is detailed in Section E.9.2)

    E.8.2.4) NetGear ProSave XS508M 8-port 10-Gbit Switch

    As already mentioned above, the NetGear ProSave XS508M 8-port 10GBit switch constitutes the turntable of my 10-GBit Ethernet Network. It further connects with a QNAP TS-431X2 Quad-core 4-Bay NAS tower with Built-in 10GbE SFP+ Port.

    E.8.2.5) QNAP TS-431X2 Quad-core 4-Bay NAS tower

    The QNAP TS-431X2 Quad-core 4-Bay NAS tower finally harbours 4x 12 TB Seagate IronWolf drives in RAID 0 configuration (as I rather opt for read/write speed than redundancy).

    E.8.2.6) 10-GBit Ethernet Optimisation

    1.) Use SMB 3.0 instead of AFS for your Ethernet communication.
    2.) Enable Jumbo Frames on your NAS and macOS network settings.
    3.) The service order in your macOS network settings should have your 10-Gbit NIC at first position.
    4.) You can turn off the SMB packet signing of the client and server in a secure network.

    Incoming SMB
    Enter the following terminal commands:
    Code (Text):
    sudo -s

    echo "[default]" >> /etc/nsmb.conf
    
echo "signing_required=no" >> /etc/nsmb.conf
    
exit
    Outgoing SMB:

    Enter the following terminal commands:

    Code (Text):
    smbutil statshares -a

    sudo defaults write /Library/Preferences/SystemConfiguration/com.apple.smb.server SigningRequired 0

    E.9) ASUS X99-A II PCI Device Implementation

    In order to properly implement all PCI device drivers on his/her system and build, one needs adequate ACPI DSDT Replacements and a sophisticated SSDT. Both requirements have been originally successfully implemented for the ASUS Prime X299 Deluxe by our gorgeous @apfelnico with partial contributions of @TheOfficialGypsy. Many thanks for the extensive efforts and extremely fruitful and brilliant work! Subsequently, I adopted the ACPI DSDT Replacement Patches and SSDT in concordance with SMBIOS iMacPro1,1 for both the ASUS Prime X299 Deluxe and the ASUS X99-A II. The actual ASUS X99-A II ACPI DSDT Replacements are part of the config.plist contained in EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip. The SSDT-X99-10.13-iMacPro.aml and SSDT-X99-TB3-iMacPro.aml for the ASUS X99-A II, further developed with @apfelnico and @nmano, are attached at the bottom of this originating post/guide.

    Note that the ACPI DSDT Replacements, SSDT-X99-10.13-iMacPro.aml and SSDT-X99-TB3-iMacPro.aml can be build and PCIe slot population dependend and have to be verified and likely adopted or modified for all mainboards different from the ASUS X99-A II and builds or PCIe slot populations different from the one that constitutes the baseline of this guide.

    For the ASUS X99-A II I will use in the following the PCIe Slot nomenclature depicted below:

    ASUS X99-A II.png

    The verification and likely adaptation/modification can be performed by the help of IORegistryExplorer v1.2.

    How to adopted or modify the ACPI DSDT Replacement Patches and SSDT is detailed in post #4852 by means of the PCIe Slot-3 OSXWIFI PCIe Adaptor implementation for the ASUS Prime X299 Deluxe . I hope that by this specific example it rapidly becomes evident that the correct PCI Device implementation cannot be outlined for each individual "build-in" or "slot-specific" PCI device within this guide. The complexity and effort would just exceed by far all available capacities and indeed require the implementation of a separate guide and thread in addition. I therefore hope on your skills and flexibility to extend and apply the approach and methodology detailed above to any other "build-in" or "slot-specific" PCI device yet to be adopted or implemented.

    Important Note: It is strongly recommend to perform a stepwise PCI Device implementation by means of a minimalistic starter SSDT-X99-10.13-iMacPro.aml, which just contains the Definition Block and Device Implementation for one single specific device. Once this PCI device has been successfully implemented, other PCI Device definitions can be added to the SSDT-X99-10.13-iMacPro.aml. In case that subsequently the implementation of a specific PCI Device would be erroneous and fail, also all other already successfully implemented PCI devices would disappear from Section "PCI" of Apple's System report and the entire "PCI" Device implementation would fail. Thus a stepwise PCI device implementation/adaptation is highly recommended and sometimes deemed necessary!

    Also keep always in mind to modify/adopt the ACPI replacements in your config.plist in parallel when ever necessary!


    Note once more that the ACPI DSDT Replacements, SSDT-X99-10.13-iMacPro.aml and SSDT-X99-TB3-iMacPro.aml detailed below require SMBIOS iMacPro1,1.


    E.9.1) ACPI DSDT Replacement Implementation

    Note once more that all required ACPI DSDT Replacements are already implemented in the config.plist in the /EFI/CLOVER/ directory of the EFI-Folder contained in EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip or are directly part of the SSDT-X99-10.13-iMacPro.aml and SSDT-X99-TB3-iMacPro.aml. In the config.plist, the ACPI DSDT Replacements are disabled by default, thus we will now open the config.plist in the /EFI/CLOVER/ directory of your 10.13 System Disk EFI-Folder with Clover Configurator and stepwise adopt (if necessary) and enable the different required DSDT replacement patches in Clover Configurator Section "ACPI" under "DSDT patches", by also discussing their respective function and impact.

    a.) OSI -> XOSI and EC0_ -> EC__ or H_EC -> EC__ are DSDT replacement patches to achieve consistency with a real Mac variable naming.

    i.) The XOSI functionality is required as explained by @RehabMan (just follow this LINK for details). Thus please enable the OSI -> XOSI DSDT Replacement patch.

    ii.) On the ASUS X99-A II and ASUS X99 Deluxe II we have EC0 and H_EC controllers, which have to be renamed to 'EC' for proper USB power management. Thus enable both EC0_ -> EC__ and H_EC -> EC__ DSDT Replacement Patches.

    Code (Text):

    Comment:             Find*[Hex]      Replace [Hex]
    OSI -> XOSI          5f4f5349        584f5349
    EC0_ -> EC__         4543305f        45435f5f
    H_EC  -> EC__        485f4543        45435f5f
     
    b.) The HEC1 -> IMEI and IDER->MEID DSDT Replacement patches are Intel Management Engine Interface related and are vital as MacOS requires the variable names "IMEI" and "MEID" to load the 'AppleIntelMEIDriver'. The latter functionality solves the 'iTunes/Apple Store Content Access Problem' which is discussed here.
    Please enable now both DSDT Replacement patches independent from your mainboard.

    Code (Text):

    Comment:             Find*[Hex]       Replace [Hex]
    HECI -> IMEI         48454331         494d4549
    IDER->MEID           49444552         4d454944
     
    c.) The LPC0 -> LPCB DSDT Replacement Patch is AppleLPC and SMBus related and is applied for consistency with the variable naming on a real Mac.

    Please enable now this DSDT replacement patch independent from your mainboard.

    Code (Text):

    Comment:             Find*[Hex]         Replace [Hex]
    LPC0 -> LPCB         4c504330           4c504342
     
    d.) FPU_->MATH, TMR_->TIMR, PIC_->IPIC are all DSDT Replacement Patches for consistency with the variable naming on a real Mac. The variables are however functionless on either X99 systems or real Macs.

    Please enable now all three DSDT Replacement Patches independent from your mainboard.

    Code (Text):

    Comment:             Find*[Hex]        Replace [Hex]
    FPU_ -> MATH         4650555f          4d415448
    TMR_ -> TIMR         544d525f          54494d52
    PIC_ -> IPIC         5049435f          49504943
     
    e.) The DSM -> XDSM DSDT replacement patch will be vital for loading the SSDT-ASUS-X99-A-II.aml, as all DSM methods used in the original DSDT do have a not compatible structure totally different from the real Mac environment. Without any fix, all DSM methods would be simply ignored. Note that one single device can have only one DSM method, which can assign additional properties to the respective device.
    Thus please enable the latter DSDT replacement patch completely independent from your mainboard!

    Code (Text):

    Comment:             Find*[Hex]         Replace [Hex]
    _DSM -> XDSM         5f44534d            5844534d
     
    f.) The 48 CPxx -> PRxx replacements are i7-6950X specific and result in a proper CPU core reordering as well as in a iMac Pro specific CPU core variable naming.

    All i7-6950X users can now enable all 48 CPxx -> PRxx replacements. All users of CPUs different from the i7-6950X have to adopt/modify the 48 CPxx -> PRxx replacements in concordance with their original IOREG CPU core values.


    Code (Text):
    Comment:             Find*[Hex]        Replace [Hex]
    CP00 -> PR00         43503030          50523030
    CP01 -> PR01         43503031          50523031
    CP02 -> PR02         43503032          50523032
    CP03 -> PR03         43503033          50523033
    CP04 -> PR04         43503034          50523034
    CP05 -> PR05         43503035          50523035
    CP06 -> PR06         43503036          50523036
    CP07 -> PR07         43503037          50523037
    CP08 -> PR08         43503038          50523038
    CP09 -> PR09         43503039          50523039
    CP0A -> PR10         43503041          50523130
    CP0B -> PR11         43503042          50523131
    CP0C -> PR12         43503043          50523132
    CP0D -> PR13         43503044          50523133
    CP0E -> PR14         43503045          50523134
    CP0F -> PR15         43503046          50523135
    CP10 -> PR16         43503130          50523136
    CP11 -> PR17         43503131          50523137
    CP12 -> PR18         43503132          50523138
    CP13 -> PR19         43503133          50523139
    CP14 -> PR20         43503134          50523230
    CP15 -> PR21         43503135          50523231
    CP16 -> PR22         43503136          50523232
    CP17 -> PR23         43503137          50523233
    CP18 -> PR24         43503138          50523234
    CP19 -> PR25         43503139          50523235
    CP1A -> PR26         43503141          50523236
    CP1B -> PR27         43503142          50523237
    CP1C -> PR28         43503143          50523238
    CP1D -> PR29         43503144          50523239
    CP1E -> PR30         43503145          50523330
    CP1F -> PR31         43503146          50523331
    CP20 -> PR32         43503230          50523332
    CP21 -> PR33         43503231          50523333
    CP22 -> PR34         43503232          50523334
    CP23 -> PR35         43503233          50523335
    CP24 -> PR36         43503234          50523336
    CP25 -> PR37         43503235          50523337
    CP26 -> PR38         43503236          50523338
    CP27 -> PR39         43503237          50523339
    CP28 -> PR40         43503238          50523430
    CP29 -> PR41         43503239          50523431
    CP2A -> PR42         43503241          50523432
    CP2B -> PR43         43503242          50523433
    CP2C -> PR44         43503243          50523434
    CP2D -> PR45         43503244          50523435
    CP2E -> PR46         43503245          50523436
    CP2F -> PR47         43503246          50523437
    Resulting CPU Core Implementation

    CPU-order.png

    E.9.2) SSDT-ASUS-X99-A-II.aml PCI Device Implementation

    PCI.png

    For the proper PCI device driver implementation (detailed in the Figure above), which is mostly directly related with the PCI device functionality, we now have to revise and likely adopt or modify the attached SSDT-X99-10.13-iMacPro.aml to our specific build, system configuration and PCIe slot population with the help of the IORegistryExplorer.

    Note that for each device, the SSDT-ASUS-X99-A-II.aml contains a DefinitionBlock entry and the underlying PCI device implementation. In case of necessary modifications/adaptations, don't forget to also modify/adapt the respective DefinitionBlock entries in concordance with your IOREG entries. The entire SSDT structure is module like. Each module can be independently added, changed or removed in dependence of your specific build, needs and requirements. A stepwise implementation of the individual PCI devices is recommended!

    E.9.2.1) HDEF - onboard Audio Controller PCI Implementation:

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.ALZA, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        Scope (\_SB.PCI0)
        {
            Scope (ALZA)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (HDEF)
            {
                Name (_ADR, 0x001B0000)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x16)
                        {
                            "alc-layout-id",
                            Buffer (0x04)
                            {
                                 0x01, 0x00, 0x00, 0x00
                            },

                            "MaximumBootBeepVolume",
                            Buffer (One)
                            {
                                 0xEF
                            },

                            "MaximumBootBeepVolumeAlt",
                            Buffer (One)
                            {
                                 0xF1
                            },

                            "multiEQDevicePresence",
                            Buffer (0x04)
                            {
                                 0x0C, 0x00, 0x01, 0x00
                            },

                            "AAPL,slot-name",
                            Buffer (0x09)
                            {
                                "Built In"
                            },

                            "model",
                            Buffer (0x17)
                            {
                                "ASUS X99-A II HD Audio"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-1"
                            },

                            "built-in",
                            Buffer (0x05)
                            {
                                "0x00"
                            },

                            "device_type",
                            Buffer (0x14)
                            {
                                "HD Audio Controller"
                            },

                            "name",
                            Buffer (0x22)
                            {
                                "Realtek ALC 1150 Audio Controller"
                            },

                            "PinConfigurations",
                            Buffer (Zero) {}
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
     
    The HDEF PCI device implementation is valid for the ASUS X99-A II and likely for all other mainboards with the Realtek ALC 1150 Audio Controller chipset. It is a build in device and does not have any slot specific dependency. Note the ALZA -> HDEF ACPI Replacement within the SSDT!

    E.9.2.2) GFX0, HDAU - Nvidia Graphics Card and HDMI/DP Audio PCI implementation

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.BR3C, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H000, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H001, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.D077, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        Scope (_SB.PCI0.BR3C)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (H001)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D077)
            {
                Name (_STA, Zero)  // _STA: Status
            }
       
            Device (GFX0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x14)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0x06, 0x1B, 0x00, 0x00
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-1"
                            },

                            "@0,connector-type",
                            Buffer (0x04)
                            {
                                 0x00, 0x08, 0x00, 0x00
                            },

                            "@1,connector-type",
                            Buffer (0x04)
                            {
                                 0x00, 0x08, 0x00, 0x00
                            },

                            "@2,connector-type",
                            Buffer (0x04)
                            {
                                 0x00, 0x08, 0x00, 0x00
                            },

                            "@3,connector-type",
                            Buffer (0x04)
                            {
                                 0x00, 0x08, 0x00, 0x00
                            },

                            "@4,connector-type",
                            Buffer (0x04)
                            {
                                 0x00, 0x08, 0x00, 0x00
                            },

                            "@5,connector-type",
                            Buffer (0x04)
                            {
                                 0x00, 0x08, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (HDAU)
            {
                Name (_ADR, One)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0C)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0xEF, 0x10, 0x00, 0x00
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-1"
                            },

                            "device_type",
                            Buffer (0x16)
                            {
                                "Multimedia Controller"
                            },

                            "name",
                            Buffer (0x1D)
                            {
                                "NVIDIA High Definition Audio"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-1"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x6D,
                    Zero
                })
            }
        }
     
    The actual GFX0 and HDAU PCI device implementation is valid for SMBIOS iMacPro1,1 (GFX0) and any Nvidia Graphics Card implemented in PCIe Slot 1.

    It is a build and PCIe slot population dependent device implementation. Nvidia Graphics Card users with more than one graphics card, or with an Nvidia graphics card in a PCIe slot different from PCIe Slot 0, will have to adopt the respective PCI0, BR3A, H000, H001, D07C, GFX1 device path entries following their respective IOREG entries. Note the H000 -> H001, H001 ->D07C and D07C -> GFX0 ACPI replacements within the SSDT!

    Also note that with 10.13.4, Apple changed the com.apple.driver.AppleHDAController implementation. To make the NVIDIA HDAU PCI device driver work for e.g. a GeForce GTX 1080, one needs to add the following KextToPatch entry in Section "Kernel and kext Patches" of Clover Configurator, as already implemented in the config.plist contained in EFI-X99-10.13.5-Release-iMacPro1,1-160618.zip:

    Code (Text):
    Name*                                 Find* [HEX]         Replace* [HEX]        Comment
    com.apple.driver.AppleHDAController   DE100B0E            DE10EF10              FredWst DP/HDMI patch
    Credits to @FreedWst and thanks to @fabiosun for pointing me to this solution. The KextToPatch entry might defer for Nvidia GPUs different from the Geforce GTX 1080.

    Users of NvidiaGraphicsfixup.kext v1.2.6 and above might be able to drop this KextToPatch entry, as the latter kext already properly implements the Nvidia HDAU PCI driver.

    Below one finds an example of @apfelnico for a GFX and HDAU PCI implementation of 1x Radeon Vega Frontier in PCIe Slot 1:

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.BR3C, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H000, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H001, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.D077, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        Scope (\_SB.PCI0.BR3C)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (H001)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D077)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (PEGP)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Device (EGP0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Device (GFX0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            Store (Package (0x18)
                                {
                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                              
                                    },

                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-1"
                                    },

                                    "model",
                                    Buffer (0x16)
                                    {
                                        "Vega Frontier Edition"
                                    },

                                    "name",
                                    Buffer (0x08)
                                    {
                                        "ATY_GPU"
                                    },

                                    "@0,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00            
                                    },

                                    "@1,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00            
                                    },

                                    "@2,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00            
                                    },

                                    "@3,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x08, 0x00, 0x00            
                                    },

                                    "@0,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@1,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@2,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@3,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }
                    }

                    Device (HDAU)
                    {
                        Name (_ADR, One)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            Store (Package (0x0A)
                                {
                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                              
                                    },

                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-1"
                                    },

                                    "name",
                                    Buffer (0x1F)
                                    {
                                        "Vega Frontier Edition HD-Audio"
                                    },

                                    "model",
                                    Buffer (0x1F)
                                    {
                                        "Vega Frontier Edition HD-Audio"
                                    },

                                    "hda-gfx",
                                    Buffer (0x0A)
                                    {
                                        "onboard-2"
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }
                    }
                }
            }
        }
     
    as well as one example of @apfelnico for the GFX and HDAU PCI implementation of 1x Radeon Vega 64 in PCIe Slot 1, pimped to 1442 Mhz:

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.BR3C, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H000, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H001, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.D077, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

       Scope (\_SB.PCI0.BR3C)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (H001)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D077)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (PEGP)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Device (EGP0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Device (GFX0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            Store (Package (0x20)
                                {
                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                              
                                    },

                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-1"
                                    },

                                    "model",
                                    Buffer (0x12)
                                    {
                                        "Radeon RX Vega 64"
                                    },

                                    "name",
                                    Buffer (0x08)
                                    {
                                        "ATY_GPU"
                                    },

                                    "@0,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00            
                                    },

                                    "@1,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00            
                                    },

                                    "@2,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00            
                                    },

                                    "@3,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x08, 0x00, 0x00            
                                    },

                                    "@0,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@1,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@2,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@3,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "PP_PhmSoftPowerPlayTable",
                                    Buffer (One)
                                    {
                                        /* 0000 */  0xB6, 0x02, 0x08, 0x01, 0x00, 0x5C, 0x00, 0xE1,
                                        /* 0008 */  0x06, 0x00, 0x00, 0xEE, 0x2B, 0x00, 0x00, 0x1B,
                                        /* 0010 */  0x00, 0x48, 0x00, 0x00, 0x00, 0x80, 0xA9, 0x03,
                                        /* 0018 */  0x00, 0xF0, 0x49, 0x02, 0x00, 0x8E, 0x00, 0x08,
                                        /* 0020 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0028 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x01,
                                        /* 0030 */  0x5C, 0x00, 0x4F, 0x02, 0x46, 0x02, 0x94, 0x00,
                                        /* 0038 */  0x9E, 0x01, 0xBE, 0x00, 0x28, 0x01, 0x7A, 0x00,
                                        /* 0040 */  0x8C, 0x00, 0xBC, 0x01, 0x00, 0x00, 0x00, 0x00,
                                        /* 0048 */  0x72, 0x02, 0x00, 0x00, 0x90, 0x00, 0xA8, 0x02,
                                        /* 0050 */  0x6D, 0x01, 0x43, 0x01, 0x97, 0x01, 0xF0, 0x49,
                                        /* 0058 */  0x02, 0x00, 0x71, 0x02, 0x02, 0x02, 0x00, 0x00,
                                        /* 0060 */  0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
                                        /* 0068 */  0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x07, 0x00,
                                        /* 0070 */  0x03, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0078 */  0x00, 0x00, 0x01, 0x08, 0x84, 0x03, 0x84, 0x03,
                                        /* 0080 */  0xB6, 0x03, 0xE8, 0x03, 0x1A, 0x04, 0x4C, 0x04,
                                        /* 0088 */  0x60, 0x04, 0x7E, 0x04, 0x01, 0x01, 0x33, 0x04,
                                        /* 0090 */  0x01, 0x01, 0x84, 0x03, 0x00, 0x08, 0x60, 0xEA,
                                        /* 0098 */  0x00, 0x00, 0x00, 0x40, 0x19, 0x01, 0x00, 0x01,
                                        /* 00A0 */  0x80, 0x38, 0x01, 0x00, 0x02, 0xDC, 0x4A, 0x01,
                                        /* 00A8 */  0x00, 0x03, 0x90, 0x5F, 0x01, 0x00, 0x04, 0x00,
                                        /* 00B0 */  0x77, 0x01, 0x00, 0x05, 0x90, 0x91, 0x01, 0x00,
                                        /* 00B8 */  0x06, 0x50, 0xBD, 0x01, 0x00, 0x07, 0x01, 0x08,
                                        /* 00C0 */  0xD0, 0x4C, 0x01, 0x00, 0x00, 0x00, 0x80, 0x00,
                                        /* 00C8 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x8D, 0x01,
                                        /* 00D0 */  0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 00D8 */  0x00, 0x00, 0xDC, 0xC7, 0x01, 0x00, 0x02, 0x00,
                                        /* 00E0 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98,
                                        /* 00E8 */  0xFC, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
                                        /* 00F0 */  0x00, 0x00, 0x00, 0x00, 0xD8, 0x1B, 0x02, 0x00,
                                        /* 00F8 */  0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0100 */  0x00, 0xF4, 0x40, 0x02, 0x00, 0x05, 0x00, 0x00,
                                        /* 0108 */  0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1C, 0x64,
                                        /* 0110 */  0x02, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x01,
                                        /* 0118 */  0x00, 0x00, 0x00, 0x68, 0x81, 0x02, 0x00, 0x07,
                                        /* 0120 */  0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
                                        /* 0128 */  0x00, 0x05, 0x60, 0xEA, 0x00, 0x00, 0x00, 0x40,
                                        /* 0130 */  0x19, 0x01, 0x00, 0x00, 0x80, 0x38, 0x01, 0x00,
                                        /* 0138 */  0x00, 0xDC, 0x4A, 0x01, 0x00, 0x00, 0x90, 0x5F,
                                        /* 0140 */  0x01, 0x00, 0x00, 0x00, 0x08, 0x28, 0x6E, 0x00,
                                        /* 0148 */  0x00, 0x00, 0x2C, 0xC9, 0x00, 0x00, 0x01, 0xF8,
                                        /* 0150 */  0x0B, 0x01, 0x00, 0x02, 0x80, 0x38, 0x01, 0x00,
                                        /* 0158 */  0x03, 0x90, 0x5F, 0x01, 0x00, 0x04, 0xF4, 0x91,
                                        /* 0160 */  0x01, 0x00, 0x05, 0xD0, 0xB0, 0x01, 0x00, 0x06,
                                        /* 0168 */  0x38, 0xC1, 0x01, 0x00, 0x07, 0x00, 0x08, 0x6C,
                                        /* 0170 */  0x39, 0x00, 0x00, 0x00, 0x24, 0x5E, 0x00, 0x00,
                                        /* 0178 */  0x01, 0xFC, 0x85, 0x00, 0x00, 0x02, 0xAC, 0xBC,
                                        /* 0180 */  0x00, 0x00, 0x03, 0x34, 0xD0, 0x00, 0x00, 0x04,
                                        /* 0188 */  0x68, 0x6E, 0x01, 0x00, 0x05, 0x08, 0x97, 0x01,
                                        /* 0190 */  0x00, 0x06, 0xB0, 0xAD, 0x01, 0x00, 0x07, 0x00,
                                        /* 0198 */  0x01, 0x68, 0x3C, 0x01, 0x00, 0x00, 0x01, 0x04,
                                        /* 01A0 */  0x3C, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50,
                                        /* 01A8 */  0xC3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x38,
                                        /* 01B0 */  0x01, 0x00, 0x02, 0x00, 0x00, 0x34, 0x98, 0x01,
                                        /* 01B8 */  0x00, 0x04, 0x00, 0x00, 0x01, 0x08, 0x00, 0x98,
                                        /* 01C0 */  0x85, 0x00, 0x00, 0x40, 0xB5, 0x00, 0x00, 0x60,
                                        /* 01C8 */  0xEA, 0x00, 0x00, 0x50, 0xC3, 0x00, 0x00, 0x01,
                                        /* 01D0 */  0x80, 0xBB, 0x00, 0x00, 0x60, 0xEA, 0x00, 0x00,
                                        /* 01D8 */  0x94, 0x0B, 0x01, 0x00, 0x50, 0xC3, 0x00, 0x00,
                                        /* 01E0 */  0x02, 0x00, 0xE1, 0x00, 0x00, 0x94, 0x0B, 0x01,
                                        /* 01E8 */  0x00, 0x40, 0x19, 0x01, 0x00, 0x50, 0xC3, 0x00,
                                        /* 01F0 */  0x00, 0x03, 0x78, 0xFF, 0x00, 0x00, 0x40, 0x19,
                                        /* 01F8 */  0x01, 0x00, 0x88, 0x26, 0x01, 0x00, 0x50, 0xC3,
                                        /* 0200 */  0x00, 0x00, 0x04, 0x40, 0x19, 0x01, 0x00, 0x80,
                                        /* 0208 */  0x38, 0x01, 0x00, 0x80, 0x38, 0x01, 0x00, 0x50,
                                        /* 0210 */  0xC3, 0x00, 0x00, 0x05, 0x80, 0x38, 0x01, 0x00,
                                        /* 0218 */  0xDC, 0x4A, 0x01, 0x00, 0xDC, 0x4A, 0x01, 0x00,
                                        /* 0220 */  0x50, 0xC3, 0x00, 0x00, 0x06, 0x00, 0x77, 0x01,
                                        /* 0228 */  0x00, 0x00, 0x77, 0x01, 0x00, 0x90, 0x5F, 0x01,
                                        /* 0230 */  0x00, 0x50, 0xC3, 0x00, 0x00, 0x07, 0x90, 0x91,
                                        /* 0238 */  0x01, 0x00, 0x90, 0x91, 0x01, 0x00, 0x00, 0x77,
                                        /* 0240 */  0x01, 0x00, 0x50, 0xC3, 0x00, 0x00, 0x01, 0x18,
                                        /* 0248 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B,
                                        /* 0250 */  0x00, 0x00, 0xBC, 0x02, 0x48, 0x26, 0x46, 0x00,
                                        /* 0258 */  0x0A, 0x00, 0x54, 0x03, 0x90, 0x01, 0x90, 0x01,
                                        /* 0260 */  0x90, 0x01, 0x90, 0x01, 0x90, 0x01, 0x90, 0x01,
                                        /* 0268 */  0x90, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
                                        /* 0270 */  0x04, 0x31, 0x07, 0x90, 0x01, 0x90, 0x01, 0x90,
                                        /* 0278 */  0x01, 0x90, 0x01, 0x00, 0x00, 0x59, 0x00, 0x69,
                                        /* 0280 */  0x00, 0x4A, 0x00, 0x4A, 0x00, 0x5F, 0x00, 0x73,
                                        /* 0288 */  0x00, 0x73, 0x00, 0x64, 0x00, 0x40, 0x00, 0x90,
                                        /* 0290 */  0x92, 0x97, 0x60, 0x96, 0x00, 0x90, 0x55, 0x00,
                                        /* 0298 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 02A0 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 02A8 */  0x02, 0x02, 0xD4, 0x30, 0x00, 0x00, 0x02, 0x10,
                                        /* 02B0 */  0x60, 0xEA, 0x00, 0x00, 0x02, 0x10
                                    },

                                    "hda-gfx",
                                    Buffer (0x0A)
                                    {
                                        "onboard-2"
                                    },

                                    "PP_DisablePowerContainment",
                                    Buffer (One)
                                    {
                                         0x01                              
                                    },

                                    "PP_FuzzyFanControl",
                                    Buffer (One)
                                    {
                                         0x00                              
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }
                    }

                    Device (HDAU)
                    {
                        Name (_ADR, One)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            Store (Package (0x0A)
                                {
                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                              
                                    },

                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-1"
                                    },

                                    "name",
                                    Buffer (0x14)
                                    {
                                        "Radeon RX  HD-Audio"
                                    },

                                    "model",
                                    Buffer (0x14)
                                    {
                                        "Radeon RX  HD-Audio"
                                    },

                                    "hda-gfx",
                                    Buffer (0x0A)
                                    {
                                        "onboard-2"
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }
                    }
                }
            }
     
    and finally my Gigabyte Radeon RX Vega 64 Gaming OC 8GB implementation as part of SSDT-X99-10.13-iMacPro.aml:

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.BR3C, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H000, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.H001, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3C.D077, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):
     
        Scope (\_SB.PCI0.BR3C)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }
     
            Scope (H001)
            {
                Name (_STA, Zero)  // _STA: Status
            }
     
            Scope (D077)
            {
                Name (_STA, Zero)  // _STA: Status
            }
     
            Device (PEGP)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Device (EGP0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Device (GFX0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            Store (Package (0x28)
                                {
                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                                  
                                    },

                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-1"
                                    },

                                    "model",
                                    Buffer (0x29)
                                    {
                                        "Gigabyte Radeon RX Vega 64 Gaming OC 8GB"
                                    },

                                    "name",
                                    Buffer (0x08)
                                    {
                                        "ATY_GPU"
                                    },

                                    "@0,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00                
                                    },

                                    "@1,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00                
                                    },

                                    "@2,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x04, 0x00, 0x00                
                                    },

                                    "@3,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x08, 0x00, 0x00                
                                    },

                                    "@4,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x08, 0x00, 0x00                
                                    },

                                    "@5,connector-type",
                                    Buffer (0x04)
                                    {
                                         0x00, 0x08, 0x00, 0x00                
                                    },

                                    "@0,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@1,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@2,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@3,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@4,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "@5,name",
                                    Buffer (0x0D)
                                    {
                                        "ATY,Kamarang"
                                    },

                                    "PP_PhmSoftPowerPlayTable",
                                    Buffer (One)
                                    {
                                        /* 0000 */  0xB6, 0x02, 0x08, 0x01, 0x00, 0x5C, 0x00, 0xE1,
                                        /* 0008 */  0x06, 0x00, 0x00, 0xEE, 0x2B, 0x00, 0x00, 0x1B,
                                        /* 0010 */  0x00, 0x48, 0x00, 0x00, 0x00, 0x80, 0xA9, 0x03,
                                        /* 0018 */  0x00, 0xF0, 0x49, 0x02, 0x00, 0x8E, 0x00, 0x08,
                                        /* 0020 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0028 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x01,
                                        /* 0030 */  0x5C, 0x00, 0x4F, 0x02, 0x46, 0x02, 0x94, 0x00,
                                        /* 0038 */  0x9E, 0x01, 0xBE, 0x00, 0x28, 0x01, 0x7A, 0x00,
                                        /* 0040 */  0x8C, 0x00, 0xBC, 0x01, 0x00, 0x00, 0x00, 0x00,
                                        /* 0048 */  0x72, 0x02, 0x00, 0x00, 0x90, 0x00, 0xA8, 0x02,
                                        /* 0050 */  0x6D, 0x01, 0x43, 0x01, 0x97, 0x01, 0xF0, 0x49,
                                        /* 0058 */  0x02, 0x00, 0x71, 0x02, 0x02, 0x02, 0x00, 0x00,
                                        /* 0060 */  0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00,
                                        /* 0068 */  0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x07, 0x00,
                                        /* 0070 */  0x03, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0078 */  0x00, 0x00, 0x01, 0x08, 0x84, 0x03, 0x84, 0x03,
                                        /* 0080 */  0xB6, 0x03, 0xE8, 0x03, 0x1A, 0x04, 0x4C, 0x04,
                                        /* 0088 */  0x60, 0x04, 0x7E, 0x04, 0x01, 0x01, 0x33, 0x04,
                                        /* 0090 */  0x01, 0x01, 0x84, 0x03, 0x00, 0x08, 0x60, 0xEA,
                                        /* 0098 */  0x00, 0x00, 0x00, 0x40, 0x19, 0x01, 0x00, 0x01,
                                        /* 00A0 */  0x80, 0x38, 0x01, 0x00, 0x02, 0xDC, 0x4A, 0x01,
                                        /* 00A8 */  0x00, 0x03, 0x90, 0x5F, 0x01, 0x00, 0x04, 0x00,
                                        /* 00B0 */  0x77, 0x01, 0x00, 0x05, 0x90, 0x91, 0x01, 0x00,
                                        /* 00B8 */  0x06, 0x50, 0xBD, 0x01, 0x00, 0x07, 0x01, 0x08,
                                        /* 00C0 */  0xD0, 0x4C, 0x01, 0x00, 0x00, 0x00, 0x80, 0x00,
                                        /* 00C8 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x8D, 0x01,
                                        /* 00D0 */  0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 00D8 */  0x00, 0x00, 0xDC, 0xC7, 0x01, 0x00, 0x02, 0x00,
                                        /* 00E0 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x98,
                                        /* 00E8 */  0xFC, 0x01, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00,
                                        /* 00F0 */  0x00, 0x00, 0x00, 0x00, 0xD8, 0x1B, 0x02, 0x00,
                                        /* 00F8 */  0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0100 */  0x00, 0xF4, 0x40, 0x02, 0x00, 0x05, 0x00, 0x00,
                                        /* 0108 */  0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x1C, 0x64,
                                        /* 0110 */  0x02, 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x01,
                                        /* 0118 */  0x00, 0x00, 0x00, 0x68, 0x81, 0x02, 0x00, 0x07,
                                        /* 0120 */  0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
                                        /* 0128 */  0x00, 0x05, 0x60, 0xEA, 0x00, 0x00, 0x00, 0x40,
                                        /* 0130 */  0x19, 0x01, 0x00, 0x00, 0x80, 0x38, 0x01, 0x00,
                                        /* 0138 */  0x00, 0xDC, 0x4A, 0x01, 0x00, 0x00, 0x90, 0x5F,
                                        /* 0140 */  0x01, 0x00, 0x00, 0x00, 0x08, 0x28, 0x6E, 0x00,
                                        /* 0148 */  0x00, 0x00, 0x2C, 0xC9, 0x00, 0x00, 0x01, 0xF8,
                                        /* 0150 */  0x0B, 0x01, 0x00, 0x02, 0x80, 0x38, 0x01, 0x00,
                                        /* 0158 */  0x03, 0x90, 0x5F, 0x01, 0x00, 0x04, 0xF4, 0x91,
                                        /* 0160 */  0x01, 0x00, 0x05, 0xD0, 0xB0, 0x01, 0x00, 0x06,
                                        /* 0168 */  0x38, 0xC1, 0x01, 0x00, 0x07, 0x00, 0x08, 0x6C,
                                        /* 0170 */  0x39, 0x00, 0x00, 0x00, 0x24, 0x5E, 0x00, 0x00,
                                        /* 0178 */  0x01, 0xFC, 0x85, 0x00, 0x00, 0x02, 0xAC, 0xBC,
                                        /* 0180 */  0x00, 0x00, 0x03, 0x34, 0xD0, 0x00, 0x00, 0x04,
                                        /* 0188 */  0x68, 0x6E, 0x01, 0x00, 0x05, 0x08, 0x97, 0x01,
                                        /* 0190 */  0x00, 0x06, 0xB0, 0xAD, 0x01, 0x00, 0x07, 0x00,
                                        /* 0198 */  0x01, 0x68, 0x3C, 0x01, 0x00, 0x00, 0x01, 0x04,
                                        /* 01A0 */  0x3C, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50,
                                        /* 01A8 */  0xC3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x38,
                                        /* 01B0 */  0x01, 0x00, 0x02, 0x00, 0x00, 0x34, 0x98, 0x01,
                                        /* 01B8 */  0x00, 0x04, 0x00, 0x00, 0x01, 0x08, 0x00, 0x98,
                                        /* 01C0 */  0x85, 0x00, 0x00, 0x40, 0xB5, 0x00, 0x00, 0x60,
                                        /* 01C8 */  0xEA, 0x00, 0x00, 0x50, 0xC3, 0x00, 0x00, 0x01,
                                        /* 01D0 */  0x80, 0xBB, 0x00, 0x00, 0x60, 0xEA, 0x00, 0x00,
                                        /* 01D8 */  0x94, 0x0B, 0x01, 0x00, 0x50, 0xC3, 0x00, 0x00,
                                        /* 01E0 */  0x02, 0x00, 0xE1, 0x00, 0x00, 0x94, 0x0B, 0x01,
                                        /* 01E8 */  0x00, 0x40, 0x19, 0x01, 0x00, 0x50, 0xC3, 0x00,
                                        /* 01F0 */  0x00, 0x03, 0x78, 0xFF, 0x00, 0x00, 0x40, 0x19,
                                        /* 01F8 */  0x01, 0x00, 0x88, 0x26, 0x01, 0x00, 0x50, 0xC3,
                                        /* 0200 */  0x00, 0x00, 0x04, 0x40, 0x19, 0x01, 0x00, 0x80,
                                        /* 0208 */  0x38, 0x01, 0x00, 0x80, 0x38, 0x01, 0x00, 0x50,
                                        /* 0210 */  0xC3, 0x00, 0x00, 0x05, 0x80, 0x38, 0x01, 0x00,
                                        /* 0218 */  0xDC, 0x4A, 0x01, 0x00, 0xDC, 0x4A, 0x01, 0x00,
                                        /* 0220 */  0x50, 0xC3, 0x00, 0x00, 0x06, 0x00, 0x77, 0x01,
                                        /* 0228 */  0x00, 0x00, 0x77, 0x01, 0x00, 0x90, 0x5F, 0x01,
                                        /* 0230 */  0x00, 0x50, 0xC3, 0x00, 0x00, 0x07, 0x90, 0x91,
                                        /* 0238 */  0x01, 0x00, 0x90, 0x91, 0x01, 0x00, 0x00, 0x77,
                                        /* 0240 */  0x01, 0x00, 0x50, 0xC3, 0x00, 0x00, 0x01, 0x18,
                                        /* 0248 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B,
                                        /* 0250 */  0x00, 0x00, 0xBC, 0x02, 0x48, 0x26, 0x46, 0x00,
                                        /* 0258 */  0x0A, 0x00, 0x54, 0x03, 0x90, 0x01, 0x90, 0x01,
                                        /* 0260 */  0x90, 0x01, 0x90, 0x01, 0x90, 0x01, 0x90, 0x01,
                                        /* 0268 */  0x90, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
                                        /* 0270 */  0x04, 0x31, 0x07, 0x90, 0x01, 0x90, 0x01, 0x90,
                                        /* 0278 */  0x01, 0x90, 0x01, 0x00, 0x00, 0x59, 0x00, 0x69,
                                        /* 0280 */  0x00, 0x4A, 0x00, 0x4A, 0x00, 0x5F, 0x00, 0x73,
                                        /* 0288 */  0x00, 0x73, 0x00, 0x64, 0x00, 0x40, 0x00, 0x90,
                                        /* 0290 */  0x92, 0x97, 0x60, 0x96, 0x00, 0x90, 0x55, 0x00,
                                        /* 0298 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 02A0 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 02A8 */  0x02, 0x02, 0xD4, 0x30, 0x00, 0x00, 0x02, 0x10,
                                        /* 02B0 */  0x60, 0xEA, 0x00, 0x00, 0x02, 0x10    
                                    },

                                    "hda-gfx",
                                    Buffer (0x0A)
                                    {
                                        "onboard-1"
                                    },

                                    "PP_DisablePowerContainment",
                                    Buffer (One)
                                    {
                                         0x01                                  
                                    },

                                    "PP_FuzzyFanControl",
                                    Buffer (One)
                                    {
                                         0x00                                  
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }
                    }

                    Device (HDAU)
                    {
                        Name (_ADR, One)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            Store (Package (0x16)
                                {
                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                                  
                                    },

                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-1"
                                    },

                                    "layout-id",
                                    Buffer (0x04)
                                    {
                                         0x01, 0x00, 0x00, 0x00                
                                    },

                                    "name",
                                    Buffer (0x32)
                                    {
                                        "Gigabyte Radeon RX Vega 64 Gaming OC 8GB HD-Audio"
                                    },

                                    "model",
                                    Buffer (0x32)
                                    {
                                        "Gigabyte Radeon RX Vega 64 Gaming OC 8GB HD-Audio"
                                    },

                                    "device_type",
                                    Buffer (0x16)
                                    {
                                        "Multimedia Controller"
                                    },

                                    "device-id",
                                    Buffer (0x04)
                                    {
                                         0xF8, 0xAA, 0x00, 0x00                
                                    },

                                    "subsystem-id",
                                    Buffer (0x04)
                                    {
                                         0xF8, 0xAA, 0x00, 0x00                
                                    },

                                    "subsystem-vendor-id",
                                    Buffer (0x04)
                                    {
                                         0x02, 0x10, 0x00, 0x00                
                                    },

                                    "compatible",
                                    Buffer (0x0D)
                                    {
                                        "pci1002,aaf8"
                                    },

                                    "hda-gfx",
                                    Buffer (0x0A)
                                    {
                                        "onboard-1"
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }
                    }
                }
            }
        }
     


    E.9.2.3) XGBE - 10GBit NIC Implementation:

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.BR3A, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3A.H000, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR3A.D07C, DeviceObj)    // (from opcode)
    [code]

    ASUS XG-C100C AQC107 PCI Device Implementation:

    [code]
    Scope (\_SB.PCI0.BR3A)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D07C)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (XGBE)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03
                        })
                    }

                    Store (Package (0x10)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-6"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            Buffer (0x33)
                            {
                                "ASUS XG-C100C Aquantia AQC107 10-Gigabit Ethernet"
                            },

                            "model",
                            Buffer (0x11)
                            {
                                "Apple AQC107-AFW"
                            },

                            "location",
                            Buffer (0x02)
                            {
                                "1"
                            },

                            "subsystem-id",
                            Buffer (0x04)
                            {
                                 0x87, 0x01, 0x00, 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0xB1, 0x07, 0x00, 0x00
                            },

                            "subsystem-vendor-id",
                            Buffer (0x04)
                            {
                                 0x6B, 0x10, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    Intel X540-T1 PCI Device Implementation:

    Code (Text):
    Scope (\_SB.PCI0.BR3A)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D07C)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (XGBE)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03
                        })
                    }

                    Store (Package (0x10)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-6"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            Buffer (0x22)
                            {
                                "Intel X540-T1 10-Gigabit Ethernet"
                            },

                            "model",
                            Buffer (0x22)
                            {
                                "Intel X540-T1 10-Gigabit Ethernet"
                            },

                            "location",
                            Buffer (0x02)
                            {
                                "1"
                            },

                            "subsystem-id",
                            Buffer (0x04)
                            {
                                 0x0A, 0x00, 0x00, 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0x28, 0x15, 0x00, 0x00
                            },

                            "subsystem-vendor-id",
                            Buffer (0x04)
                            {
                                 0x86, 0x80, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    Small-Tree P2EI0G-2T PCI Device Implementation:

    Code (Text):
    Scope (\_SB.PCI0.BR3A)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D07C)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (XGBE)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03
                        })
                    }

                    Store (Package (0x10)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-6"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            Buffer (0x30)
                            {
                                "Small-Tree P2EI0G-2T 10-Gigabit Ethernet Port 1"
                            },

                            "model",
                            Buffer (0x29)
                            {
                                "Small-Tree P2EI0G-2T 10-Gigabit Ethernet"
                            },

                            "location",
                            Buffer (0x02)
                            {
                                "1"
                            },

                            "subsystem-id",
                            Buffer (0x04)
                            {
                                 0x0A, 0x00, 0x00, 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0x28, 0x15, 0x00, 0x00
                            },

                            "subsystem-vendor-id",
                            Buffer (0x04)
                            {
                                 0x86, 0x80, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (XGBF)
            {
                Name (_ADR, One)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03
                        })
                    }

                    Store (Package (0x10)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-6"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            Buffer (0x30)
                            {
                                "Small-Tree P2EI0G-2T 10-Gigabit Ethernet Port 2"
                            },

                            "model",
                            Buffer (0x29)
                            {
                                "Small-Tree P2EI0G-2T 10-Gigabit Ethernet"
                            },

                            "location",
                            Buffer (0x02)
                            {
                                "1"
                            },

                            "subsystem-id",
                            Buffer (0x04)
                            {
                                 0x0A, 0x00, 0x00, 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0x28, 0x15, 0x00, 0x00
                            },

                            "subsystem-vendor-id",
                            Buffer (0x04)
                            {
                                 0x86, 0x80, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    The 10-Gigabit NIC XGBE PCI implementation is mainly of cosmetic nature and valid for the NIC in Slot-6. For each PCIe Adapter and for different slot populations the XGBE PCI device implementation needs to be adopted/modified (see details above). This also states for the respective ACPI path entries "PCI0", "BR3A" and respective H000 -> D07C and D07C -> XGBE ACPI Replacements (in compliance with the iMac Pro 10GB ACPI variable nomenclature), directly performed within the SSDT-X99-10.13-iMacPro.aml. Those not employing any 10-GBit NIC in their system, can simply remove the corresponding SSDT PCI device implementation.

    E.9.2.4) ETH0 - onboard LAN Controller PCI Implementation

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.GLAN, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        Scope (\_SB.PCI0)
        {
            Scope (GLAN)
            {
                Name (_STA, Zero)  // _STA: Status
            }
            Device (ETH0)
            {
                Name (_ADR, 0x00190000)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x10)
                        {
                            "AAPL,slot-name",
                            Buffer (0x09)
                            {
                                "Built In"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            Buffer (0x2A)
                            {
                                "Intel i218-V PCI Express Gigabit Ethernet"
                            },

                            "model",
                            Buffer (0x21)
                            {
                                "Intel i218-V Ethernet Controller"
                            },

                            "location",
                            Buffer (0x02)
                            {
                                "1"
                            },

                            "subsystem-id",
                            Buffer (0x04)
                            {
                                 0xC4, 0x85, 0x00, 0x00
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0xA1, 0x15, 0x00, 0x00
                            },

                            "subsystem-vendor-id",
                            Buffer (0x04)
                            {
                                 0x43, 0x10, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
     
    Note that the ETH0 Intel i218-V Ethernet onboard LAN controller PCI implementation is of pure cosmetic nature and valid for the ASUS X99-A II or X99 mainboards with the same LAN Controller configuration. Owners of different X99 mainboards have to verify and adopt/modify the ACPI path and the PCI device implementations by means of their IOREG entries. Note the GLAN -> ETH0 ACPI replacement directly performed within the SSDT.

    E.9.2.5) SAT1 - Intel AHCI SATA Controller PCI Implementation

    DefintionBlock entry:

    Code (Text):
    External (_SB_.PCI0.SAT1, DeviceObj)    // (from opcode)
    PCI Device Implementation:

    Code (Text):

        Scope (\_SB.PCI0.SAT1)
        {
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x0C)
                    {
                        "AAPL,slot-name",
                        Buffer (0x09)
                        {
                            "Built In"
                        },

                        "built-in",
                        Buffer (One)
                        {
                             0x00                          
                        },

                        "name",
                        Buffer (0x1B)
                        {
                            "Intel SATA AHCI Controller"
                        },

                        "model",
                        Buffer (0x27)
                        {
                            "Intel X99-A II Chipset SATA Controller"
                        },

                        "device_type",
                        Buffer (0x15)
                        {
                            "AHCI SATA Controller"
                        },

                        "device-id",
                        Buffer (0x04)
                        {
                             0x02, 0x8D, 0x00, 0x00        
                        }
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
     
    The SAT1 onboard Intel AHCI SATA controller PCI device implementation is valid for the ASUS X99-A II and for all other X99 mainboards with the same AHCI SATA controller chipset.

    E.9.2.6) EVSS - Intel X99 sSata Controller PCI Implementation

    DefintionBlock entry:

    Code (Text):
    External (_SB_.PCI0.EVSS, DeviceObj)    // (from opcode)
    PCI Device Implementation:

    [code
    Scope (_SB.PCI0.EVSS)
    {
    Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
    {
    Store (Package (0x0E)
    {
    "AAPL,slot-name",
    Buffer (0x09)
    {
    "Built In"
    },

    "built-in",
    Buffer (0x05)
    {
    "0x00"
    },

    "name",
    Buffer (0x1B)
    {
    "Intel X99 sSata Controller"
    },

    "model",
    Buffer (0x28)
    {
    "Intel X99-A II Chipset sSATA Controller"
    },

    "compatible",
    Buffer (0x0D)
    {
    "pci8086,8d62"
    },

    "device_type",
    Buffer (0x10)
    {
    "AHCI Controller"
    },

    "device-id",
    Buffer (0x04)
    {
    0x62, 0x8D, 0x00, 0x00
    }
    }, Local0)
    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
    Return (Local0)
    }

    Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
    {
    0x6D,
    Zero
    })
    }
    [/code]

    The EVSS onboard Intel X99 sSATA controller PCI device implementation is valid for the ASUS X99-A II and for all other X99 mainboards with the same X99 sSATA controller chipset. Verify and adopt/modify if necessary device path "PCI0.SAT1" and PCI device implementations by means of IOREG.

    E.9.2.7) NVMe Controller PCI Implementation

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.BR1B, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR1B.D075, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.BR1B.D081, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        Scope (_SB.PCI0.BR1B)
        {
            Scope (D075)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D081)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (ANS2)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0C)
                        {
                            "AAPL,slot-name",
                            Buffer (0x09)
                            {
                                "Built In"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00  
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0x04, 0xA8, 0x00, 0x00
                            },

                            "device_type",
                            Buffer (0x17)
                            {
                                "MVM Express Controller"
                            },

                            "name",
                            Buffer (0x16)
                            {
                                "Apple NVMe Controller"
                            },

                            "model",
                            Buffer (0x13)
                            {
                                "Apple NVMe AP1024M"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x6D,
                    Zero
                })
            }
        }
     
    The current ANS2 Apple NVMe Controller PCI implementation is of purely cosmetic nature and is valid for the ASUS X99-A II. Note ACPI Replacements D075 -> D081 and D081 -> ANS2 directly within the SSDT, in concordance with the respective SMBIOS iMacPro1,1 variable naming!

    E.9.2.8) - USBX:

    PCI Device Implementation:

    Code (Text):

    Device (_SB.USBX)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                If (LNot (Arg2))
                {
                    Return (Buffer (One)
                    {
                         0x03  
                    })
                }

                Return (Package (0x08)
                {
                    "kUSBSleepPortCurrentLimit",
                    0x0834,
                    "kUSBSleepPowerSupply",
                    0x13EC,
                    "kUSBWakePortCurrentLimit",
                    0x0834,
                    "kUSBWakePowerSupply",
                    0x13EC
                })
            }
        }
     
    When using the XHCI device name for USB (see the XHCI PCI Device Implementation below), one observes a bunch of USB Power Errors when booting the system. The USBX PCI device implementation fixes this errors.


    E.9.2.9) XHCI - onboard Extended Host Controller Interface (XHCI) PCI Implementation

    DefintionBlock entry:

    Code (Text):
    External (_SB_.PCI0.XHCI, DeviceObj)    // (from opcode)
    PCI Device Implementation:

    Code (Text):

        Scope (\_SB.PCI0.XHCI)
        {
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x1B)
                    {
                        "AAPL,slot-name",
                        Buffer (0x09)
                        {
                            "Built In"
                        },

                        "built-in",
                        Buffer (One)
                        {
                             0x00                          
                        },

                        "device-id",
                        Buffer (0x04)
                        {
                             0x31, 0x8D, 0x00, 0x00        
                        },

                        "name",
                        Buffer (0x34)
                        {
                            "Intel XHC USB Controller"
                        },

                        "model",
                        Buffer (0x2F)
                        {
                            "Intel X99-A II Chipset XHC USB Host Controller"
                        },

                        "AAPL,current-available",
                        0x0834,
                        "AAPL,current-extra",
                        0x0A8C,
                        "AAPL,current-in-sleep",
                        0x0A8C,
                        "AAPL,max-port-current-in-sleep",
                        0x0834,
                        "AAPL,device-internal",
                        Zero,
                        "AAPL,clock-id",
                        Buffer (One)
                        {
                             0x01                          
                        },

                        "AAPL,root-hub-depth",
                        0x1A,
                        "AAPL,XHC-clock-id",
                        One,
                        Buffer (One)
                        {
                             0x00                          
                        }
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
     
    The XHCI USB3.0 PCI device implementation is valid for the ASUS X99_A II and for all other X99 mainboards with the same XHCI controller chipset. Verify and adopt/modify if necessary device path "PCI0.XHCI" and PCI device implementations by means of IOREG.


    E.9.2.10) ASMedia ASM1142 USB 3.1 Controller PCI Implementation

    DefintionBlock entry:

    Code (Text):

        External (_SB_.PCI0.RP05, DeviceObj)    // (from opcode)
        External (_SB_.PCI0.RP05.D07D, DeviceObj)    // (from opcode)
        External (_SB_.PCI0.RP05.D082, DeviceObj)    // (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        Scope (_SB.PCI0.RP05)
        {
            Scope (D07D)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D082)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (XHC3)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03  
                        })
                    }

                    Store (Package (0x0A)
                        {
                            "AAPL,slot-name",
                            Buffer (0x09)
                            {
                                "Built In"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00  
                            },

                            "device-id",
                            Buffer (0x04)
                            {
                                 0x42, 0x12, 0x00, 0x00
                            },

                            "name",
                            Buffer (0x1B)
                            {
                                "ASMedia USB 3.1 Controller"
                            },

                            "model",
                            Buffer (0x28)
                            {
                                "ASMedia ASM1142 USB 3.1 Type-A & Type-C"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x6D,
                    Zero
                })
            }
        }
     
    The ASMedia ASM1142 USB 3.1 onboard Intel AHCI SATA controller PCI device implementation is valid for the ASUS X99-A II and for all other X99 mainboards with the same XHC USB3.1 controller ASMedia ASM1142 chipset configuration. Note the D07D -> D082 and D082 -> XHC3 ACPI replacements directly within the SSDT!

    E.9.2.11) ARPT - OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI Implementation:

    DefintionBlock entry:

    Code (Text):

    External (_SB_.PCI0.RP07, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.RP07.ARPT, DeviceObj)    // (from opcode)
     

    PCI Device Implementation:

    Code (Text):

        Scope (_SB.PCI0.RP07)
        {
            Device (ARPT)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (0x04)
                        {
                             0x03  
                        })
                    }

                    Store (Package (0x0C)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-5"
                            },

                            "built-in",
                            Buffer (One)
                            {
                                 0x00  
                            },

                            "device_type",
                            Buffer (0x13)
                            {
                                "AirPort Controller"
                            },

                            "model",
                            Buffer (0x4A)
                            {
                                "OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 Controller"
                            },

                            "compatible",
                            Buffer (0x0D)
                            {
                                "pci14e4,43a0"
                            },

                            "name",
                            Buffer (0x10)
                            {
                                "AirPort Extreme"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }

                Name (_PRW, Package (0x02)  // _PRW: Power Resources for Wake
                {
                    0x6D,
                    Zero
                })
            }
        }
     
    The ARPT OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI device implementation is of pure cosmetic nature and only valid for users of the latter WIFI/Bluetooth PCIe Adapter in PCIe Slot 5. Users of this PCIe Adapter within a PCIe slot population different from PCIe Slot 5 have to adapt/modify the respective device path. Users of the Asus X99-A II onboard Bluetooth chipset controller or with a completely different WIFI/Bluetooth configuration have to adopt the entire Airport PCI implementation by means of IOREG.

    E.9.2.12) DTGP Method:

    Code (Text):
    Method (DTGP, 5, NotSerialized)
        {
            If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b")))
            {
                If (LEqual (Arg1, One))
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Store (Buffer (One)
                            {
                                 0x03
                            }, Arg4)
                        Return (One)
                    }

                    If (LEqual (Arg2, One))
                    {
                        Return (One)
                    }
                }
            }

            Store (Buffer (One)
                {
                     0x00
                }, Arg4)
            Return (Zero)
        }
     
    The DTG Method Implementation is required for SSDT functionality and has not to be modified or adopted in any case.

    E.9.2.13) - Debugging Sleep Issues

    For debugging sleep issues as proposed by Pike Alpha, one can add SSDT-SLEEP.aml to /EFI/CLOVER/ACPI/patched and follow Pike's comment and advices provided at https://pikeralpha.wordpress.com/2017/01/12/debugging-sleep-issues/


    E.9.3) SSDT-X99-TB3-iMacPro.aml PCI Device Implementation

    The current Thunderbolt PCI device implementation SSDT-X99-TB3-iMacPro.aml is has been kept as close as possible to the SSDT-9.aml of @TheOfficialGypsy 's iMac Pro dumb. It also contains implementations mainly developed by @apfelnico and @nmano, but also @mork vom Ork, @Matthew82, @maleorderbride and @TheRacerMaster.

    It is valid for both, the ASUS TBEX 3 and Gigabyte Alpine Ridge and allows for TB and XHC USB sleep/wake functionality with the THB_C cable plugged/unplugged to the thunderbolt onboard header of the ASUS X99-A II. While XHC USB hot plug seems to work fine within this configuration, TB hot plug seems to require the removal of the THB_C cable. Thank's to @crismac2013 and @LeleTuratti for their findings!

    >>> https://youtu.be/Jakp5dCoFvY <<<


    Users of this PCIe Adapter within a PCIe slot population different from PCIe Slot 4 have to adapt/modify the respective SL01, H000, D07F and UPSB ACPI Replacements, directly performed within the SSDT.

    DefintionBlock entry:

    Code (Text):

        External (_SB_.PCI0, DeviceObj)    // (from opcode)
        External (_SB_.PCI0.BR2A, DeviceObj)    // (from opcode)
        External (_SB_.PCI0.BR2A.D07F, DeviceObj)    // (from opcode)
        External (_SB_.PCI0.BR2A.H000, DeviceObj)    // (from opcode)
        External (AG16, MethodObj)    // 0 Arguments (from opcode)
        External (DTGP, MethodObj)    // 5 Arguments (from opcode)
        External (IO80, UnknownObj)    // (from opcode)
        External (PG16, MethodObj)    // 0 Arguments (from opcode)
        External (PICM, MethodObj)    // 0 Arguments (from opcode)
     
    PCI Device Implementation:

    Code (Text):

        OperationRegion (GNVS, SystemMemory, 0x4FEE6918, 0x0403)
        Field (GNVS, AnyAcc, Lock, Preserve)
        {
            OSYS,   16
        }

        Method (OSDW, 0, NotSerialized)
        {
            If (LEqual (OSYS, 0x2710))
            {
                Return (One)
            }
            Else
            {
                Return (Zero)
            }
        }

        Method (PINI, 0, NotSerialized)
        {
            Store (0x07DC, OSYS)
            If (XOSI ("Darwin"))
            {
                Store (0x2710, OSYS)
            }
            ElseIf (XOSI ("Linux"))
            {
                Store (0x03E8, OSYS)
            }
            ElseIf (XOSI ("Windows 2009"))
            {
                Store (0x07D9, OSYS)
            }
            ElseIf (XOSI ("Windows 2012"))
            {
                Store (0x07DC, OSYS)
            }
            Else
            {
                Store (0x07DC, OSYS)
            }
        }

        Method (XOSI, 1, NotSerialized)
        {
            Store (Package (0x0E)
                {
                    "Darwin",
                    "Linux",
                    "Windows",
                    "Windows 2001",
                    "Windows 2001 SP2",
                    "Windows 2001.1",
                    "Windows 2001.1 SP1",
                    "Windows 2006",
                    "Windows 2006 SP1",
                    "Windows 2006.1",
                    "Windows 2009",
                    "Windows 2012",
                    "Windows 2013",
                    "Windows 2015"
                }, Local0)
            Return (LNotEqual (Ones, Match (Local0, MEQ, Arg0, MTR, Zero, Zero)))
        }

        Scope (_SB.PCI0.BR2A)
        {
            Scope (H000)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Scope (D07F)
            {
                Name (_STA, Zero)  // _STA: Status
            }

            Device (UPSB)
            {
                Name (_ADR, Zero)  // _ADR: Address
                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                Field (A1E0, ByteAcc, NoLock, Preserve)
                {
                    AVND,   32,
                    BMIE,   3,
                    Offset (0x18),
                    PRIB,   8,
                    SECB,   8,
                    SUBB,   8,
                    Offset (0x1E),
                        ,   13,
                    MABT,   1
                }

                OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
                Field (A1E1, ByteAcc, NoLock, Preserve)
                {
                    Offset (0x01),
                    Offset (0x02),
                    Offset (0x04),
                    Offset (0x08),
                    Offset (0x0A),
                        ,   5,
                    TPEN,   1,
                    Offset (0x0C),
                    SSPD,   4,
                        ,   16,
                    LACR,   1,
                    Offset (0x10),
                        ,   4,
                    LDIS,   1,
                    LRTN,   1,
                    Offset (0x12),
                    CSPD,   4,
                    CWDT,   6,
                        ,   1,
                    LTRN,   1,
                        ,   1,
                    LACT,   1,
                    Offset (0x14),
                    Offset (0x30),
                    TSPD,   4
                }

                OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
                Field (A1E2, ByteAcc, NoLock, Preserve)
                {
                    Offset (0x01),
                    Offset (0x02),
                    Offset (0x04),
                    PSTA,   2
                }

                Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                {
                    Return (SECB)
                }

                Method (_STA, 0, NotSerialized)  // _STA: Status
                {
                    Return (0x0F)
                }

                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (One)
                }

                Device (DSB0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Name (_SUN, 0x04)  // _SUN: Slot User Number
                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                    Field (A1E0, ByteAcc, NoLock, Preserve)
                    {
                        AVND,   32,
                        BMIE,   3,
                        Offset (0x18),
                        PRIB,   8,
                        SECB,   8,
                        SUBB,   8,
                        Offset (0x1E),
                            ,   13,
                        MABT,   1
                    }

                    OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
                    Field (A1E1, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x01),
                        Offset (0x02),
                        Offset (0x04),
                        Offset (0x08),
                        Offset (0x0A),
                            ,   5,
                        TPEN,   1,
                        Offset (0x0C),
                        SSPD,   4,
                            ,   16,
                        LACR,   1,
                        Offset (0x10),
                            ,   4,
                        LDIS,   1,
                        LRTN,   1,
                        Offset (0x12),
                        CSPD,   4,
                        CWDT,   6,
                            ,   1,
                        LTRN,   1,
                            ,   1,
                        LACT,   1,
                        Offset (0x14),
                        Offset (0x30),
                        TSPD,   4
                    }

                    OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
                    Field (A1E2, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x01),
                        Offset (0x02),
                        Offset (0x04),
                        PSTA,   2
                    }

                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                    {
                        Return (SECB)
                    }

                    Method (_STA, 0, NotSerialized)  // _STA: Status
                    {
                        Return (0x0F)
                    }

                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (One)
                    }

                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        If (LNot (Arg2))
                        {
                            Return (Buffer (One)
                            {
                                 0x03                                      
                            })
                        }

                        Return (Package (0x02)
                        {
                            "PCIHotplugCapable",
                            One
                        })
                    }

                    Device (NHI0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        Name (_STR, Unicode ("Thunderbolt"))  // _STR: Description String
                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                        {
                            Return (Zero)
                        }

                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            If (LEqual (Arg2, Zero))
                            {
                                Return (Buffer (One)
                                {
                                     0x03                                      
                                })
                            }

                            Store (Package (0x13)
                                {
                                    "AAPL,slot-name",
                                    Buffer (0x07)
                                    {
                                        "Slot-4"
                                    },

                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                                      
                                    },

                                    "device_type",
                                    Buffer (0x19)
                                    {
                                        "Thunderbolt 3 Controller"
                                    },

                                    "model",
                                    Buffer (0x20)
                                    {
                                        "Intel DSL6540 Thunderbolt 3 NHI"
                                    },

                                    "name",
                                    Buffer (0x25)
                                    {
                                        "Intel DSL6540 Thunderbolt Controller"
                                    },

                                    "pathcr",
                                    Buffer (One)
                                    {
                                        /* 0000 */  0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0008 */  0x00, 0x00, 0x07, 0x00, 0x10, 0x00, 0x10, 0x00,
                                        /* 0010 */  0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0018 */  0x00, 0x00, 0x07, 0x00, 0x10, 0x00, 0x10, 0x00,
                                        /* 0020 */  0x01, 0x00, 0x00, 0x00, 0x05, 0x00, 0x0E, 0x00,
                                        /* 0028 */  0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0030 */  0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0038 */  0x00, 0x00, 0x02, 0x00, 0x02, 0x00, 0x01, 0x00,
                                        /* 0040 */  0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0048 */  0x00, 0x00, 0x07, 0x00, 0x02, 0x00, 0x01, 0x00
                                    },

                                    "ThunderboltDROM",
                                    Buffer (One)
                                    {
                                        /* 0000 */  0x6D, 0x01, 0xC5, 0x49, 0xD5, 0x3E, 0x21, 0x01,
                                        /* 0008 */  0x00, 0x04, 0xCE, 0x8D, 0x61, 0x01, 0x5E, 0x00,
                                        /* 0010 */  0x01, 0x00, 0x0C, 0x00, 0x01, 0x00, 0x08, 0x81,
                                        /* 0018 */  0x81, 0x02, 0x81, 0x00, 0x00, 0x00, 0x08, 0x82,
                                        /* 0020 */  0x91, 0x01, 0x81, 0x00, 0x00, 0x00, 0x08, 0x83,
                                        /* 0028 */  0x81, 0x04, 0x81, 0x01, 0x00, 0x00, 0x08, 0x84,
                                        /* 0030 */  0x91, 0x03, 0x81, 0x01, 0x00, 0x00, 0x08, 0x85,
                                        /* 0038 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x86,
                                        /* 0040 */  0x20, 0x03, 0x87, 0x80, 0x02, 0xC8, 0x05, 0x89,
                                        /* 0048 */  0x50, 0x00, 0x00, 0x05, 0x8A, 0x50, 0x00, 0x00,
                                        /* 0050 */  0x02, 0xCB, 0x0D, 0x01, 0x41, 0x70, 0x70, 0x6C,
                                        /* 0058 */  0x65, 0x20, 0x49, 0x6E, 0x63, 0x2E, 0x00, 0x0C,
                                        /* 0060 */  0x02, 0x4D, 0x61, 0x63, 0x69, 0x6E, 0x74, 0x6F,
                                        /* 0068 */  0x73, 0x68, 0x00                          
                                    },

                                    "ThunderboltConfig",
                                    Buffer (One)
                                    {
                                        /* 0000 */  0x01, 0x02, 0xFF, 0xFF, 0x04, 0x00, 0x03, 0x01,
                                        /* 0008 */  0x01, 0x00, 0x04, 0x00, 0x05, 0x01, 0x02, 0x00,
                                        /* 0010 */  0x03, 0x00, 0x03, 0x01, 0x01, 0x00, 0x01, 0x00,
                                        /* 0018 */  0x03, 0x01, 0x02, 0x00, 0x04, 0x00, 0x03, 0x00
                                    },

                                    "power-save",
                                    One,
                                    Buffer (One)
                                    {
                                         0x00                                      
                                    }
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }

                        Return (Zero)
                    }
                }

                Device (DSB1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Name (_SUN, 0x04)  // _SUN: Slot User Number
                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                    Field (A1E0, ByteAcc, NoLock, Preserve)
                    {
                        AVND,   32,
                        BMIE,   3,
                        Offset (0x18),
                        PRIB,   8,
                        SECB,   8,
                        SUBB,   8,
                        Offset (0x1E),
                            ,   13,
                        MABT,   1
                    }

                    OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
                    Field (A1E1, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x01),
                        Offset (0x02),
                        Offset (0x04),
                        Offset (0x08),
                        Offset (0x0A),
                            ,   5,
                        TPEN,   1,
                        Offset (0x0C),
                        SSPD,   4,
                            ,   16,
                        LACR,   1,
                        Offset (0x10),
                            ,   4,
                        LDIS,   1,
                        LRTN,   1,
                        Offset (0x12),
                        CSPD,   4,
                        CWDT,   6,
                            ,   1,
                        LTRN,   1,
                            ,   1,
                        LACT,   1,
                        Offset (0x14),
                        Offset (0x30),
                        TSPD,   4
                    }

                    OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
                    Field (A1E2, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x01),
                        Offset (0x02),
                        Offset (0x04),
                        PSTA,   2
                    }

                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                    {
                        Return (SECB)
                    }

                    Method (_STA, 0, NotSerialized)  // _STA: Status
                    {
                        Return (0x0F)
                    }

                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }

                    Device (UPS0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                        Field (ARE0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   16
                        }

                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                        {
                            If (OSDW ())
                            {
                                Return (One)
                            }

                            Return (Zero)
                        }

                        Device (DSB0)
                        {
                            Name (_ADR, Zero)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1,
                                Offset (0x3E),
                                    ,   6,
                                SBRS,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }

                            Device (DEV0)
                            {
                                Name (_ADR, Zero)  // _ADR: Address
                                Method (_STA, 0, NotSerialized)  // _STA: Status
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                {
                                    If (OSDW ())
                                    {
                                        Return (One)
                                    }

                                    Return (Zero)
                                }
                            }
                        }

                        Device (DSB3)
                        {
                            Name (_ADR, 0x00030000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }

                            Device (UPS0)
                            {
                                Name (_ADR, Zero)  // _ADR: Address
                                OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                                Field (ARE0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   16
                                }

                                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                {
                                    If (OSDW ())
                                    {
                                        Return (One)
                                    }

                                    Return (Zero)
                                }

                                Device (DSB0)
                                {
                                    Name (_ADR, Zero)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1,
                                        Offset (0x3E),
                                            ,   6,
                                        SBRS,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }
                                    }
                                }

                                Device (DSB3)
                                {
                                    Name (_ADR, 0x00030000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB4)
                                {
                                    Name (_ADR, 0x00040000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB5)
                                {
                                    Name (_ADR, 0x00050000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }

                                Device (DSB6)
                                {
                                    Name (_ADR, 0x00060000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }
                            }
                        }

                        Device (DSB4)
                        {
                            Name (_ADR, 0x00040000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }

                            Device (UPS0)
                            {
                                Name (_ADR, Zero)  // _ADR: Address
                                OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                                Field (ARE0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   16
                                }

                                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                {
                                    If (OSDW ())
                                    {
                                        Return (One)
                                    }

                                    Return (Zero)
                                }

                                Device (DSB0)
                                {
                                    Name (_ADR, Zero)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1,
                                        Offset (0x3E),
                                            ,   6,
                                        SBRS,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB3)
                                {
                                    Name (_ADR, 0x00030000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB4)
                                {
                                    Name (_ADR, 0x00040000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB5)
                                {
                                    Name (_ADR, 0x00050000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }

                                Device (DSB6)
                                {
                                    Name (_ADR, 0x00060000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }
                            }
                        }

                        Device (DSB5)
                        {
                            Name (_ADR, 0x00050000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }
                        }

                        Device (DSB6)
                        {
                            Name (_ADR, 0x00060000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }
                        }
                    }
                }

                Device (DSB2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    OperationRegion (PXCS, PCI_Config, Zero, 0xE0)
                    Field (PXCS, AnyAcc, NoLock, Preserve)
                    {
                        VDID,   32,
                        Offset (0x54),
                            ,   6,
                        HPCE,   1,
                        Offset (0x5A),
                        ABPX,   1,
                            ,   2,
                        PDCX,   1,
                            ,   2,
                        PDSX,   1,
                        Offset (0x5B),
                        Offset (0x60),
                        Offset (0x62),
                        PMEX,   1,
                        Offset (0xDC),
                            ,   31,
                        PMCS,   1
                    }

                    Method (DEVS, 0, NotSerialized)
                    {
                        If (LEqual (VDID, Ones))
                        {
                            Return (Zero)
                        }
                        Else
                        {
                            Return (0x0F)
                        }
                    }

                    Method (HPME, 0, Serialized)
                    {
                        If (PMEX)
                        {
                            Store (0xC8, Local0)
                            While (Local0)
                            {
                                Store (One, PMEX)
                                If (PMEX)
                                {
                                    Decrement (Local0)
                                }
                                Else
                                {
                                    Store (Zero, Local0)
                                }
                            }

                            Store (One, PMCS)
                        }
                    }

                    Method (_PRT, 0, NotSerialized)  // _PRT: PCI Routing Table
                    {
                        If (PICM ())
                        {
                            Return (AG16 ())
                        }

                        Return (PG16 ())
                    }

                    Device (XHC5)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                        {
                            If (LEqual (Arg2, Zero))
                            {
                                Return (Buffer (One)
                                {
                                     0x03                                      
                                })
                            }

                            Store (Package (0x10)
                                {
                                    "AAPL,slot-name",
                                    Buffer (0x0C)
                                    {
                                        "Slot-4"
                                    },

                                    "built-in",
                                    Buffer (One)
                                    {
                                         0x00                                      
                                    },

                                    "model",
                                    Buffer (0x2A)
                                    {
                                        "Intel DSL6540 XHC USB 3.1 Type-C (Type-A)"
                                    },

                                    "name",
                                    Buffer (0x25)
                                    {
                                        "Intel DSL6540 XHC USB 3.1 Controller"
                                    },

                                    "device_type",
                                    Buffer (0x13)
                                    {
                                        "USB 3.1 Controller"
                                    },

                                    "USBBusNumber",
                                    Zero,
                                    "UsbCompanionControllerPresent",
                                    One,
                                    "AAPL,XHCI-clock-id",
                                    One
                                }, Local0)
                            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                            Return (Local0)
                        }

                        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
                        {
                            Return (Package (0x02)
                            {
                                0x6D,
                                Zero
                            })
                        }

                        Device (RHUB)
                        {
                            Name (_ADR, Zero)  // _ADR: Address
                            Device (SSP1)
                            {
                                Name (_ADR, One)  // _ADR: Address
                                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                                {
                                    0xFF,
                                    0x09,
                                    Zero,
                                    Zero
                                })
                                Name (_PLD, Package (0x01)  // _PLD: Physical Location of Device
                                {
                                    Buffer (0x10)
                                    {
                                        /* 0000 */  0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0008 */  0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                                    }
                                })
                                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                                {
                                    If (LEqual (Arg2, Zero))
                                    {
                                        Return (Buffer (One)
                                        {
                                             0x03                                      
                                        })
                                    }

                                    Return (Package (0x02)
                                    {
                                        "UsbCPortNumber",
                                        One
                                    })
                                }
                            }

                            Device (SSP2)
                            {
                                Name (_ADR, 0x02)  // _ADR: Address
                                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                                {
                                    0xFF,
                                    0x09,
                                    Zero,
                                    Zero
                                })
                                Name (_PLD, Package (0x01)  // _PLD: Physical Location of Device
                                {
                                    Buffer (0x10)
                                    {
                                        /* 0000 */  0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0008 */  0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                                    }
                                })
                                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                                {
                                    If (LEqual (Arg2, Zero))
                                    {
                                        Return (Buffer (One)
                                        {
                                             0x03                                      
                                        })
                                    }

                                    Return (Package (0x02)
                                    {
                                        "UsbCPortNumber",
                                        0x02
                                    })
                                }
                            }

                            Device (HS01)
                            {
                                Name (_ADR, 0x03)  // _ADR: Address
                                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                                {
                                    0xFF,
                                    0x09,
                                    Zero,
                                    Zero
                                })
                                Name (_PLD, Package (0x01)  // _PLD: Physical Location of Device
                                {
                                    Buffer (0x10)
                                    {
                                        /* 0000 */  0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0008 */  0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                                    }
                                })
                            }

                            Device (HS02)
                            {
                                Name (_ADR, 0x04)  // _ADR: Address
                                Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
                                {
                                    0xFF,
                                    0x09,
                                    Zero,
                                    Zero
                                })
                                Name (_PLD, Package (0x01)  // _PLD: Physical Location of Device
                                {
                                    Buffer (0x10)
                                    {
                                        /* 0000 */  0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                        /* 0008 */  0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                                    }
                                })
                            }
                        }
                    }
                }

                Device (DSB4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Name (_SUN, 0x04)  // _SUN: Slot User Number
                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                    Field (A1E0, ByteAcc, NoLock, Preserve)
                    {
                        AVND,   32,
                        BMIE,   3,
                        Offset (0x18),
                        PRIB,   8,
                        SECB,   8,
                        SUBB,   8,
                        Offset (0x1E),
                            ,   13,
                        MABT,   1
                    }

                    OperationRegion (A1E1, PCI_Config, 0xC0, 0x40)
                    Field (A1E1, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x01),
                        Offset (0x02),
                        Offset (0x04),
                        Offset (0x08),
                        Offset (0x0A),
                            ,   5,
                        TPEN,   1,
                        Offset (0x0C),
                        SSPD,   4,
                            ,   16,
                        LACR,   1,
                        Offset (0x10),
                            ,   4,
                        LDIS,   1,
                        LRTN,   1,
                        Offset (0x12),
                        CSPD,   4,
                        CWDT,   6,
                            ,   1,
                        LTRN,   1,
                            ,   1,
                        LACT,   1,
                        Offset (0x14),
                        Offset (0x30),
                        TSPD,   4
                    }

                    OperationRegion (A1E2, PCI_Config, 0x80, 0x08)
                    Field (A1E2, ByteAcc, NoLock, Preserve)
                    {
                        Offset (0x01),
                        Offset (0x02),
                        Offset (0x04),
                        PSTA,   2
                    }

                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                    {
                        Return (SECB)
                    }

                    Method (_STA, 0, NotSerialized)  // _STA: Status
                    {
                        Return (0x0F)
                    }

                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }

                    Device (UPS0)
                    {
                        Name (_ADR, Zero)  // _ADR: Address
                        OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                        Field (ARE0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   16
                        }

                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                        {
                            If (OSDW ())
                            {
                                Return (One)
                            }

                            Return (Zero)
                        }

                        Device (DSB0)
                        {
                            Name (_ADR, Zero)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1,
                                Offset (0x3E),
                                    ,   6,
                                SBRS,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }

                            Device (DEV0)
                            {
                                Name (_ADR, Zero)  // _ADR: Address
                                Method (_STA, 0, NotSerialized)  // _STA: Status
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                {
                                    If (OSDW ())
                                    {
                                        Return (One)
                                    }

                                    Return (Zero)
                                }
                            }
                        }

                        Device (DSB3)
                        {
                            Name (_ADR, 0x00030000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }

                            Device (UPS0)
                            {
                                Name (_ADR, Zero)  // _ADR: Address
                                OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                                Field (ARE0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   16
                                }

                                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                {
                                    If (OSDW ())
                                    {
                                        Return (One)
                                    }

                                    Return (Zero)
                                }

                                Device (DSB0)
                                {
                                    Name (_ADR, Zero)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1,
                                        Offset (0x3E),
                                            ,   6,
                                        SBRS,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }
                                    }
                                }

                                Device (DSB3)
                                {
                                    Name (_ADR, 0x00030000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB4)
                                {
                                    Name (_ADR, 0x00040000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB5)
                                {
                                    Name (_ADR, 0x00050000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }

                                Device (DSB6)
                                {
                                    Name (_ADR, 0x00060000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }
                            }
                        }

                        Device (DSB4)
                        {
                            Name (_ADR, 0x00040000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }

                            Device (UPS0)
                            {
                                Name (_ADR, Zero)  // _ADR: Address
                                OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                                Field (ARE0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   16
                                }

                                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                {
                                    If (OSDW ())
                                    {
                                        Return (One)
                                    }

                                    Return (Zero)
                                }

                                Device (DSB0)
                                {
                                    Name (_ADR, Zero)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1,
                                        Offset (0x3E),
                                            ,   6,
                                        SBRS,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB3)
                                {
                                    Name (_ADR, 0x00030000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB4)
                                {
                                    Name (_ADR, 0x00040000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }

                                    Device (DEV0)
                                    {
                                        Name (_ADR, Zero)  // _ADR: Address
                                        Method (_STA, 0, NotSerialized)  // _STA: Status
                                        {
                                            Return (0x0F)
                                        }

                                        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                        {
                                            If (OSDW ())
                                            {
                                                Return (One)
                                            }

                                            Return (Zero)
                                        }
                                    }
                                }

                                Device (DSB5)
                                {
                                    Name (_ADR, 0x00050000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }

                                Device (DSB6)
                                {
                                    Name (_ADR, 0x00060000)  // _ADR: Address
                                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                    Field (A1E0, ByteAcc, NoLock, Preserve)
                                    {
                                        AVND,   32,
                                        BMIE,   3,
                                        Offset (0x18),
                                        PRIB,   8,
                                        SECB,   8,
                                        SUBB,   8,
                                        Offset (0x1E),
                                            ,   13,
                                        MABT,   1
                                    }

                                    Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                                    {
                                        Return (SECB)
                                    }

                                    Method (_STA, 0, NotSerialized)  // _STA: Status
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                                    {
                                        If (OSDW ())
                                        {
                                            Return (One)
                                        }

                                        Return (Zero)
                                    }
                                }
                            }
                        }

                        Device (DSB5)
                        {
                            Name (_ADR, 0x00050000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }
                        }

                        Device (DSB6)
                        {
                            Name (_ADR, 0x00060000)  // _ADR: Address
                            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                            Field (A1E0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   32,
                                BMIE,   3,
                                Offset (0x18),
                                PRIB,   8,
                                SECB,   8,
                                SUBB,   8,
                                Offset (0x1E),
                                    ,   13,
                                MABT,   1
                            }

                            Method (_BBN, 0, NotSerialized)  // _BBN: BIOS Bus Number
                            {
                                Return (SECB)
                            }

                            Method (_STA, 0, NotSerialized)  // _STA: Status
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                            {
                                If (OSDW ())
                                {
                                    Return (One)
                                }

                                Return (Zero)
                            }
                        }
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LNot (Arg2))
                    {
                        Return (Buffer (One)
                        {
                             0x03                                      
                        })
                    }

                    Return (Package (0x02)
                    {
                        "PCI-Thunderbolt",
                        One
                    })
                }
            }
        }
     
    Thanks to @nmano we now also have an additional SSDT, i.e. SSDT-TB3-BR2A-XHC5-HPME.aml, which should be implemented in /EFI/Clover/ACPI/patches and fixes further TB ACPI dependencies. This SSDT will permanently load the TB NHI0 and XHC USB PCI drivers, even in case that no TB devices are connected. Apparently it also resolves some TB sleep/wake issues.

    Note that both SSDT and DSDT patch are slot-dependend! With the TBEX 3 or Alpine Ridge in a PCIe slot different from PCIe Slot-4, one needs to adopt both SSDT and DSDT patch in concordance with IOREG.


    E.10) System Overview CPU Cosmetics

    As our Broadwell-E/EP (Haswell-E/EP) CPU is not properly or fully recognised by OS X, Apple's System Overview ("About This Mac") reveals incomplete or simply wrong CPU details.

    Overview-X99-10.13.1-old.png

    I recently discovered on InsanelyMac a sophisticated fix of pure cosmetic nature developed by Shaneee (also thanks to fabiosun for pointing me to this direction), which allows to implement those CPU details you want to be implemented. For the sake of simplicity, I summarise below the necessary steps.

    1.) Open a terminal and use the following commands:

    Code (Text):
    cp /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings ~/Desktop/
    Code (Text):
    sudo mv /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings-Backup
    2.) Open "AppleSystemInfo.strings" on your Desktop with TextWrangler and change

    Code (Text):
    <key>UnknownCPUKind</key>
    <string>Unknown</string>
    to what ever you want. In my case I choose:

    Code (Text):
    <key>UnknownCPUKind</key>
    <string>4.4 Ghz 10-core 20-thread Broadwell-E i7-6950X</string>
    Save "AppleSystemInfo.strings"

    3.) Run the following terminal commands:

    Code (Text):
    sudo codesign -f -s - ~/Desktop/AppleSystemInfo.strings
    Code (Text):
    sudo cp ~/Desktop/AppleSystemInfo.strings /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/
    and reboot your system.

    4.) Open your config.plist with Clover Configurator and in Section "CPU" set "Type" to "Unknown". Save the config.plist and reboot.

    5.) Apple's System Overview now will reveal the following details:

    Overview.png


    As fall back option enter the following terminal commands:

    Code (Text):
    sudo rm /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings
    Code (Text):
    sudo mv /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings-Backup /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.string
    and reboot.

    E.11) iMac Pro Boot Splash Screen Cosmetics

    Based on the ideas and instructions of @Matthew82 from InsanelyMac, I achieved an iMacPro ASUS Boot Splash Screen

    ASUS-Splash-Screen.png

    by means of the following procedure:

    1.) Installation of the BREW distribution (if not already performed in Section B.1):

    a.) Open a terminal and change to "bash" shell.

    Code (Text):
    bash
    b.) Now enter the following "bash" terminal command and follow the standard BREW installation instructions:

    Code (Text):
    /usr/bin/ruby -e "$(curl -fsSL https://raw.githubusercontent.com/Homebrew/install/master/install)"

    2.) After the successful installation of the BREW distribution, we have to implement the QT5 distribution, again by using a "bash" terminal shell. If not already performed in Section B1.), just enter the following "bash" terminal commands:

    Code (Text):
    brew install qt5
    Code (Text):
    brew link qt5 --force
    3.) After successfully implementing BREW and QT5 and if not already performed in Section B.1), we can now download the most actual CodeRush UEFIPatch distribution from Github to our home directory with the following terminal command:

    Code (Text):
    git clone https://github.com/LongSoft/UEFITool
    4.) Now compile the UEFI Tool distribution with the following terminal commands:

    Code (Text):
    cd /UEFITools/
    qmake uefitool.pro
    make
    5.) Download and unzip iMacPro.raw.zip to your Desktop.

    6.) Now launch by UEFITool by clicking on the newly compiled UEFITool.app in the UEFITools Folder in your home directory.

    a.) Select "File" -> "Open image file" and load your patched or unpatched BIOS Firmware distribution.

    Select "Search.." in the UEFITool "Edit" Menu and perform a "GUID" search of "7BB28B99-61BB-11D5-9A5D-0090273FC14D" with "Header only"...

    Guid-Search.png

    You will receive a message "GUID pattern "7BB28B99-61BB-11D5-9A5D-0090273FC14D" found as .... in 7BB28B99-....". Double click on that message and search for the "Raw section" accompanying the "7BB28B99-...." entry, which indeed is the Boot Image, which you can easily verify by extracting the raw section body (right-click on "Raw section" and select "Extract body") to your Desktop and by subsequently opening the extracted raw-file directly with Apple's "Preview.app" (right-click an the raw file and select "Open with.." -> Preview.app).

    b.) To exchange the default original ASUS Boot Logo image file stored in "Raw Section" by the iMacPro.raw image file that you previously downloaded to your Desktop, right-click again on "Raw section", select this time "Replace body" and select the iMacPro.raw image file on your Desktop.

    UefiTool.png

    Note that the actual image dimension of iMacPro.raw (2131pix x 1457pix) was adopted for its use on my 38" LG 38UC99. For monitors with reduce screen resolution, iMacPro.raw might have to be adopted to an image dimension that suites your particular screen resolution, before its upload to "Raw section". If the Boot Logo image dimension is too big for your Monitor's screen resolution, you might just end up with a black screen during the BIOS initialisation at boot.

    To do so, select in the Preview.app Menu -> "Tools" -> "Adjust Size". Change the image dimension and save the modified image with "File" -> "Export". In the "Export menu" press "Save", after selecting "JPEG" under "Format" , after choosing "Desktop" as the place to store the image, and after entering the new file name, which has to end with ".jpg".

    Double-check by right-clicking on the resulting jpg image file and selecting "Get Info" that its file size does no exceed 200KB by far. If the latter would be the case, you would not be able to save the modified BIOS Firware file subsequently.

    Finally just rename your new "XXXX.jpg" file to "XXXX.raw....

    I guess, that by following the procedure detailed above, it is obvious that iMacPro.raw also can be substituted by any other image of your personal choice. Just be aware that it's background colour should be black (ecstatic reason for a its nice integration within the else black ASUS BIOS Boot Screen)

    c.) After replacing "Raw Section" with iMacPro.raw or the XXX.raw image of your choice, save your modified BIOS Firmware File with the Option "File" -> "Save Image File..."

    d.) Copy your modified BIOS Firmware file to a USB3.0 Flash Drive, formatted with FAT32.

    e.) Reboot, enter the Mainboard BIOS and save your BIOS settings to the USB Flash Drive

    f.) Flash your mainboard BIOS with the modified BIOS Firmware

    g.) Renter the Mainboard BIOS and restore your BIOS settings from the USB Flash Drive

    h.) Save your restored BIOS settings with (F7) and (F10), reboot and you are done.

    Just don't forget to set BIOS Setting "Boot Logo Display" to "Auto", when using this new approach. Any different setting might result in a black screen during BIOS initialisation.

    E.12) iMac Pro Desktop Background cosmetics

    It might be nice to equip your iMac Pro X99 also with the adequate iMac Pro Desktop Background.

    1.) Download, unzip and copy imac-pro-wallpaper.jpg.zip to your Dektop

    2.) Right-click with the mouse on your Desktop and select "Change Desktop Background.."

    3.) In the left column click on the "+" and add your Desktop Folder

    4.) Select imac-pro-wallpaper.jpg to be your new Desktop Background

    E.13) Native Display Brightness Control / Native NightShift Functionality for Monitors with DCC/IC Support

    1.) Native Display Brightness Control

    Many of you might miss the ability to control the display brightness with the F1/F2 keys on original Apple Keyboards, or with FN&F1/FN&F2 on non-Apple keyboards.

    @bensge wrote a small but genius application to do just that on any Hackintosh System and to show the native OSX brightness system UI.

    NativeDisplayBrightness-UI.png

    The App works for desktops and monitors that support DDC/CI. You have to connect your monitor to your GPU either via HDMI or DP. Note that you also have to enable DDC/CI support on your monitor to make the program work.

    This application automatically adds itself as a Login Item in your User Settings in System Preferences.

    UserSettings.png

    Please carefully read all instructions on his NativeDiplayBrightness GitHub page before downloading the program. An extensive discussion can be followed on his respective thread on Tonymacx.

    To download and compile the source code of the App to your home directory, enter the following terminal command:

    Code (Text):

    git clone https://github.com/Bensge/NativeDisplayBrightness/
    cd ~/NativeDisplayBrightness/
    xcodebuild
     
    The compiled NativeDisplayBrightness.app can be found in subfolder ~/NativeDisplayBrightness/build/Release

    To add the application as a Login Item in your User Settings in System Preferences, just double click on the App.

    If you're using an original Apple keyboard, this app won't work with your F1/F2 keys straight away. On non-Apple keyboards it won't work out off the box, even with FN&F1/FN&F2 as it should work .

    In both cases you need to additionally add two KernelToPatch entries in your config.plist in Section "Kernel and Kext Patches" of Clover Configurator:

    Code (Text):

    Name*                                  Find* [Hex]                                          Replace* [HEX]                                       Comment

    com.apple.driver.AppleHIDKeyboard      30783030 30373030 33612c30 78666630 31303032 31      30783030 30373030 33612c30 78303030 37303033 61      by Wern

    com.apple.driver.AppleHIDKeyboard      30783030 30373030 33622c30 78666630 31303032 30      30783030 30373030 33622c30 78303030 37303033 62      by Wern
     
    Note, that there is no support yet for multi-monitor configurations.

    Thanks to user @Ramalama for drawing my attention to this amazingly util implementation and for all his related instructive help and support.

    2.) Native NightShift Functionality for Monitors with DDC/IC Support

    To enable native NightShift functionality on the 38" LG 38UC99, one needs to download and unzip the respective Display Override Profile DisplayProductID-76fc, subsequently properly sign the file, and finally copy the file to /System/Library/Displays/Contents/Resources/Overrides/DisplayVendorID-1e6d/.

    The latter to steps can be done by the following terminal commands:

    Code (Text):
    cd ~/Downloads
    sudo codesign -f -s - DisplayProductID-76fc
    sudo cp DisplayProductID-76fc /System/Library/Displays/Contents/Resources/Overrides/DisplayVendorID-1e6d/
     
    Subsequently you have to reboot and to newly adjust your Screen Resolution under "Display" in System Preferences.

    DisplayReosultionSetup.png

    And your are done:

    Nightshift.png

    Note that the attached Display Override Profile, does not allow a LG 38UC99 Monitor Frequency of 75Hz. Only 60Hz are supported.

    Many thanks to user @Ramalama for providing this approach to our community. NightShift should also work for the Acer 38" and Dell 38" Monitors. Yet @Ramalama misses the respective EDIDs. Any body with e.g. the Acer XR382CQK should immediately upload the requested information and contact @Ramalama by posting in this thread! Many thanks in advance!

    E.14) iStatMenus Hardware Monitoring

    Thanks to extended tweet session between @BJango, @gxsolace and myself, we achieved a major step forward in properly monitoring Skylake-X/X299 Hardware with iStatMenus. iStatMenus now correctly interfaces with the HWSensor and FakeSMC kext distribution provided by @interferenc. It also can be used for Broadwell-E/EP, Haswell-E/EP, X99 system monitoring, with the tiny drawback that for CPUs with less then 18 cores the CPU numeration seems still erroneous. My distributed EFI-Folder already contains all necessary HWSensor and FakeSMC kexts.

    The most actual iStatMenus v6.1 distribution can be assessed at https://bjango.com/mac/istatmenus/

    The most actual HWSensor and FakeSMC kext distribution of @interferenc can be separately assessed at https://github.com/interferenc/HWSensors.

    To compile the the HWSensor and FakeSMC kexts of @interferenc, perform the individual steps detailed below:

    1.)
    Code (Text):
    git clone https://github.com/interferenc/HWSensors
    2.)
    Code (Text):
    cp HWSensors ~/Desktop/
    3.)
    Code (Text):
    cd ~/Desktop/HWSensors
    4.)
    Code (Text):
    xcodebuild -project Versioning\ And\ Distribution.xcodeproj/
    5.)
    Code (Text):
    xcodebuild -project HWMonitor.xcodeproj/
    6.)
    Code (Text):
    xcodebuild -project HWSensors.xcodeproj -alltargets
    Subsequently, one finds the all compiled binaries in ~/Desktop/HWSensors/Binaries/.

    Note that all compiled kext binaries are once more attached towards the bottom of this originating thread (guide). Just download and unzip HW-Sensors-IF.zip and copy all kexts to /EFI/Clover/kexts/Other/. Note that this pre-compiled binary package already implements a modified GPU Sensor kext of @Kozlek, which should also account for Polaris GPUs.

    Many thanks to both @interferenc and @Bjango for their awesome and extensive contributions and brilliant work!

    Broadwell-E/EP, Haswell-E/EP, X99 iStatMenus Hardware Sensor Data:

    155486959_Screenshot2018-06-08at16_28_11.png.5eceb12e028df7d2af684dcaa16be558.png

    Broadwell-E/EP, Haswell-E/EP CPU Thread Utilisation Graphs:

    1265785417_Screenshot2018-06-08at16_33_40.png.4e7467ff6e4f4b5ec9bef07361618068.png


    To change from CPU core to thread utilisation monitoring, uncheck "Hide Hyper-Threading cores" in Section "CPU & GPU" of iStatMenus Preferences.

    iStatMenus-Preferences-1.png.642bb6d0282f23067347035e6d2d5064.png

    Temperature unites can be adjusted between Celsius, Fahrenheit and Kelvin in Section "Sensors" of iStatMenus Preferences.

    iStatMenus-Preferences-2.png.192f47c3202c8f8dc3b49438d8714b3b.png


    F.) Benchmarking:

    BenchmarkingTeaser.png

    F.1) i7-6950X CPU Benchmarks:

    Geekbench-CPU.png

    Cinebench-CPU.png

    F.2) Gigabyte Radeon RX Vega 64 Gaming OC 8GB OpenGL and Metal Benchmarks:

    OpenGL-Vega.png

    Metal-Vega.png

    LuxMark.png

    Cinebench.png

    Heaven.png

    Valley.png

    F.3) Gigabyte AORUS GTX 1080 TI 11GB Xtreme Edition OpenGL and Metal Benchmarks:

    Geekbench-OpenGL.png

    Geekbench-Metal2.png

    Cinebench-OpenGL.png

    LuxMark.png

    Unigine.png

    F.4) Blackmagic Disk Speed Benchmarks:


    Disk Speed Benchmarks also reveal nearly identical Disk Speed performance under 10.12 and 10.13. Compare the figure below with the one published in my 10.12 macOS Sierra Desktop Guide.

    Disk-Speed-Test.png


    G.) Summary and Conclusion:

    Famous-Last-Words-Featured.jpg

    Already during the individual macOS High Sierra 10.13 beta releases, X99 systems reached full functionality together with flawless stability. Since the Final Release of macOS High Sierra 10.13, it might be the right moment to follow my desktop guide and to unfold the unbelievable X99 potential together with macOS High Sierra 10.13!

    As already mentioned towards the end of my macOS Sierra Desktop Guide, I am quite optimistic that high-end X99 builds can find manifold application, not only in science and research at universities or research institutions, engineering facilities, or medical labs, etc... Latest successful user feedback with respect to Broadwell-EP/Haswell-EP processers with up to 22 cores (44 threads) at clock speeds around 2.8 Ghz each thread makes X99 to a "realtively cheap" but extremely serious alternative to Apple's iMac Pro's and Mac Pro's. The principal intention of this desktop guide was to demonstrate, that we are able to build and configure stable and relatively "low-cost" high-end systems nowadays, that go far beyond of what Apple is able to offer at present or will be ever able to offer for some reasonable pricing. An iMac Pro system based on X99, that allows the use of all software-packages developed for MacOS, Unix, Linux or even Windows at the same time (e.g. think on Vine, Parallels, or a dual boot system configurations). The flexibility between different boards (Asus, Gigabyte, ASRock, MSI, etc.), different processor models (Broadwell-E/EP, Haswell-E/EP) and different RAM memory configurations (16-128GB) makes such system affordable for anybody (also home office, audio and video editing/production, etc.) and allows its perfect adaptation for the specific purpose, requirements and available budgets.

    Finally, it might not be necessary to mentioned in addition that X99 system reached such high level of sophistication and stability to reliably and perfectly run on a 24/7/365 basis.

    I am a scientist, expert in solar physics, space weather forecast and related telescope/instrument/space-mission development. In the frame of my scientific research, I developed parallelized image reconstruction, spectral line inversion and numerical modeling algorithms/applications, which require tremendous parallelized calculation power, RAM memory and storage capacities to reduce, analyze and interpret extensive and pioneering scientific ground-based or space-born observational data sets. This basically was also the professional motivation for developing my innovative iMacPro macOS High Sierra Hackintosh Builds iSPOR-S (the imaging Spectropolarimetric Parallel Organized Reconstruction Servers running iSPOR-DP, the Imaging Spectropolarimetric Parallel Organized Reconstruction Data Pipeline software package for the GREGOR Fabry-Pérot Interferometer, located at the 1.5m GREGOR Solar Telescope (Europe's largest solar telescope) on Tenerife, Canary Islands, Spain) and for the entire respective iMac Pro X299/X99 Desktop User Guide Development, which hopefully will be also of benefit for others. Anybody interested can find more details on my personal webpage.

    Good luck and enjoy,

    kgp.png
     

    Attached Files:

    Last edited: Jul 21, 2018 at 5:20 AM
  2. tneely

    tneely

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    Jul 12, 2017 at 5:36 PM #2
    tneely

    tneely

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    Great to hear that! Don't forget us "Haswell-E" fans of your guide.
    Cheers!
     
    kgp likes this.
  3. kgp

    kgp

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    Jul 13, 2017 at 1:28 PM #3
    kgp

    kgp

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    Mac:
    iMac, MacBook Pro, Mac mini
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    Guide completed and ready for use! Enjoy! :thumbup:
     
    d3k1d and pete1959 like this.
  4. dragoonchang

    dragoonchang

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    Jul 13, 2017 at 4:35 PM #4
    dragoonchang

    dragoonchang

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    Great! Nvidia video driver part will help me a lot! I still stuck in it.
     
  5. wayne2401

    wayne2401

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    Jul 15, 2017 at 4:40 PM #5
    wayne2401

    wayne2401

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    Thank you for this awesome guide, I have a few questions in your kext folder theres a SkylakeGPolicy kext what us the kext for? Also in your clover config your not using -xcpm but you do have custom flags can you explain your custom flags and why youre no longer -xcpm

    MY System
    X99 Deluxe II
    i6900K
    High Sierra Beta 3
     
  6. kgp

    kgp

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    Jul 15, 2017 at 5:48 PM #6
    kgp

    kgp

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    1.) I guess the SkylakeGPolicy.kext is an intent to reduce graphics glitches caused by the lack of adequate Nvidia 10.13
    Webdrivers.​

    2.) a.) The -xcpm bootflag was already obsolete under 10.12 and latest Clover distributions, as it is also obsolete now under
    10.13...​

    b.) -alcbeta and -lilubeta bootflags are required for AppleALC to work​

    c.) the -igfxbeta bootflag is required for the 10.12 Nvidia webdriver workaround..​


    Question, what do you mean by High Sierra Beta 3? DP3?

    Cheers,

    KGP
     
    wayne2401 likes this.
    Last edited: Jul 15, 2017
  7. kgp

    kgp

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    Jul 15, 2017 at 10:13 PM #7
    kgp

    kgp

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    Guide-Updates 16 July 2017

    • FakeCPUID and XCPM KernelToPatch modifications for Haswell-E and Ivy-Bridge processors added.
    • Modified version of EFI-10.13-TM.zip uploaded.
     
  8. kgp

    kgp

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    Jul 15, 2017 at 10:23 PM #8
    kgp

    kgp

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    @tneely, good news! My 10.13 macOS HighSierra Desktop Guide should now be fully compatible with Broadwell-E, Haswell-E and Ivy-Bridge processors. I assume that also like in case of 10.12 macOS Sierra, it will be largely compatible with all X99 mobos of ASUS, GYGABYTE, ASRock, MSI etc..

    Cheers :thumbup:

    KGP
     
    tneely likes this.
  9. tneely

    tneely

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    Jul 16, 2017 at 12:58 AM #9
    tneely

    tneely

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    Currently working on a project with my x99 Hack. As soon as I finish will try your guide on a spare ssd.
    Keep up the good work!
    Thanks again!
    cheers
     
    kgp likes this.
  10. dnetcrawler

    dnetcrawler

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    Jul 16, 2017 at 11:49 PM #10
    dnetcrawler

    dnetcrawler

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    I want to thank you very much for this amazing write up and the share. Using your EFI folder, I was able to get AMD VEGA Frontier Edition working 100% on X99!
     

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