- Joined
- Dec 2, 2013
- Messages
- 47
- Motherboard
- x99-ii
- CPU
- intel 6950x
- Graphics
- zotac 1080 ti amp
- Mac
kgp
AppleIntelInfo.kext v2.9 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.
Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0x84e3caba826 (304 MHz)
MWAIT C-States...........................: 8480
Processor Brandstring....................: Intel(R) Core(TM) i7-6950X CPU @ 3.00GHz
Processor Signature..................... : 0x406F1
------------------------------------------
- Family............................... : 6
- Stepping............................. : 1
- Model................................ : 0x4F (79)
Model Specific Registers (MSRs)
------------------------------------------
MSR_IA32_PLATFORM_ID.............(0x17) : 0x8000000000000
------------------------------------------
- Processor Flags...................... : 2
MSR_CORE_THREAD_COUNT............(0x35) : 0xA0014
------------------------------------------
- Core Count........................... : 10
- Thread Count......................... : 20
MSR_PLATFORM_INFO................(0xCE) : 0x20080C3BF3811E00
------------------------------------------
- Maximum Non-Turbo Ratio.............. : 0x1E (3000 MHz)
- Ratio Limit for Turbo Mode........... : 1 (programmable)
- TDP Limit for Turbo Mode............. : 1 (programmable)
- Low Power Mode Support............... : 1 (LPM supported)
- Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
- Maximum Efficiency Ratio............. : 12
- Minimum Operating Ratio.............. : 8
MSR_PMG_CST_CONFIG_CONTROL.......(0xE2) : 0x1E000005
------------------------------------------
- I/O MWAIT Redirection Enable......... : 0 (not enabled)
- CFG Lock............................. : 0 (MSR not locked)
- C3 State Auto Demotion............... : 1 (enabled)
- C1 State Auto Demotion............... : 1 (enabled)
- C3 State Undemotion.................. : 1 (enabled)
- C1 State Undemotion.................. : 1 (enabled)
- Package C-State Auto Demotion........ : 0 (disabled/unsupported)
- Package C-State Undemotion........... : 0 (disabled/unsupported)
MSR_PMG_IO_CAPTURE_BASE..........(0xE4) : 0x10414
------------------------------------------
- LVL_2 Base Address................... : 0x414
- C-state Range........................ : 1 (C-States not included, I/O MWAIT redirection not enabled)
IA32_MPERF.......................(0xE7) : 0xB9A5912C48
IA32_APERF.......................(0xE8) : 0xA334668A94
MSR_0x150........................(0x150) : 0x0
MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------
MSR_IA32_PERF_STATUS.............(0x198) : 0x28DC00002A00
------------------------------------------
- Current Performance State Value...... : 0x2A00 (4200 MHz)
MSR_IA32_PERF_CONTROL............(0x199) : 0x2A00
------------------------------------------
- Target performance State Value....... : 0x2A00 (4200 MHz)
- Intel Dynamic Acceleration........... : 0 (IDA engaged)
IA32_CLOCK_MODULATION............(0x19A) : 0x0
IA32_THERM_INTERRUPT.............(0x19B) : 0x0
IA32_THERM_STATUS................(0x19C) : 0x884A0000
------------------------------------------
- Thermal Status....................... : 0
- Thermal Log.......................... : 0
- PROCHOT # or FORCEPR# event.......... : 0
- PROCHOT # or FORCEPR# log............ : 0
- Critical Temperature Status.......... : 0
- Critical Temperature log............. : 0
- Thermal Threshold #1 Status.......... : 0
- Thermal Threshold #1 log............. : 0
- Thermal Threshold #2 Status.......... : 0
- Thermal Threshold #2 log............. : 0
- Power Limitation Status.............. : 0
- Power Limitation log................. : 0
- Current Limit Status................. : 0
- Current Limit log.................... : 0
- Cross Domain Limit Status............ : 0
- Cross Domain Limit log............... : 0
- Digital Readout...................... : 74
- Resolution in Degrees Celsius........ : 1
- Reading Valid........................ : 1 (valid)
MSR_THERM2_CTL...................(0x19D) : 0x0
IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
- Fast-Strings......................... : 1 (enabled)
- FOPCODE compatibility mode Enable.... : 0
- Automatic Thermal Control Circuit.... : 1 (enabled)
- Split-lock Disable................... : 0
- Performance Monitoring............... : 1 (available)
- Bus Lock On Cache Line Splits Disable : 0
- Hardware prefetch Disable............ : 0
- Processor Event Based Sampling....... : 0 (PEBS supported)
- GV1/2 legacy Enable.................. : 0
- Enhanced Intel SpeedStep Technology.. : 1 (enabled)
- MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
- Adjacent sector prefetch Disable..... : 0
- CFG Lock............................. : 0 (MSR not locked)
- xTPR Message Disable................. : 1 (disabled)
MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x640A00
------------------------------------------
- Turbo Attenuation Units.............. : 0
- Temperature Target................... : 100
- TCC Activation Offset................ : 0
MSR_MISC_PWR_MGMT................(0x1AA) : 0x402000
------------------------------------------
- EIST Hardware Coordination........... : 0 (hardware coordination enabled)
- Energy/Performance Bias support...... : 1
- Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
- Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)
- SpeedShift Technology Enable......... : 0 (disabled)
- SpeedShift Interrupt Coordination.... : 0 (disabled)
- SpeedShift Energy Efficient Perf..... : 0 (disabled)
- SpeedShift Technology Setup for HWP.. : No (not setup for HWP)
MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2A2A2A2A2A2A2A2A
------------------------------------------
- Maximum Ratio Limit for C01.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C02.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C03.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C04.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C05.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C06.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C07.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C08.......... : 2A (4200 MHz)
MSR_TURBO_RATIO_LIMIT1...........(0x1AE) : 0x2222222222222A2A
------------------------------------------
- Maximum Ratio Limit for C09.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C10.......... : 2A (4200 MHz)
IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x5
------------------------------------------
- Power Policy Preference...............: 5 (balanced performance and energy saving)
MSR_POWER_CTL....................(0x1FC) : 0x2904005B
------------------------------------------
- Bi-Directional Processor Hot..........: 1 (enabled)
- C1E Enable............................: 1 (enabled)
MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
- Power Units.......................... : 3 (1/8 Watt)
- Energy Status Units.................. : 14 (61 micro-Joules)
- Time Units .......................... : 10 (976.6 micro-Seconds)
MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFF80015FFF8
------------------------------------------
- Package Power Limit #1............... : 4095 Watt
- Enable Power Limit #1................ : 1 (enabled)
- Package Clamping Limitation #1....... : 1 (allow going below OS-requested P/T state during Time Window for Power Limit #1)
- Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
- Package Power Limit #2............... : 4095 Watt
- Enable Power Limit #2................ : 1 (enabled)
- Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
- Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
- Lock................................. : 0 (MSR not locked)
MSR_PKG_ENERGY_STATUS............(0x611) : 0x10C4B1A
------------------------------------------
- Total Energy Consumed................ : 1073 Joules (Watt = Joules / seconds)
MSR_PKGC3_IRTL...................(0x60a) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKGC7_IRTL...................(0x60c) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x8E2070B26A
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x226AC562
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x8E2070B26A
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x226AC562
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x70C8BC96FA
MSR_PKG_C7_RESIDENCY.............(0x3fa) : 0x0
IA32_TSC_DEADLINE................(0x6E0) : 0x84E409AEF6E
CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 30 (3000 MHz)
Maximum Turbo Ratio/Frequency............: 42 (4200 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ 29 (30) 42 ]
CPU C3-Cores [ 1 2 4 6 8 10 12 14 16 18 ]
CPU C6-Cores [ 0 3 4 6 9 11 13 15 17 19 ]
CPU P-States [ 20 29 (30) 42 ]
CPU C3-Cores [ 1 2 4 6 8 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 3 4 5 6 9 11 13 15 17 19 ]
CPU P-States [ (12) 20 23 29 30 42 ]
CPU C3-Cores [ 0 1 2 4 6 8 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 9 11 13 15 17 19 ]
CPU P-States [ (12) 20 22 23 29 30 42 ]
CPU C3-Cores [ 0 1 2 4 6 8 9 10 12 14 16 18 19 ]
CPU P-States [ (12) 20 22 23 25 29 30 42 ]
CPU C3-Cores [ 0 1 2 4 5 6 8 9 10 12 13 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 9 11 12 13 15 17 19 ]
CPU P-States [ 12 20 22 23 24 25 29 (30) 42 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 8 9 11 12 13 15 17 19 ]
CPU C3-Cores [ 0 1 2 4 5 6 8 9 10 12 13 14 15 16 18 19 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 8 9 11 12 13 14 15 17 18 19 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 8 9 10 12 13 14 15 16 18 19 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 11 12 13 14 15 17 18 19 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 18 19 ]
CPU P-States [ (12) 17 20 22 23 24 25 29 30 42 ]
CPU P-States [ 12 17 19 20 22 23 24 25 29 (30) 42 ]
CPU P-States [ (12) 17 19 20 22 23 24 25 26 29 30 42 ]
CPU P-States [ (12) 15 17 19 20 22 23 24 25 26 29 30 42 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 17 18 19 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ (12) 15 17 19 20 22 23 24 25 26 27 29 30 42 ]
CPU P-States [ (12) 15 17 19 20 21 22 23 24 25 26 27 29 30 42 ]
CPU P-States [ 12 15 17 19 20 21 22 23 24 25 26 27 28 29 30 (42) ]
CPU P-States [ (12) 15 17 19 20 21 22 23 24 25 26 27 28 29 30 33 42 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 18 19 ]
CPU P-States [ (12) 15 17 19 20 21 22 23 24 25 26 27 28 29 30 32 33 42 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ 12 15 17 19 20 21 22 23 24 25 26 27 28 29 (30) 32 33 34 42 ]
CPU P-States [ 12 15 17 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 (42) ]
CPU P-States [ (12) 15 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 42 ]
CPU P-States [ (12) 14 15 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 42 ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 42 ]
CPU P-States [ 12 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 (42) ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 42 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 42 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 41 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 40 41 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 39 40 41 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 (30) 31 32 33 34 35 36 37 38 39 40 41 42 ]
I'm sorry, but I wonder if it works well.
If you have any problems please ask me for advice.
Thank you all the time.
AppleIntelInfo.kext v2.9 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.
Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0x84e3caba826 (304 MHz)
MWAIT C-States...........................: 8480
Processor Brandstring....................: Intel(R) Core(TM) i7-6950X CPU @ 3.00GHz
Processor Signature..................... : 0x406F1
------------------------------------------
- Family............................... : 6
- Stepping............................. : 1
- Model................................ : 0x4F (79)
Model Specific Registers (MSRs)
------------------------------------------
MSR_IA32_PLATFORM_ID.............(0x17) : 0x8000000000000
------------------------------------------
- Processor Flags...................... : 2
MSR_CORE_THREAD_COUNT............(0x35) : 0xA0014
------------------------------------------
- Core Count........................... : 10
- Thread Count......................... : 20
MSR_PLATFORM_INFO................(0xCE) : 0x20080C3BF3811E00
------------------------------------------
- Maximum Non-Turbo Ratio.............. : 0x1E (3000 MHz)
- Ratio Limit for Turbo Mode........... : 1 (programmable)
- TDP Limit for Turbo Mode............. : 1 (programmable)
- Low Power Mode Support............... : 1 (LPM supported)
- Number of ConfigTDP Levels........... : 1 (additional TDP level(s) available)
- Maximum Efficiency Ratio............. : 12
- Minimum Operating Ratio.............. : 8
MSR_PMG_CST_CONFIG_CONTROL.......(0xE2) : 0x1E000005
------------------------------------------
- I/O MWAIT Redirection Enable......... : 0 (not enabled)
- CFG Lock............................. : 0 (MSR not locked)
- C3 State Auto Demotion............... : 1 (enabled)
- C1 State Auto Demotion............... : 1 (enabled)
- C3 State Undemotion.................. : 1 (enabled)
- C1 State Undemotion.................. : 1 (enabled)
- Package C-State Auto Demotion........ : 0 (disabled/unsupported)
- Package C-State Undemotion........... : 0 (disabled/unsupported)
MSR_PMG_IO_CAPTURE_BASE..........(0xE4) : 0x10414
------------------------------------------
- LVL_2 Base Address................... : 0x414
- C-state Range........................ : 1 (C-States not included, I/O MWAIT redirection not enabled)
IA32_MPERF.......................(0xE7) : 0xB9A5912C48
IA32_APERF.......................(0xE8) : 0xA334668A94
MSR_0x150........................(0x150) : 0x0
MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------
MSR_IA32_PERF_STATUS.............(0x198) : 0x28DC00002A00
------------------------------------------
- Current Performance State Value...... : 0x2A00 (4200 MHz)
MSR_IA32_PERF_CONTROL............(0x199) : 0x2A00
------------------------------------------
- Target performance State Value....... : 0x2A00 (4200 MHz)
- Intel Dynamic Acceleration........... : 0 (IDA engaged)
IA32_CLOCK_MODULATION............(0x19A) : 0x0
IA32_THERM_INTERRUPT.............(0x19B) : 0x0
IA32_THERM_STATUS................(0x19C) : 0x884A0000
------------------------------------------
- Thermal Status....................... : 0
- Thermal Log.......................... : 0
- PROCHOT # or FORCEPR# event.......... : 0
- PROCHOT # or FORCEPR# log............ : 0
- Critical Temperature Status.......... : 0
- Critical Temperature log............. : 0
- Thermal Threshold #1 Status.......... : 0
- Thermal Threshold #1 log............. : 0
- Thermal Threshold #2 Status.......... : 0
- Thermal Threshold #2 log............. : 0
- Power Limitation Status.............. : 0
- Power Limitation log................. : 0
- Current Limit Status................. : 0
- Current Limit log.................... : 0
- Cross Domain Limit Status............ : 0
- Cross Domain Limit log............... : 0
- Digital Readout...................... : 74
- Resolution in Degrees Celsius........ : 1
- Reading Valid........................ : 1 (valid)
MSR_THERM2_CTL...................(0x19D) : 0x0
IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
- Fast-Strings......................... : 1 (enabled)
- FOPCODE compatibility mode Enable.... : 0
- Automatic Thermal Control Circuit.... : 1 (enabled)
- Split-lock Disable................... : 0
- Performance Monitoring............... : 1 (available)
- Bus Lock On Cache Line Splits Disable : 0
- Hardware prefetch Disable............ : 0
- Processor Event Based Sampling....... : 0 (PEBS supported)
- GV1/2 legacy Enable.................. : 0
- Enhanced Intel SpeedStep Technology.. : 1 (enabled)
- MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
- Adjacent sector prefetch Disable..... : 0
- CFG Lock............................. : 0 (MSR not locked)
- xTPR Message Disable................. : 1 (disabled)
MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x640A00
------------------------------------------
- Turbo Attenuation Units.............. : 0
- Temperature Target................... : 100
- TCC Activation Offset................ : 0
MSR_MISC_PWR_MGMT................(0x1AA) : 0x402000
------------------------------------------
- EIST Hardware Coordination........... : 0 (hardware coordination enabled)
- Energy/Performance Bias support...... : 1
- Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
- Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)
- SpeedShift Technology Enable......... : 0 (disabled)
- SpeedShift Interrupt Coordination.... : 0 (disabled)
- SpeedShift Energy Efficient Perf..... : 0 (disabled)
- SpeedShift Technology Setup for HWP.. : No (not setup for HWP)
MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2A2A2A2A2A2A2A2A
------------------------------------------
- Maximum Ratio Limit for C01.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C02.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C03.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C04.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C05.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C06.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C07.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C08.......... : 2A (4200 MHz)
MSR_TURBO_RATIO_LIMIT1...........(0x1AE) : 0x2222222222222A2A
------------------------------------------
- Maximum Ratio Limit for C09.......... : 2A (4200 MHz)
- Maximum Ratio Limit for C10.......... : 2A (4200 MHz)
IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x5
------------------------------------------
- Power Policy Preference...............: 5 (balanced performance and energy saving)
MSR_POWER_CTL....................(0x1FC) : 0x2904005B
------------------------------------------
- Bi-Directional Processor Hot..........: 1 (enabled)
- C1E Enable............................: 1 (enabled)
MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
- Power Units.......................... : 3 (1/8 Watt)
- Energy Status Units.................. : 14 (61 micro-Joules)
- Time Units .......................... : 10 (976.6 micro-Seconds)
MSR_PKG_POWER_LIMIT..............(0x610) : 0x7FFF80015FFF8
------------------------------------------
- Package Power Limit #1............... : 4095 Watt
- Enable Power Limit #1................ : 1 (enabled)
- Package Clamping Limitation #1....... : 1 (allow going below OS-requested P/T state during Time Window for Power Limit #1)
- Time Window for Power Limit #1....... : 10 (2560 milli-Seconds)
- Package Power Limit #2............... : 4095 Watt
- Enable Power Limit #2................ : 1 (enabled)
- Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
- Time Window for Power Limit #2....... : 3 (20 milli-Seconds)
- Lock................................. : 0 (MSR not locked)
MSR_PKG_ENERGY_STATUS............(0x611) : 0x10C4B1A
------------------------------------------
- Total Energy Consumed................ : 1073 Joules (Watt = Joules / seconds)
MSR_PKGC3_IRTL...................(0x60a) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKGC7_IRTL...................(0x60c) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x8E2070B26A
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x226AC562
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x8E2070B26A
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x226AC562
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0x70C8BC96FA
MSR_PKG_C7_RESIDENCY.............(0x3fa) : 0x0
IA32_TSC_DEADLINE................(0x6E0) : 0x84E409AEF6E
CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 30 (3000 MHz)
Maximum Turbo Ratio/Frequency............: 42 (4200 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ 29 (30) 42 ]
CPU C3-Cores [ 1 2 4 6 8 10 12 14 16 18 ]
CPU C6-Cores [ 0 3 4 6 9 11 13 15 17 19 ]
CPU P-States [ 20 29 (30) 42 ]
CPU C3-Cores [ 1 2 4 6 8 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 3 4 5 6 9 11 13 15 17 19 ]
CPU P-States [ (12) 20 23 29 30 42 ]
CPU C3-Cores [ 0 1 2 4 6 8 10 12 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 9 11 13 15 17 19 ]
CPU P-States [ (12) 20 22 23 29 30 42 ]
CPU C3-Cores [ 0 1 2 4 6 8 9 10 12 14 16 18 19 ]
CPU P-States [ (12) 20 22 23 25 29 30 42 ]
CPU C3-Cores [ 0 1 2 4 5 6 8 9 10 12 13 14 16 18 19 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 9 11 12 13 15 17 19 ]
CPU P-States [ 12 20 22 23 24 25 29 (30) 42 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 8 9 11 12 13 15 17 19 ]
CPU C3-Cores [ 0 1 2 4 5 6 8 9 10 12 13 14 15 16 18 19 ]
CPU C6-Cores [ 0 1 3 4 5 6 7 8 9 11 12 13 14 15 17 18 19 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 8 9 10 12 13 14 15 16 18 19 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 11 12 13 14 15 17 18 19 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 12 13 14 15 16 18 19 ]
CPU P-States [ (12) 17 20 22 23 24 25 29 30 42 ]
CPU P-States [ 12 17 19 20 22 23 24 25 29 (30) 42 ]
CPU P-States [ (12) 17 19 20 22 23 24 25 26 29 30 42 ]
CPU P-States [ (12) 15 17 19 20 22 23 24 25 26 29 30 42 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 17 18 19 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ (12) 15 17 19 20 22 23 24 25 26 27 29 30 42 ]
CPU P-States [ (12) 15 17 19 20 21 22 23 24 25 26 27 29 30 42 ]
CPU P-States [ 12 15 17 19 20 21 22 23 24 25 26 27 28 29 30 (42) ]
CPU P-States [ (12) 15 17 19 20 21 22 23 24 25 26 27 28 29 30 33 42 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 18 19 ]
CPU P-States [ (12) 15 17 19 20 21 22 23 24 25 26 27 28 29 30 32 33 42 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 ]
CPU P-States [ 12 15 17 19 20 21 22 23 24 25 26 27 28 29 (30) 32 33 34 42 ]
CPU P-States [ 12 15 17 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 (42) ]
CPU P-States [ (12) 15 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 42 ]
CPU P-States [ (12) 14 15 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 42 ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 42 ]
CPU P-States [ 12 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 (42) ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 42 ]
CPU P-States [ (12) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 42 ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 41 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 40 41 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 38 39 40 41 (42) ]
CPU P-States [ 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 (30) 31 32 33 34 35 36 37 38 39 40 41 42 ]
I'm sorry, but I wonder if it works well.
If you have any problems please ask me for advice.
Thank you all the time.