Search results

I posted a modded CpuTopologySync.kext that fixes Alder Lake's core and thread recognition before, now I renamed it to CpuTopologyRebuild.kext to avoid confusion and I created a repository for it. https://github.com/b00t0x/CpuTopologyRebuild If you have the difficulty with performance with...

I wish these 2 OpenCore kernel patches will be working for you. Base: _cpuid_set_info Find: B9350000 000F32 Replace: B8180018 0031D2 Count: 2 Comment: Set core_count = 0x18(24), thread_count = 0x18(24) Identifier: kernel Find: C1E81AFF C089 Replace: B8800000 0089 Count: 1 Comment...

Is ProvideCurrentCpuInfo set to true? If it doesn't work with ProvideCurrentCpuInfo, use debug version of Lilu and this kext and show me the debug log. To get debug log, add -ctsdbg liludump=30 to boot args and execute cat /var/log/Lilu* | grep cts after boot.

I cleaned up a debug prints and rebuild the kext. (no functionality changes) And I also attached RestrictEvents.kext with minimal fix to make About This Mac CPU name change working with my CpuTopologySync.kext. changelog: https://gist.github.com/b00t0x/a13cefd4644e9d6d57908ce3420c3002/revisions

Cinebench score differences are interesting because I thought full-load scores will be almost same. I found another interesting performance diffrences. I ran Windows 11 VM on this Hackintosh with VMware Fusion 12 Player in different host core/thread configuraions and guest vCPU configurations...

I wrote a experimental kext for change core / thread recognition. This kext enables 16 cores / 24 threads recognition with Core i9. It is also possible to make 8 cores / 24 threads recognition by making the CPU behave like a 3-way SMT. In addition, with HT disabled, you can make it look like an...

I think so too. There are no problems to solve now. We have fully working systems.

I attached a small ruby script to patch DSDT.aml Here is usage. $ mv proc_patch.rb.txt proc_patch.rb $ chmod +x proc_patch.rb $ ./proc_patch.rb DSDT.dsl 16 > DSDT_patched.dsl Specify first argument for DSDT.dsl path, second for threads per CPU. If you have 8-core CPU with HT, you should specify...

I made some mistake about how to fix DSDT. So I fixed the post above. Sorry.

Now I'm planning to write small script to patch DSDT Processor scope. If you see a message like "should have X threads but only found Y" above the AppleACPIPlatform panic, it must be caused by Processor scope issue. I couldn't avoid the panic without Processor scope edit (or not using 8-core...

I've tested my system with your SSDT-1.aml. Everything worked perfect! It worked with latest BIOS 5802, annoying random freezes has gone. I used my own DSDT.aml (only Processor scope patch added) with your SSDT-1.aml, then all 32 threads are recognized, SpeedStep and TurboBoost worked properly...

I haven't tested yet so I don't know whether text below is a help to you, but I can put some information. I read Processor scope in your DSDT.aml, it is adjusted for 24 cores. In SCK0 (socket 0) Processor (C000, 0x00, 0x00000410, 0x06) ... Processor (C00B, 0x0B, 0x00000410, 0x06) # 12th...

I know there are some problems of booting with two 8-core v2 CPUs. I made some fix to processor scope of DSDT.aml and make it bootable last year. I'll try these fix to your DSDT.aml, and share how to fix if I can boot El Capitan.

Great post, TpwUK! I'm struggling to avoid random freeze that analogo encountered with Yosemite/El Capitan. I really want to know how to create stable system with Z9PE-D8 WS + El Capitan. My system have two E5-2687W v2 ES and GTX760 (or GTX970), so your method may adopt my system. I think it's...

Oh I didn't know about AppleGraphicsControl.kext. Thanks. But nothing happend when I changed MacPro6,1 config to "none". I tried it at 10.10.2, so next time I will update 10.10.3 and try this.

Changing onboard VGA jumper npci=0x2000/0x3000/not using PCIRootUID=0/1 These did not worked for Z9PA-D8, and I don't have PIKE card. I tried slot 2 and slot 4. And I modified (cut) my old 7600GT to fit x8 slot and tried slot 1,3,5, not worked. 7600GT in slot 1,3 is not recognized. In...

What is this sentence mean? Some DSDT edits are needed? ( Sorry, I'm not good at English. ) I didn't notice this configuration. It was disabled. Thanks! Sadly, situation did not changed when it enabled. I found "Enable C6" was enabled in clover configuration, so I disabled it. ( I had to...

@nikezzz Sadly it did not work for me... I tried dart=0, npci=0x2000/3000, PCIRootUID=0/1, AppleACPIPlatform Rollback, patched IOPCIFamily, but no luck. Always stuck at "IOAPIC: Version 0x20". I think it's a DSDT problem, but I must use DSDT.aml to solve "Should have 16 threads but...

this patch may work. perl -pi -e 's|\x00\x00\x0f\x84\xbe\x00\x00\x00\x4c\x89\x45\x98|\x00\x00\x90\xe9\xbe\x00\x00\x00\x4c\x89\x45\x98|g' kernel Fortunately I still have 10.10.1 vanilla kernel, so I checked binary diff and made this patch. I understand this patch skips something, but I...

I encountered a similar condition to you on GA-Z68MX-UD2H-B3+HD4000+GTX560Ti. With IGPEnabler=Yes and GraphicsEnabler=Yes, chimera said "nvidia rom patching failed", and boot failed. But, I succeeded to boot with IGPEnabler=Yes and GraphicsEnabler=No. In spite of GE=No, QE/CI of GTX560Ti...