[SUCCESS] ASUS Z270 ROG Maximus IX Hero - i7-7700K - 32GB RAM - Intel HD 630

[Bob_the_Tomato]

Ok, so now I want to get hardware encoding to work. I'm still using iMac 14,3 Sys ID.

I set config.plist/Devices/FakeID/IntelGFX=0x59128086
I set ig-platform-id 0x59120003
Set Inject Intel


No cigar...

 

[JCMunsonII]

Me either. I think for us NVidia users it may be broken permanently. NVidia put out a blurb stating they would not be supporting hardware encoding on Macs.

However, some have gotten it to work - I am not sure how as I have tried the solutions with no results.

 

[GrizzlyBR]

Updated to 10.13.4.

Backup/clone your system first.

Steps:

1. Update Clover Configurator (if using).
2. Update to latest Clover (if not already).
3. Copy latest apfs.efi to EFI>Clover>drivers64UEFI, replacing the existing apfs.efi.
4. Install latest Lilu, IntelGraphicsFixup, and NVidiaGraphicsFixup (new versions of the latter two are available as of the date of this post). Mine are in EFI>Clover>kexts>Other, so I just overwrote those versions.
5. If you want to backup/clone again, do so now.
6. In the App Store, go to Updates and start the update process.
7. Upon reboot, make sure the Installer is selected (Clover should auto-select that for you).
8. My system rebooted twice - so do expect that. First reboot was back to the installer, second reboot went into MacOS.
9. After installation, if using an NVidia card, you'll be prompted to install the NVidia drivers. Do so and restart.
10. After restart, you should also be prompted to install CUDA drivers if you are using them. If you were not prompted, go to the CUDA preferences. Install those drivers.

10.13.4 is now installed!

Happy Mac'ing!

EDIT: The only difference, in my case, were the kexts. They were not in my folder, so I left everything as it were. No updates there.
Apart from that, everything worked fine for me, except the issue mentioned in the post below!

 

[GrizzlyBR]

Actually, my USB 3.0 ports have become inactive after the update, because I did't have the correct port limit patch applied, so I decided to do thinks properly and now I'm in the process of Creating a custom SSDT so that my USB can work as it should.

The issue I'm stuck at is this. Any thoughts? Thanks!

 

[JCMunsonII]

Did you start with a blank file and copy code into it?

 

[GrizzlyBR]

No, I started from the template RehabMan provided.

 

[JCMunsonII]

OK, are you using the right version of MacIASL?

Also, this is what I have for the beginning of the patch block:

DefinitionBlock ("", "SSDT", 2, "hack", "UIAC-ALL", 0x00000000)
{
    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x02)
        {

 

[JCMunsonII]

Additionally, here is the comment section I have in place (I don't know if it matters or not as I'm not familiar with how those files operate):

/*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20161210-64(RM)
 * Copyright (c) 2000 - 2016 Intel Corporation
 *
 * Disassembling to non-symbolic legacy ASL operators
 *
 * Disassembly of iASLZrG9Xy.aml, Thu Apr 12 16:37:51 2018
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x000002B7 (695)
 *     Revision         0x02
 *     Checksum         0x13
 *     OEM ID           "hack"
 *     OEM Table ID     "UIAC-ALL"
 *     OEM Revision     0x00000000 (0)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20161210 (538317328)
 */

 

[GrizzlyBR]

It was my lack of programming knowledge that screwed things up. RehabMan pointed out that I can't write characters that are not 7-bit ASCII. So, that's it. I'll update de SSDT now and continue.

Thanks for your help.

 

[GrizzlyBR]

Well, I was able to save the SSDT, but extra ports are still showing up in IOReg.

Next, you'll have to decide which ports you're willing to sacrifice - you can only have a maximum 15. SS ports count as 2 each.

When you say that SS ports counts as 2 each, you mean the SS ports counts as 2 because they need to have a corresponding HS port (HS+SS), or does it mean that if I have a HSxx/SSxx pair, they actually take up 3 ports?

In simple terms, having both HSxx+SSxx entries in the SSDT, they use 2 or 3 ports in total?