[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

[djlild7hina]

We have a two CRC's (red): the first red CRC8 for the yellow and the second red CRC32 for everything else that's below (incl. dark green). It's for another card, but the principle is the same.
View attachment 474295

P.S. Do not forget about the little endian.

Sorry i'm confused. So you're saying I need to recalculate the CRC32 one too? I haven't adjusted anything past the second CRC32 so would I need to update something there?

 

[losinka]

Sorry i'm confused. So you're saying I need to recalculate the CRC32 one too? I haven't adjusted anything past the second CRC32 so would I need to update something there?

If you haven't changed anything and don't activated the port in the second block, then you don't need to recount it.

ThunderROM decoded

 

[djlild7hina]

If you haven't changed anything and don't activated the port in the second block, then you don't need to recount it.

ThunderROM decoded

Yeah, I've only changed byte 2 (Thunderbolt BUS ID) then recalculated the CRC8 value and updated byte 1. If I do this, There are 4 thunderbolt ports in System profile under the new Bus (made the second Titan Ridge card Bus 1) with a speed of Up to 40Gb/s x0.

If I change both cards to Bus 0 and recalculate the crc8 value it appears correct.

EDIT: ignore the firmware version, I've been testing different firmwares to see if it helps with display out with the CalDigit TS3 Plus. So far no luck but it didn't appear to work on my real Macbook Pro either so it's probably just a caldigit firmware issue.

 

[losinka]

@djlild7hina: this is your drom-1 from ssdt:



But the CRC32 is wrong, the right CRC is hier:



About your question - sorry, I don't know. My x299 sage/10 is not yet configured. I plan to put three TB cards in there...

upd: Why don't you want to make a separate SSDT for each TB card?

 

[blinkyspoogle]

Just wanted to give my most sincere thanks to the OP and the Catalina mini-guide author - after using my last hackintosh build for 8 years (still going strong), UAD Luna had me craving the Thunderbolt upgrade for my UAD Apollo interface. After browsing and following this thread for a few months before giving up on teasing myself and ordering all the hardware, thanks to this thread I went from a pile of boxes of parts to a fully booting machine with all hardware working, within a matter of a couple of hours. You guys are absolute legends, thank u so much for so much detail in these guides

 

[yapiyapo]

Hello¡ today i received my new videocard rx 5700 xt..all works great in 10.15.5 (19F101)
in this version its possible to have igpu + gpu???
and i dont view the gpu temperature in istat
too i tested the new "itunes" to sync iphone and ipad but i have problem in finder,sometimes i have a error connections with him...any idea??'

thx¡¡

 

[djlild7hina]

@djlild7hina: this is your drom-1 from ssdt:

View attachment 474299

But the CRC32 is wrong, the right CRC is hier:

View attachment 474300

About your question - sorry, I don't know. My x299 sage/10 is not yet configured. I plan to put three TB cards in there...

upd: Why don't you want to make a separate SSDT for each TB card?

The CRC32_C value comes from Casey's SSDT here.

[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

*** Thunderbolt DROM Micro-Guide for Gigabyte GC-Titan Ridge V1.0 *** Please do not quote this micro-guide in its entirety. Post a link instead. Target Audience for this Procedure: Gigabyte GC-Titan Ridge V1.0 owners with activated Thunderbolt Bus. To activate Thunderbolt Bus, it's...

www.tonymacx86.com

If I change the CRC32 value to 0x1B, 0xED, 0xF7, 0x91 ThunderboltPort 7 doesn't appear.

I put both under the same SSDT since they both appear under PC02-BR2A. The Sage board uses plx chips to split the slots so it was easier to use one SSDT.

 

[losinka]

If I change the CRC32 value to 0x1B, 0xED, 0xF7, 0x91 ThunderboltPort 7 doesn't appear.

I put both under the same SSDT since they both appear under PC02-BR2A. The Sage board uses plx chips to split the slots so it was easier to use one SSDT.

Once again.. This is the DROM from the original (unpatched) firmware (just unpacked the card and read it with the ch341a):



The CRC32 (in the red rectangle) is right for everything highlighted in white:


For port activation you need to change one byte only 02 C7 => 02 87. And now the CRC32 ll'be: 0x492A708B (8B 70 2A 49). You don't have to believe me, you can check it out for yourself Read your firmware (you have a new version) => check crc32 (matches) => activate port => recount crc32 => put it in your SSDT.

 

[djlild7hina]

Delete

 

[losinka]

What program are you using to read the bytes? Or is there a command for terminal?

sudo flashrom -p ch341a_spi -r your_file_to_save.bin

Thr flashrom can be installed with brew.

So basically I have to recount the crc32 with different firmwares?

You need to recount the crc32 if you some changed But you can check if the crc32 match.