Hello Genius - especially
@interferenc and
@kgp !
It's a really great to see a good news here when you have 'not great day'...
Especially VERY BIG pleasure to boot without TSCSync
You are THE best!
My info from last 2 hours of
1st paching bios,
2nd: TSCSync test on 2 version of OSX
3rd: Sleep/Wake tests on 10.13.3 and 10.13.4 public beta
(of course with the same BIOS options, verification with bdmesg, voltageshift,
notes from E.1 etc... )
(I use only ssdt.aml in patched folder, and 85%of paches/replacements in clover enabled,
2nd iMac Pro.aml not touched yet, and of course not used... yet)
I can boot without TSC Sync on 10.13.3 and 13.4b without problems.
Then:
first wake and sleep (like a baby) on 10.13.4
everything works great:
Code:
2018-02-04 19:08:01.337480+0100 0x3001 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000626.868317 AppleUSB20XHCIPort@03200000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.337573+0100 0x2f6f Default 0x0 0 0 kernel: (AppleUSBXHCI) 000626.868411 AppleUSB20XHCIPort@03100000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.337603+0100 0x2f19 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000626.868443 AppleUSB30XHCIPort@03400000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.337765+0100 0x2f12 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000626.868604 AppleUSB30XHCIPort@03300000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.760340+0100 0x2faa Default 0x0 0 0 kernel: (AppleUSBXHCI) 000627.291178 AppleUSB30XHCIPort@03400000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.760355+0100 0x309a Default 0x0 0 0 kernel: (AppleUSBXHCI) 000627.291194 AppleUSB20XHCIPort@03200000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.760475+0100 0x3087 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000627.291315 AppleUSB30XHCIPort@03300000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:01.760551+0100 0x3078 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000627.291390 AppleUSB20XHCIPort@03100000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:08:02.183428+0100 0x30ce Default 0x0 0 0 kernel: (AppleUSBXHCI) 000627.714267 AppleUSB20XHCIPort@03100000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
and 100x the almost the same thing
then
2nd sleep: I have to reboot manually and I can see...
Code:
iMac-Pro-de-G-BCP:~ gwbcp$ log show --last 10m | grep TSC
2018-02-04 18:50:41.138243+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
2018-02-04 18:50:43.002951+0100 0x8e Default 0x0 0 0 kernel: Unsynchronized TSC for cpu 6: 0x00000027924ee04c, delta 0x14491ab3c
2018-02-04 18:50:43.018880+0100 0x91 Default 0x0 0 0 kernel: Unsynchronized TSC for cpu 9: 0x00000027957e5a74, delta 0x14491ab96
2018-02-04 18:50:43.045990+0100 0x9b Default 0x0 0 0 kernel: Unsynchronized TSC for cpu 13: 0x000000279ad5e326, delta 0x14491ab88
2018-02-04 18:50:43.063784+0100 0x9e Default 0x0 0 0 kernel: Unsynchronized TSC for cpu 16: 0x000000279e598240, delta 0x14491ab88
2018-02-04 18:50:44.677339+0100 0x99 Default 0x0 0 0 kernel: Unsynchronized TSC for cpu 11: 0x00000027984569c4, delta 0x14491ab94
2018-02-04 18:30:32.108225+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
2018-02-04 18:44:04.340061+0100 0x3c1d Default 0x0 0 0 kernel: (AppleUSBXHCI) 000593.599352 AppleUSB20XHCIPort@03100000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 18:44:04.340083+0100 0x3b07 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000593.599373 AppleUSB30XHCIPort@03400000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 18:44:04.340088+0100 0x3c28 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000593.599380 AppleUSB20XHCIPort@03200000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
a lot of times the same line and
at the end
2018-02-04 18:52:37.108119+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
Without patch AppleUSBXHCI (USB port limit)
(it's weird because my ports which doesn't work before, now work pretty nice without that patch, maybe I missed something)
and result after 2nd wake: (after manually reset and reboot)
Code:
2018-02-04 19:44:01.108309+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
2018-02-04 19:47:23.338801+0100 0x1fad Default 0x0 0 0 kernel: (AppleUSBXHCI) 000148.877448 AppleUSB30XHCIPort@03300000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:47:23.338803+0100 0x2019 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000148.877449 AppleUSB20XHCIPort@03200000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
the same line xxxx times and:
2018-02-04 19:49:16.453395+0100 0x2e98 Default 0x0 0 0 kernel: (AppleUSBXHCI) 000261.523363 AppleUSB30XHCIPort@03300000: AppleUSBXHCIPort::powerOn: deadline passed (PORTSC 0x00000000)
2018-02-04 19:51:10.108557+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
then tests on final 10.13.3 (of course we don't need AppleUSBXHCI patch) so:
after clean boot:
2018-02-04 20:00:23.107853+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
after sleep: (fail - manual reboot needed)
Code:
2018-02-04 20:00:23.107853+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
2018-02-04 20:06:39.108440+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
and 2nd try after boot then sleep.. and again fail - PC won't wake up.
after reboot: nothing
simply
Code:
2018-02-04 20:18:42.108034+0100 0x0 Default 0x0 0 0 kernel: TSC Deadline Timer supported and enabled
So easy we can boot on both versions 10.13.3 and 13.4 public beta without TSC Sync which is great achievement in my opinion,
and sleep/wake tests (in my case) on 10.13.3 are wasting my time, what I said before, so it's good to know
(of course it's in my case.. which can be completely different for other people)