Radeon RX 6950 XT

[van7one]

You need to be using a recent version of RestrictEvents.kext plus the following boot argument (or NVRAM entries) in your config.plist. This will fix the PCI and Memory tab issues evident in your setup.

revpatch=auto

This boot argument will fix the PCI and Memory tab issues evident in your MacPro7,1 setup. I use the same boot argument in my AMD systems.

This boot argument is taken from the details below.

View attachment 577127

GitHub - acidanthera/RestrictEvents

Contribute to acidanthera/RestrictEvents development by creating an account on GitHub.

github.com

Much appreciated, thank you.

 

[van7one]

The SSDT shall apply the spoof… if it targets the right object.
"VGA" is likely the GPU itself (which usually goes by "GFX0" on Intel builds).
Your SSDT defines a further object, "PBR0" at address 0, as a child of VGA, and having itself child GFX1, to which the spoof is applied. I do not know where the PCI address 0 comes from, and the ACPI string from Windows shows no unnamed bridge.

Try the attached version.

Thank you again, is there a way to add the AMD Radeon 6950XT name instead of Navi21 in the SSDT and not using device properties?

 

[etorix]

Sure: Add the properties to the package in the _DSM method. That's how the spoof of 'device-id' is applied.

Adjust the size of the package as required by the number of items, and the size of each buffer to the size of the string.

 

[van7one]

Sure: Add the properties to the package in the _DSM method. That's how the spoof of 'device-id' is applied.

Adjust the size of the package as required by the number of items, and the size of each buffer to the size of the string.

View attachment 577145

PERFECT can't thank you enough.

 

[van7one]

Sure: Add the properties to the package in the _DSM method. That's how the spoof of 'device-id' is applied.

Adjust the size of the package as required by the number of items, and the size of each buffer to the size of the string.

View attachment 577145

Could you take a quick look at this SSDT and see if you notice why it does not work? Asking for a friend

 

[etorix]

Could you take a quick look at this SSDT and see if you notice why it does not work? Asking for a friend

Sure. The SSDT renames _SB.PCI0.GPP0.VGA to _SB.PCI0.GPP0.EGP0 (disables VGA with _STA = Zero and defines an EGP0 object at the same address _ADR). Then it defines an EGP1 object as a child of EGP0, and applies the spoof to it, alongside cosmetic properties.
For reasons I do not understand, the SSDT also disables _SB.PCI0.GPP0.SWUS and _SB.PCI.GPP0.SWDS and defines wake resources _PRW for the (presumed) GPU, alongside ATIF and AF00 to AF02 (unknown purpose).

Incidentally, I note that this SSDT depends on method DTGP() being defined elsewhere, so SSDT-DTGP.aml must be present and enabled in the EFI folder; if not, this SSDT cannot work.
And the SSDT imports an external BRTL object which is actually never used—but that's not why it doesn't work.

Now, let's look at IOReg. We do find the RX6950XT (device-id 0x73A5) as a GFX0 object under GPP0, with two unnammed PCI bridges in between ('pci-bridge@0', the '@' part being the PCI address).

The intended names EGP0 and EGP1 for these bridges are not applied. I'm not sure why.
Maybe the unnecessary line
Return (0x80000002)
is causing the whole SSDT to fail?

Here is a cleaned-up SSDT-RX6950XT, which retains _PRW, ATIB and AF__, and a further streamlined SSDT-RX6950XT-SPOOF, which only applies the spoof and properties. Only one of the .aml should be used, alongside SSDT-DTGP.aml; .dsl files are provided for convenience in reading the code.

 

[van7one]

Sure. The SSDT renames _SB.PCI0.GPP0.VGA to _SB.PCI0.GPP0.EGP0 (disables VGA with _STA = Zero and defines an EGP0 object at the same address _ADR). Then it defines an EGP1 object as a child of EGP0, and applies the spoof to it, alongside cosmetic properties.
For reasons I do not understand, the SSDT also disables _SB.PCI0.GPP0.SWUS and _SB.PCI.GPP0.SWDS and defines wake resources _PRW for the (presumed) GPU, alongside ATIF and AF00 to AF02 (unknown purpose).

View attachment 577468


Incidentally, I note that this SSDT depends on method DTGP() being defined elsewhere, so SSDT-DTGP.aml must be present and enabled in the EFI folder; if not, this SSDT cannot work.
And the SSDT imports an external BRTL object which is actually never used—but that's not why it doesn't work.

Now, let's look at IOReg. We do find the RX6950XT (device-id 0x73A5) as a GFX0 object under GPP0, with two unnammed PCI bridges in between ('pci-bridge@0', the '@' part being the PCI address).

View attachment 577471

The intended names EGP0 and EGP1 for these bridges are not applied. I'm not sure why.
Maybe the unnecessary line
Return (0x80000002)
is causing the whole SSDT to fail?

Here is a cleaned-up SSDT-RX6950XT, which retains _PRW, ATIB and AF__, and a further streamlined SSDT-RX6950XT-SPOOF, which only applies the spoof and properties. Only one of the .aml should be used, alongside SSDT-DTGP.aml; .dsl files are provided for convenience in reading the code.

Again your skill amazes me, I will forward the information. Thank you. I was not aware of the dependency on DTGP.aml or I would have provided it for you, I'm sorry about that. So the RX6950XT and the DTGP are required, whereas your original spoof that you provided a few days ago works alone. DTGP enabled added your updated RX6950XT and bam it works. I provided the IO/reg. There's a SSDT enabled in the ACPI>Delete section, once that is removed or disabled, I loose acceleration and cant understand why I did not require it before and idea? If there is a way I can thank you for all your help, please let me know.

 

[etorix]

My "skills" are limited to knowing just enough to adapt the templates created by others. I have no idea where this DTGP() method comes from, how it works and why it is required to actually inject the properties.

I was not aware of the dependency on DTGP.aml or I would have provided it for you, I'm sorry about that.

No problem, DTGP() is a very well known entity, and the SSDT is purely standard.
I assume your friend knew about the dependency, and i'm curious about any explanation (s)he can can provide about the _PRW, ATIB and ATF0_ extras.

So the RX6950XT and the DTGP are required, whereas your original spoof that you provided a few days ago works alone.

I've kept that as provided. The SSDT can be made self-suficient by including the definition of the DTGP() method, either the full form, as in SSDT-DTGP, or the short form below, as found in most spoofing SSDTs in this thread.

Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
{
         If ((!Arg2 || !_OSI ("Darwin")))
         {
                 Return (Buffer (One) {0x03})
         }

         Local0 = Package ( SIZE )
         {
               // YOUR PROPERTIES HERE
          }
          Return (Local0)
}

And, of course, another way to spoof the GPU is to provide a suitable SSDT-BRG to name the PCI bridges, and then to apply the properties from DeviceProperties in the config.plist, using the PCI path which can also be read from IOReg, in this case
PciRoot(0x0)/Pci(0x0,0x0)/Pci(0x1,0x1)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
(_SB is PciRoot, addresses of further objects can be seen after '@': PCI0@0, GPP0@1,1, pci-bridge@0 twice, GFX0@0)

Hopefully, the various examples in this thread will help others making their own solutions.

 

[van7one]

My "skills" are limited to knowing just enough to adapt the templates created by others. I have no idea where this DTGP() method comes from, how it works and why it is required to actually inject the properties.


No problem, DTGP() is a very well known entity, and the SSDT is purely standard.
I assume your friend knew about the dependency, and i'm curious about any explanation (s)he can can provide about the _PRW, ATIB and ATF0_ extras.


I've kept that as provided. The SSDT can be made self-suficient by including the definition of the DTGP() method, either the full form, as in SSDT-DTGP, or the short form below, as found in most spoofing SSDTs in this thread.

Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
{
         If ((!Arg2 || !_OSI ("Darwin")))
         {
                 Return (Buffer (One) {0x03})
         }

         Local0 = Package ( SIZE )
         {
               // YOUR PROPERTIES HERE
          }
          Return (Local0)
}

And, of course, another way to spoof the GPU is to provide a suitable SSDT-BRG to name the PCI bridges, and then to apply the properties from DeviceProperties in the config.plist, using the PCI path which can also be read from IOReg, in this case
PciRoot(0x0)/Pci(0x0,0x0)/Pci(0x1,0x1)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
(_SB is PciRoot, addresses of further objects can be seen after '@': PCI0@0, GPP0@1,1, pci-bridge@0 twice, GFX0@0)

Hopefully, the various examples in this thread will help others making their own solutions.

"I assume your friend knew about the dependency, and i'm curious about any explanation (s)he can can provide about the _PRW, ATIB and ATF0_ extras." I will ask him.

 

[van7one]

My "skills" are limited to knowing just enough to adapt the templates created by others. I have no idea where this DTGP() method comes from, how it works and why it is required to actually inject the properties.


No problem, DTGP() is a very well known entity, and the SSDT is purely standard.
I assume your friend knew about the dependency, and i'm curious about any explanation (s)he can can provide about the _PRW, ATIB and ATF0_ extras.


I've kept that as provided. The SSDT can be made self-suficient by including the definition of the DTGP() method, either the full form, as in SSDT-DTGP, or the short form below, as found in most spoofing SSDTs in this thread.

Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
{
         If ((!Arg2 || !_OSI ("Darwin")))
         {
                 Return (Buffer (One) {0x03})
         }

         Local0 = Package ( SIZE )
         {
               // YOUR PROPERTIES HERE
          }
          Return (Local0)
}

And, of course, another way to spoof the GPU is to provide a suitable SSDT-BRG to name the PCI bridges, and then to apply the properties from DeviceProperties in the config.plist, using the PCI path which can also be read from IOReg, in this case
PciRoot(0x0)/Pci(0x0,0x0)/Pci(0x1,0x1)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
(_SB is PciRoot, addresses of further objects can be seen after '@': PCI0@0, GPP0@1,1, pci-bridge@0 twice, GFX0@0)

Hopefully, the various examples in this thread will help others making their own solutions.

"

_PRW, ATIB and ATF0_ extras are device registers PRW is the Power patch.