Radeon RX 6950 XT

[van7one]

My "skills" are limited to knowing just enough to adapt the templates created by others. I have no idea where this DTGP() method comes from, how it works and why it is required to actually inject the properties.


No problem, DTGP() is a very well known entity, and the SSDT is purely standard.
I assume your friend knew about the dependency, and i'm curious about any explanation (s)he can can provide about the _PRW, ATIB and ATF0_ extras.


I've kept that as provided. The SSDT can be made self-suficient by including the definition of the DTGP() method, either the full form, as in SSDT-DTGP, or the short form below, as found in most spoofing SSDTs in this thread.

Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
{
         If ((!Arg2 || !_OSI ("Darwin")))
         {
                 Return (Buffer (One) {0x03})
         }

         Local0 = Package ( SIZE )
         {
               // YOUR PROPERTIES HERE
          }
          Return (Local0)
}

And, of course, another way to spoof the GPU is to provide a suitable SSDT-BRG to name the PCI bridges, and then to apply the properties from DeviceProperties in the config.plist, using the PCI path which can also be read from IOReg, in this case
PciRoot(0x0)/Pci(0x0,0x0)/Pci(0x1,0x1)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)
(_SB is PciRoot, addresses of further objects can be seen after '@': PCI0@0, GPP0@1,1, pci-bridge@0 twice, GFX0@0)

Hopefully, the various examples in this thread will help others making their own sol

Could you take one more look and maybe tell me why I lose acceleration?

 

[etorix]

Now the two PCI bridges appear as SWUS and SWDS. The names do not matter, but this suggest there is another SSDT doing the renames, and it conflicts with the spoof (which is not applied).

 

[van7one]

Now the two PCI bridges appear as SWUS and SWDS. The names do not matter, but this suggest there is another SSDT doing the renames, and it conflicts with the spoof (which is not applied).
View attachment 577542

Hello Again, could you help me one more time, I am moving my 6950XT from my AMD Hack which currently has a 6900XT to my Intel Hack, and I was wondering if anything needed to be changed to do so?

 

[etorix]

All that is needed—and has to be changed as required—are the ACPI path and PCI addresses to the GPU in the (undisclosed) Intel build.
IOReg, Hackintool, gfxutil… anything goes to get this information. Or find someone with the same board and who has already solved the same problem.

If SSDT-RX6900.aml in your attachement is a SSDT you were using successfully in the Intel build, it has all the information.
If you want to retain all all the _PRW, ATIF, AF0_ resources/registers in the SSTDT-RX6950 for the AMD build (these are mysteries to me, and a further quick search shows these were also a mystery for @CaseySJ back in 2021), alongside the cosmetic properties for the GPU, audio and USB controllers on the RX6950XT (these might be introduced through DeviceProperties, and a config.plist is arguably easier to edit than a SSDT), take SSDT-RX6950XT as a basis and replace references to _SB.PCI0.GPP0 by _SB.PC00.PEG1.

Further assuming that _SB.PC00.PEG1.PEGP is a valid bridge at address 0 which need no rename to EGP0 ("a PCI device by any other name…" says the programmer bard), here is an adapted SSDT for the Intel build, which has been made independent from SSDT-DTGP.

 

[van7one]

All that is needed—and has to be changed as required—are the ACPI path and PCI addresses to the GPU in the (undisclosed) Intel build.
IOReg, Hackintool, gfxutil… anything goes to get this information. Or find someone with the same board and who has already solved the same problem.

If SSDT-RX6900.aml in your attachement is a SSDT you were using successfully in the Intel build, it has all the information.
If you want to retain all all the _PRW, ATIF, AF0_ resources/registers in the SSTDT-RX6950 for the AMD build (these are mysteries to me, and a further quick search shows these were also a mystery for @CaseySJ back in 2021), alongside the cosmetic properties for the GPU, audio and USB controllers on the RX6950XT (these might be introduced through DeviceProperties, and a config.plist is arguably easier to edit than a SSDT), take SSDT-RX6950XT as a basis and replace references to _SB.PCI0.GPP0 by _SB.PC00.PEG1.

Further assuming that _SB.PC00.PEG1.PEGP is a valid bridge at address 0 which need no rename to EGP0 ("a PCI device by any other name…" says the programmer bard), here is an adapted SSDT for the Intel build, which has been made independent from SSDT-DTGP.

I never understood the reasoning behind the DTGP.aml file. I have been unable to reach the one who helped my with my hack originally. I know it was there for a reason I can't understand or explain. I thank you for the updated file it is working. I seem to understand every other word in your explanation, it's my ignorance I am sure, not your wording. I am just trying to keep the setup as close to the original EFI as possible only because it has worked so well for me over the past year. I included an I/O Reg along with my DTGP that was used with my 6900XT. Again thank you for your help, it is greatly appreciated.

 

[etorix]

Good to know it is working!

Understanding everything is not required (I do not understand what these ATIF, ATIB, AF00, etc. are contributing to a working hack…), spotting the key elements goes a good way.
For the sake of teaching to fish rather than providing a fish for the day, I'll use your files for an explanation.

At level 1, spot the key path elements, both in External declarations and in Scope (). Under the last valid element in the path (here _SB.PC00.PEGP on Intel, _SB.PCI0.GPP0 on AMD) are the bridge name declarations (template SSDT-BRG0 from Dortania).
A bridge declaration is "Device (NAME)" with a property for the address "Name (_ADR, address)". NAME can be any valid ACPI names (four alphanumeric characters, the first being a letter). The address is not always zero: You see the actual value in IOReg after '@'. If there are multiple bridges, as is the case here, there will be nested declarations.
Then comes the GPU device, generally GFX0 at address zero (could be different…). Indicating its presence completes naming the bridge in between. For spoofing, you further give GFX0 a Method (_DSM) as described in post #86. Properties in Package() will be injected: The most useful one is 'device-id' for the actual spoof; all other properties are cosmetic and could be defined under DeviceProperties in config.plist, which is easier to edit (at least you don't have to count the length of strings to declare it as buffer size in hexadecimal, taking account of the terminating NULL character for a C-string…).

Here, we already have complet SSDTs for a RX6900 on the Intel motheboard and a RX6950 on an AMD motherboard. All that is needed to have a SSDT for RX6950 on the Intel motherboard is to take the path (and possibly address) elements from SSDT-RX6900 and copy them into the SSDT-RX6950, replacing the AMD paths:
External declaration(s), and the whole bridge structure from Scope (LAST_VALID_ELEMENT) to Device (GFX0).
We can keep everything under GFX0.

At level 2, you can simplify the SSDT by:
- Removing the elements which are not used (External(_SB_.PC00) without a corresponding Scope(_SB.PC00); External(BTRL) where BTRL is not found anywhere.
- Replacing calls to the full DTGP() method in _DSM() by its simplified form (post #86).
- Spots that "Name (_STA, Zero)" (status: not active) disables a valid PEGP so it can be renamed as EGP0 just below. This brings no functional benefit, so we can directly use _SB.PC00.PEG1.PEGP as the last valid element in the ACPI path and name just one bridge (EGP1).

Result in IOReg, with the bridge named and the spoof applied:

We see out path elements, with their addresses after '@'.
Initially, EGP1 would have appeared as 'pci-bridge@0' and 'device-id' would have been <a5 73 00 00>.

 

[van7one]

Good to know it is working!

Understanding everything is not required (I do not understand what these ATIF, ATIB, AF00, etc. are contributing to a working hack…), spotting the key elements goes a good way.
For the sake of teaching to fish rather than providing a fish for the day, I'll use your files for an explanation.

View attachment 580590
At level 1, spot the key path elements, both in External declarations and in Scope (). Under the last valid element in the path (here _SB.PC00.PEGP on Intel, _SB.PCI0.GPP0 on AMD) are the bridge name declarations (template SSDT-BRG0 from Dortania).
A bridge declaration is "Device (NAME)" with a property for the address "Name (_ADR, address)". NAME can be any valid ACPI names (four alphanumeric characters, the first being a letter). The address is not always zero: You see the actual value in IOReg after '@'. If there are multiple bridges, as is the case here, there will be nested declarations.
Then comes the GPU device, generally GFX0 at address zero (could be different…). Indicating its presence completes naming the bridge in between. For spoofing, you further give GFX0 a Method (_DSM) as described in post #86. Properties in Package() will be injected: The most useful one is 'device-id' for the actual spoof; all other properties are cosmetic and could be defined under DeviceProperties in config.plist, which is easier to edit (at least you don't have to count the length of strings to declare it as buffer size in hexadecimal, taking account of the terminating NULL character for a C-string…).

Here, we already have complet SSDTs for a RX6900 on the Intel motheboard and a RX6950 on an AMD motherboard. All that is needed to have a SSDT for RX6950 on the Intel motherboard is to take the path (and possibly address) elements from SSDT-RX6900 and copy them into the SSDT-RX6950, replacing the AMD paths:
External declaration(s), and the whole bridge structure from Scope (LAST_VALID_ELEMENT) to Device (GFX0).
We can keep everything under GFX0.

At level 2, you can simplify the SSDT by:
- Removing the elements which are not used (External(_SB_.PC00) without a corresponding Scope(_SB.PC00); External(BTRL) where BTRL is not found anywhere.
- Replacing calls to the full DTGP() method in _DSM() by its simplified form (post #86).
- Spots that "Name (_STA, Zero)" (status: not active) disables a valid PEGP so it can be renamed as EGP0 just below. This brings no functional benefit, so we can directly use _SB.PC00.PEG1.PEGP as the last valid element in the ACPI path and name just one bridge (EGP1).

Result in IOReg, with the bridge named and the spoof applied:
View attachment 580595
We see out path elements, with their addresses after '@'.
Initially, EGP1 would have appeared as 'pci-bridge@0' and 'device-id' would have been <a5 73 00 00>.

Thank you for the details, that really helps allot.