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How to build your own iMac Pro [Successful Build/Extended Guide]

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Ugh, so I got the MatchOS format incorrect? Why do you advocate not using it? I need to be developing under both OS releases throughout the day, and I thought that this is what MatchOS is for.

The matchOS entries just introduce confusion to OSX and might be also applied to all other patches without MatchOS entries. Use different EFI-Folders for each macOS build. Each macOS should have it's system disk and it's EFI-Folder. In this case all macOS entries in the kext patches should be totally obsolete.

Sadly, no - there's still nothing under _SB/PC03@0/BR3X@10000/UPSB@0/DSB2@20000 save for a lonely IOPP entry.

I did not check yet whether or not your SSDTs and your particular ACPI path are properly implemented..

Which variable you get after nulling BR3B.SL0A? Maybe you have to null another variable after nulling BR3B.SL0A? Something is totally wrong. DSB2 should never be empty (even no XHC USB device is connected), in case SSDT-TB3-_L69-BR1X.aml also properly applies. It is also empty, after connecting a XHC USB device directly to your TB-Adaptor? Why do you have all XHC USB ports under DSB1 instead of DSB2? Are these USB ports part of your monitor? Maybe that's why the implementation of DSB2 fails straight away? Can you disable the USB ports on your monitor for testing? I am not familiar with such TB configuration.

I use an LG 5K UltraFine display as my only display - it's a TB3 display, so there is always a TB device connected. The KP happens every time I try to wake the machine, sadly.

That's weird.. I never faced any KP issue when using TB.

Edit:

BTW.. you know that against all instructions you did not rename and order ALL CPs! Thus, currently you are running a strange mixture of PRs and CPs. No idea what would be the consequence of such CPU core implementation .
 
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Each macOS should have it's system disk and it's EFI-Folder. In this case all macOS entries in the kext patches should be totally obsolete.

I only have 1 physical disk, so they need to share the same EFI partition, sadly. I know I'm on my own with this one, but APFS does make it pretty easy to add/remove new test OS partitions.

Which variable you get after nulling BR3B.SL0A? Something is totally wrong. DSB2 should never be empty (even no XHC USB device is connected), in case SSDT-TB3-_L69-BR1X.aml also properly applies. It is also empty, after connecting a XHC USB device?

I removed the SSDTs for ThunderBolt, and specifically removed SL0A - here's the result in IOReg:

Screen Shot 2018-06-26 at 15.24.57.png


If I connect a Belkin USB-C to Ethernet adapter I have here before boot, then the entries seem to show up.

That would point to something not matching correctly if I'm using an adapted version of SSDT-TB3-_L69-BR1X.aml, right?

Why do you have all XHC USB ports under DSB1 instead of DSB2? Are these USB ports part of your monitor? Maybe that's why the implementation of DSB2 fails straight away?

Yes, they're behind a downstream (upstream?) TB3 switch within the display itself. I suspect you're correct about that…

BTW.. you know that against all instructions you did not rename and order ALL CPs! Thus, currently you are running a strange mixture of PRs and CPs. No idea what would be the consequence of such CPU core implementation .

I didn't know! I thought I only needed to rename the ones that were active/in-use for an i9 7900X?
 
I only have 1 physical disk, so they need to share the same EFI partition, sadly. I know I'm on my own with this one, but APFS does make it pretty easy to add/remove new test OS partitions.



I removed the SSDTs for ThunderBolt, and specifically removed SL0A - here's the result in IOReg:

View attachment 337672

If I connect a Belkin USB-C to Ethernet adapter I have here before boot, then the entries seem to show up.

That would point to something not matching correctly if I'm using an adapted version of SSDT-TB3-_L69-BR1X.aml, right?



Yes, they're behind a downstream (upstream?) TB3 switch within the display itself. I suspect you're correct about that…



I didn't know! I thought I only needed to rename the ones that were active/in-use for an i9 7900X?

You have to rename and order all CPs not only the populated ones. Either leave all CP implementations or use exclusively PR implementations. Look to your IOREG. Currently you have a mess of CPs and PRs..
 
Either leave all CP implementations or use exclusively PR implementations.

In the interests of keeping things moving, I've removed the renaming of CPs to PRs - it's purely cosmetic, correct?
 
In the interests of keeping things moving, I've removed the renaming of CPs to PRs - it's purely cosmetic, correct?

I guess yes..
 
I have a block of CP0A...CP0F entries that are inactive between my active CP10 and CP11 entries. I'm just a bit stumped on how I'd order the remaining entries - does it matter?

Oh, I'm a fool! You're just talking about doing `s/CP/PR`, so the suffix identifiers stay the same? `CP0A` becomes `PR0A`, and so on? :lol:
 
I have a block of CP0A...CP0F entries that are inactive between my active CP10 and CP11 entries. I'm just a bit stumped on how I'd order the remaining entries - does it matter?

Oh, I'm a fool! You're just talking about doing `s/CP/PR`, so the suffix identifiers stay the same? `CP0A` becomes `PR0A`, and so on? :lol:

Nope..

CP0A... CP0F becomes PR20...PR25
CP1A... CP1F becomes PR26...PR31
etc.

In total you will each PR55.
 
I have a block of CP0A...CP0F entries that are inactive between my active CP10 and CP11 entries. I'm just a bit stumped on how I'd order the remaining entries - does it matter?

Oh, I'm a fool! You're just talking about doing `s/CP/PR`, so the suffix identifiers stay the same? `CP0A` becomes `PR0A`, and so on? :lol:

Look back at my posts in this thread from a week or 2 ago. You’ll find all the entries you need for 7900X. Sorry on my phone so not able to find it myself right now.

Edit: this should be it -> https://www.tonymacx86.com/goto/post?id=1762317#post-1762317
 
@kgp If i have a thunderbolt drive connected and load SSDT-X299-TB3-iMacPro-Gigabyte.aml my computer stalls booting. As soon as I unplug the drive it continues and boots fine. But obviously, this is not working.

It does work with your: SSDT-TB3-X299-Lolo.aml and SSDT-TB3-L02-PR2X.aml no problems booting and hot plug works if I have the cable TB header cable removed
 
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Look back at my posts in this thread from a week or 2 ago. You’ll find all the entries you need for 7900X. Sorry on my phone so not able to find it myself right now.

Thanks, @flmmkr! I used Clover's RenameDevices dictionary for the first time for this - saved a lot of copying, pasting and converting between Hex/Int/ASCII :headbang:

Here's the relevant code from my config.plist if anyone else wants to do the same:

Code:
<key>RenameDevices</key>
<dict>
    <key>_SB.CP00</key>
    <string>PR00</string>
    <key>_SB.CP01</key>
    <string>PR01</string>
    <key>_SB.CP02</key>
    <string>PR02</string>
    <key>_SB.CP03</key>
    <string>PR03</string>
    <key>_SB.CP04</key>
    <string>PR04</string>
    <key>_SB.CP05</key>
    <string>PR05</string>
    <key>_SB.CP06</key>
    <string>PR06</string>
    <key>_SB.CP07</key>
    <string>PR07</string>
    <key>_SB.CP08</key>
    <string>PR08</string>
    <key>_SB.CP09</key>
    <string>PR09</string>
    <key>_SB.CP0A</key>
    <string>PR20</string>
    <key>_SB.CP0B</key>
    <string>PR21</string>
    <key>_SB.CP0C</key>
    <string>PR22</string>
    <key>_SB.CP0D</key>
    <string>PR23</string>
    <key>_SB.CP0E</key>
    <string>PR24</string>
    <key>_SB.CP0F</key>
    <string>PR25</string>
    <key>_SB.CP10</key>
    <string>PR10</string>
    <key>_SB.CP11</key>
    <string>PR11</string>
    <key>_SB.CP12</key>
    <string>PR12</string>
    <key>_SB.CP13</key>
    <string>PR13</string>
    <key>_SB.CP14</key>
    <string>PR14</string>
    <key>_SB.CP15</key>
    <string>PR15</string>
    <key>_SB.CP16</key>
    <string>PR16</string>
    <key>_SB.CP17</key>
    <string>PR17</string>
    <key>_SB.CP18</key>
    <string>PR18</string>
    <key>_SB.CP19</key>
    <string>PR19</string>
    <key>_SB.CP1A</key>
    <string>PR26</string>
    <key>_SB.CP1B</key>
    <string>PR27</string>
    <key>_SB.CP1C</key>
    <string>PR28</string>
    <key>_SB.CP1D</key>
    <string>PR29</string>
    <key>_SB.CP1E</key>
    <string>PR30</string>
    <key>_SB.CP1F</key>
    <string>PR31</string>
    <key>_SB.CP20</key>
    <string>PR32</string>
    <key>_SB.CP21</key>
    <string>PR33</string>
    <key>_SB.CP22</key>
    <string>PR34</string>
    <key>_SB.CP23</key>
    <string>PR35</string>
    <key>_SB.CP24</key>
    <string>PR36</string>
    <key>_SB.CP25</key>
    <string>PR37</string>
    <key>_SB.CP26</key>
    <string>PR38</string>
    <key>_SB.CP27</key>
    <string>PR39</string>
    <key>_SB.CP28</key>
    <string>PR40</string>
    <key>_SB.CP29</key>
    <string>PR41</string>
    <key>_SB.CP2A</key>
    <string>PR42</string>
    <key>_SB.CP2B</key>
    <string>PR43</string>
    <key>_SB.CP2C</key>
    <string>PR44</string>
    <key>_SB.CP2D</key>
    <string>PR45</string>
    <key>_SB.CP2E</key>
    <string>PR46</string>
    <key>_SB.CP2F</key>
    <string>PR47</string>
    <key>_SB.CP30</key>
    <string>PR48</string>
    <key>_SB.CP31</key>
    <string>PR49</string>
    <key>_SB.CP32</key>
    <string>PR50</string>
    <key>_SB.CP33</key>
    <string>PR51</string>
    <key>_SB.CP34</key>
    <string>PR52</string>
    <key>_SB.CP35</key>
    <string>PR53</string>
    <key>_SB.CP36</key>
    <string>PR54</string>
    <key>_SB.CP37</key>
    <string>PR55</string>
</dict>
 
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