- Joined
- Feb 7, 2016
- Messages
- 6
- Motherboard
- Gigabyte GA-Z170X-UD5-TH
- CPU
- i7-6700K
- Graphics
- GTX 980 Ti
GA-Z170X-UD5 TH Sample SSDT Clarifications
Thankfully, there's an SSDT (link) for the very motherboard I'm going to build against (GA-Z170X-UD5 TH) posted in the Appendix of the Skylake Starter Guide (link).
I am hoping to get some clarification on a couple of suspected typos (or copy/paste errors) in the comments within the SSDT source regarding USB ports and headers. If no one replies, I'll try to answer this here myself once I get up and running.
For USB 3 headers, the source shows the following:
I was expecting to see USB3 #1 and USB3 #2 for each of headers 1 and 2.
Does anyone know what the correct header and port mapping is? My hardware is all on the way from Amazon currently, so I can't just try it out. If I'm able to figure it out later, I'll post here.
I intend to exclude the two USB ports above the PS/2 port to reach my 15 port limit, but in case it helps anyone else, I also suspect a copy/paste error in that section of the source as well:
Does anyone out there know the mapping for those as well? Again, I'll post here later if I'm able to figure it out once my build is underway.
Thanks in advance.
Thankfully, there's an SSDT (link) for the very motherboard I'm going to build against (GA-Z170X-UD5 TH) posted in the Appendix of the Skylake Starter Guide (link).
I am hoping to get some clarification on a couple of suspected typos (or copy/paste errors) in the comments within the SSDT source regarding USB ports and headers. If no one replies, I'll try to answer this here myself once I get up and running.
For USB 3 headers, the source shows the following:
Code:
"SS05", Package() // USB3 #1 from USB3 motherboard header 2, port <15 00 00 00> {
"UsbConnector", 3,
"port", Buffer() { 0x15, 0, 0, 0 },
},
"SS06", Package() // USB3 #1 from USB3 motherboard header 2, port <16 00 00 00>
{
"UsbConnector", 3,
"port", Buffer() { 0x16, 0, 0, 0 },
},
"SS07", Package() // USB3 #1 from USB3 motherboard header 2, port <17 00 00 00>
{
"UsbConnector", 3,
"port", Buffer() { 0x17, 0, 0, 0 },
},
"SS08", Package() // USB3 #1 from USB3 motherboard header 2, port <18 00 00 00>
{
"UsbConnector", 3,
"port", Buffer() { 0x18, 0, 0, 0 },
},
I was expecting to see USB3 #1 and USB3 #2 for each of headers 1 and 2.
Does anyone know what the correct header and port mapping is? My hardware is all on the way from Amazon currently, so I can't just try it out. If I'm able to figure it out later, I'll post here.
I intend to exclude the two USB ports above the PS/2 port to reach my 15 port limit, but in case it helps anyone else, I also suspect a copy/paste error in that section of the source as well:
Code:
"HS11", Package() // USB2/USB3 device on USB2 port above PS/2, port <0b 00 00 00>
{
"UsbConnector", 0,
"port", Buffer() { 0x0b, 0, 0, 0 },
},
"HS12", Package() // USB2/USB3 device on USB2 port above PS/2, port <0c 00 00 00>
{
"UsbConnector", 0,
"port", Buffer() { 0x0c, 0, 0, 0 },
},
"HS13", Package() // USB2/USB3 device on USB2 port above PS/2, port <0d 00 00 00>
{
"UsbConnector", 0,
"port", Buffer() { 0x0d, 0, 0, 0 },
},
"HS14", Package() // USB2/USB3 device on USB2 port above PS/2, port <0e 00 00 00>
{
"UsbConnector", 0,
"port", Buffer() { 0x0e, 0, 0, 0 },
},
Does anyone out there know the mapping for those as well? Again, I'll post here later if I'm able to figure it out once my build is underway.
Thanks in advance.