[Solved] El Capitan sleep/wake problems!

[VioletDragon]

Thanks @VoiletDragon for the advice. Is there a way I can use iMac14,2 with my skylake i7 6700K 4.0GHz CPU?
I thought I had to change SMBIOS to iMac17,1 with that Skylake CPU. If so, I would appreciate if you could point me to it. I couldn't find it in this post by TonyMacx86.

Yes. Recommend to use iMac 14,2 to avoid black screen with Nvidia Cards but keep an eye on PM.

 

[KDL18]

Yes. Recommend to use iMac 14,2 to avoid black screen with Nvidia Cards but keep an eye on PM.

Hi @VoiletDragon, thanks so much again for your help. I hadn't had the chance to work on my setup till today.
I implemented the changes that you recommended, things are improving!
Yet I still seem to have a problem waking up now as my display still is frozen when I push the power button to wake up after a sleep.

Can you take a look at my IOReg file attached & config.plist & let me know if I need to add anything else?
I also added the native ACPI files dump (from EFI/Clover/ACPI/origin after I hit the Fn+F4 at Clover Bootloader screen) attached called "KDL18_ACPI_Origin.zip". I am presuming this is the Linux dump you mentioned, I may be wrong.

- I implemented Native PM with ssdtPRGen.sh and using iMac14,2. It seems to go OK now . See my AppleIntelInfo.dat results below.
- I also patched SATA (that was coming under SAT0) with your SSDT-SATA.aml patch, and it seems to be good now.
- I also hot patched the USB with USBInjectAll.kext placed in EFI/Clover/kexts/10.12 after upgrading clover to the latest version online version Clover_v2.3k_r3974. And I used JMacIV's SSDT-USB.aml (it is configured for both internal USB 2.0 headers on my board, plus the lower USB 3.0 header. Both USB 2.0 headers are set to internal ports. USB type 255. And I removed the raise port limit patch. So I'm assuming I am now within the 15 port restriction. I seem to see that in the IOReg. Am I right?
- I added the SSDT-XWAK.aml hot patch in ACPI/patched. But it didn't fix my instant wake from sleep issue.
So I added the SSDT-PRW.aml patch and it fixed my instant wake from sleep issue. However, I'm still having a frozen display after a wake from power button.
- And I also added the SSDT-SMBUS.aml & SSDT-LPC.aml patch.
- I couldn't figure out what to change in the SSDT-XHC.aml file.

Thank you so much again for your kind help.

--- Results for my Native Power Management on Skylake i7 6700K ----
CPU Ratio Info:

------------------------------------------

Base Clock Frequency (BLCK)............. : 100 MHz

Maximum Efficiency Ratio/Frequency.......: 8 ( 800 MHz)

Maximum non-Turbo Ratio/Frequency........: 40 (4000 MHz)

Maximum Turbo Ratio/Frequency............: 42 (4200 MHz)

P-State ratio * 100 = Frequency in MHz

------------------------------------------

CPU P-States [ (16) 40 42 ]

CPU C3-Cores [ 0 5 7 ]

CPU C6-Cores [ 0 2 3 4 5 ]

CPU C7-Cores [ 3 4 6 7 ]

CPU P-States [ (16) 34 40 42 ]

CPU C3-Cores [ 0 1 3 5 6 7 ]

CPU C6-Cores [ 0 2 3 4 5 6 ]

CPU C7-Cores [ 2 3 4 6 7 ]

CPU P-States [ (16) 34 35 40 42 ]

CPU C6-Cores [ 0 1 2 3 4 5 6 7 ]

CPU C3-Cores [ 0 1 2 3 5 6 7 ]

CPU P-States [ (16) 27 34 35 40 42 ]

CPU C7-Cores [ 2 3 4 5 6 7 ]

CPU P-States [ (16) 27 29 34 35 40 42 ]

CPU C3-Cores [ 0 1 2 3 4 5 6 7 ]

CPU P-States [ (16) 26 27 29 34 35 40 42 ]

CPU P-States [ (16) 25 26 27 29 34 35 40 42 ]

CPU P-States [ (16) 22 25 26 27 29 34 35 40 42 ]

CPU P-States [ (16) 22 25 26 27 29 34 35 36 40 42 ]

CPU P-States [ 16 22 25 26 27 29 31 34 35 36 (40) 42 ]

CPU P-States [ (11) 16 22 25 26 27 29 31 34 35 36 40 41 42 ]

CPU P-States [ 11 (16) 22 25 26 27 29 31 33 34 35 36 40 41 42 ]

CPU P-States [ 11 (16) 22 25 26 27 28 29 31 33 34 35 36 40 41 42 ]

CPU P-States [ 11 (16) 22 25 26 27 28 29 31 32 33 34 35 36 40 41 42 ]

CPU P-States [ 11 16 22 25 26 27 28 29 31 32 33 34 35 36 37 40 41 (42) ]

CPU P-States [ 11 (14) 16 22 25 26 27 28 29 31 32 33 34 35 36 37 40 41 42 ]

CPU P-States [ 11 14 16 22 25 26 27 28 29 30 31 32 33 34 35 36 37 40 41 (42) ]

CPU P-States [ 11 14 (16) 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 40 41 42 ]

CPU P-States [ 11 14 16 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 41 (42) ]

CPU P-States [ 11 14 (15) 16 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 41 42 ]

CPU P-States [ 11 (13) 14 15 16 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 41 42 ]

CPU P-States [ 11 13 14 15 (16) 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

CPU P-States [ 11 13 14 15 (16) 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

CPU P-States [ (8) 11 13 14 15 16 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

CPU P-States [ 8 11 13 14 15 (16) 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

 

[VioletDragon]

Hi @VoiletDragon, thanks so much again for your help. I hadn't had the chance to work on my setup till today.
I implemented the changes that you recommended, things are improving!
Yet I still seem to have a problem waking up now as my display still is frozen when I push the power button to wake up after a sleep.

Can you take a look at my IOReg file attached & config.plist & let me know if I need to add anything else?
I also added the native ACPI files dump (from EFI/Clover/ACPI/origin after I hit the Fn+F4 at Clover Bootloader screen) attached called "KDL18_ACPI_Origin.zip". I am presuming this is the Linux dump you mentioned, I may be wrong.

- I implemented Native PM with ssdtPRGen.sh and using iMac14,2. It seems to go OK now . See my AppleIntelInfo.dat results below.
- I also patched SATA (that was coming under SAT0) with your SSDT-SATA.aml patch, and it seems to be good now.
- I also hot patched the USB with USBInjectAll.kext placed in EFI/Clover/kexts/10.12 after upgrading clover to the latest version online version Clover_v2.3k_r3974. And I used JMacIV's SSDT-USB.aml (it is configured for both internal USB 2.0 headers on my board, plus the lower USB 3.0 header. Both USB 2.0 headers are set to internal ports. USB type 255. And I removed the raise port limit patch. So I'm assuming I am now within the 15 port restriction. I seem to see that in the IOReg. Am I right?
- I added the SSDT-XWAK.aml hot patch in ACPI/patched. But it didn't fix my instant wake from sleep issue.
So I added the SSDT-PRW.aml patch and it fixed my instant wake from sleep issue. However, I'm still having a frozen display after a wake from power button.
- And I also added the SSDT-SMBUS.aml & SSDT-LPC.aml patch.
- I couldn't figure out what to change in the SSDT-XHC.aml file.

Thank you so much again for your kind help.

--- Results for my Native Power Management on Skylake i7 6700K ----
CPU Ratio Info:

------------------------------------------

Base Clock Frequency (BLCK)............. : 100 MHz

Maximum Efficiency Ratio/Frequency.......: 8 ( 800 MHz)

Maximum non-Turbo Ratio/Frequency........: 40 (4000 MHz)

Maximum Turbo Ratio/Frequency............: 42 (4200 MHz)

P-State ratio * 100 = Frequency in MHz

------------------------------------------

CPU P-States [ (16) 40 42 ]

CPU C3-Cores [ 0 5 7 ]

CPU C6-Cores [ 0 2 3 4 5 ]

CPU C7-Cores [ 3 4 6 7 ]

CPU P-States [ (16) 34 40 42 ]

CPU C3-Cores [ 0 1 3 5 6 7 ]

CPU C6-Cores [ 0 2 3 4 5 6 ]

CPU C7-Cores [ 2 3 4 6 7 ]

CPU P-States [ (16) 34 35 40 42 ]

CPU C6-Cores [ 0 1 2 3 4 5 6 7 ]

CPU C3-Cores [ 0 1 2 3 5 6 7 ]

CPU P-States [ (16) 27 34 35 40 42 ]

CPU C7-Cores [ 2 3 4 5 6 7 ]

CPU P-States [ (16) 27 29 34 35 40 42 ]

CPU C3-Cores [ 0 1 2 3 4 5 6 7 ]

CPU P-States [ (16) 26 27 29 34 35 40 42 ]

CPU P-States [ (16) 25 26 27 29 34 35 40 42 ]

CPU P-States [ (16) 22 25 26 27 29 34 35 40 42 ]

CPU P-States [ (16) 22 25 26 27 29 34 35 36 40 42 ]

CPU P-States [ 16 22 25 26 27 29 31 34 35 36 (40) 42 ]

CPU P-States [ (11) 16 22 25 26 27 29 31 34 35 36 40 41 42 ]

CPU P-States [ 11 (16) 22 25 26 27 29 31 33 34 35 36 40 41 42 ]

CPU P-States [ 11 (16) 22 25 26 27 28 29 31 33 34 35 36 40 41 42 ]

CPU P-States [ 11 (16) 22 25 26 27 28 29 31 32 33 34 35 36 40 41 42 ]

CPU P-States [ 11 16 22 25 26 27 28 29 31 32 33 34 35 36 37 40 41 (42) ]

CPU P-States [ 11 (14) 16 22 25 26 27 28 29 31 32 33 34 35 36 37 40 41 42 ]

CPU P-States [ 11 14 16 22 25 26 27 28 29 30 31 32 33 34 35 36 37 40 41 (42) ]

CPU P-States [ 11 14 (16) 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 40 41 42 ]

CPU P-States [ 11 14 16 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 41 (42) ]

CPU P-States [ 11 14 (15) 16 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 41 42 ]

CPU P-States [ 11 (13) 14 15 16 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 41 42 ]

CPU P-States [ 11 13 14 15 (16) 22 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

CPU P-States [ 11 13 14 15 (16) 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

CPU P-States [ (8) 11 13 14 15 16 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

CPU P-States [ 8 11 13 14 15 (16) 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 ]

Powermanagement with working fine. You can tell if you look for X86Platform Plugin. SATA is coming under SATA which is correct. Note USBinjectall is useless without customising a SSDT-UIAC and from looking at ioreg USB is messy. Origin files are useless without Patchmatic files. You might want to try patching AppleLPC as its fixed problems with some Skylake hacks.

 

[KDL18]

Powermanagement with working fine. You can tell if you look for X86Platform Plugin. SATA is coming under SATA which is correct. Note USBinjectall is useless without customising a SSDT-UIAC and from looking at ioreg USB is messy. Origin files are useless without Patchmatic files. You might want to try patching AppleLPC as its fixed problems with some Skylake hacks.

Happy New Year @VoiletDragon !!! Great that SATA is correct & PM works fine, I can see that X86Platform plugin has all the Power States, yay!

- I think I got all the USB customized properly with a SSDT-UIAC.aml file. Can you verify my latest IOReg attached & SSDT-UIAC-KDL.dsl file? I got XHC overrides for only 14 ports. Thanks so much.

- For HS01/SS01 which are my PC's two front panel USB3 ports, they are linked directly to my motherboard's Internal F_USB30_1 20-PIN port which is a hub. So I used "255" as my connector type, hopefully I'm right.

- The only thing I didn't know what to do with was the two USB3.1 Type A & Type C ports I have at the back panel of my motherboard/PC as they don't show up in the XHC@14000000 port / PCI8086,a12f.
These USB3.1 type A & Type C ports show up in my RP05@1C,4->IOPP->PCI-Bridge@2->IOPP->PCI8086,15b6@0->AppleUSBXHCIAR@00000000 Port (from 0010 0000 to 0040 0000 Ports).
Should I change a .dsl file for that? which one if so?

- Also please find attached the .DSL disassembled origin files (F4 Clover) using "iasl -da -dl *.aml" via Terminal. Is it what you wanted? Sorry I'm not fully versed with patchmatic as a first time builder of a hackintosh. If I'm mistaken, please let me know how to give you the correct files for review. I copied the Terminal output to a file named "Disassembly_ACPI_Files_Terminal_Results.rtf"
It says after the command has executed:
Parsing completed
Disassembly completed
"ASL Output: SSDT-9x.dsl - 10820 bytes"

- I also added your SSDT-LPC.aml file in my EFI->Clover->ACPI->Patched folder. Is it what you mean by "try patching AppleLPC"? Or should I try using an AppleLPC.kext?
Note: At first, I didn't add a patch to make sure to remove _DSM in config.plist. After I added that _DSM change to XDSM, now I can see the AppleLPC kext running. So I'm assuming this SSDT-LPC.aml is working as supposed to be. In the IOReg file, I can see LPCB which works for your SSDT-LPC.aml.

output of "kextstat|grep -y applelpc"
127 0 0xffffff7f82fe8000 0x3000 0x3000 com.apple.driver.AppleLPC (3.1) F51595F0-F9B1-3B85-A1C3-F984DAD4107E <82 12 5 4 3>

Also, attached is my EFI->CLOVER config.plist.

Result: I still have a frozen display after "wake" after all the above have been added. So let me know if I'm missing something still.

Thank you again for being such a wonderful help & sorry for all the questions (this is my first hack & I've been at it for a month now). I think I'm getting closer everyday with your kind guidance

 

[newz2000]

Hi, a few replies ago the technical level of this thread went over my head. I too am having the same issue. I have an HP Z600 running Sierra quite well except that when it goes to sleep it doesn't properly wake up.

I have an nVidia GTX 950. I do have another issue, I thought it was minor but maybe it's related - some of my USB ports don't work, and the ones that do seem to all show as USB2.0. (maybe they are 2.0?)

I am eager to work through the problem. I followed the instructions for IOReg and am attaching the file as well as my config.plist. My technical level with Linux is high, my confidence with macOS is high, but my technical level with hackintosh is low.

 

[KDL18]

Hi, a few replies ago the technical level of this thread went over my head. I too am having the same issue. I have an HP Z600 running Sierra quite well except that when it goes to sleep it doesn't properly wake up.

I have an nVidia GTX 950. I do have another issue, I thought it was minor but maybe it's related - some of my USB ports don't work, and the ones that do seem to all show as USB2.0. (maybe they are 2.0?)

I am eager to work through the problem. I followed the instructions for IOReg and am attaching the file as well as my config.plist. My technical level with Linux is high, my confidence with macOS is high, but my technical level with hackintosh is low.

Hi @newz2000,
If you want to make sure your USB is working well. Just try and follow this thread's Post #1 / Step 7. procedure by ammulder (assuming you got skylake): https://www.tonymacx86.com/threads/10-11-0-10-11-3-skylake-starter-guide.179221/
but also read @RehabMan full explanations here : https://www.tonymacx86.com/threads/guide-10-11-usb-changes-and-solutions.173616/.

Once you got those steps done, you will have ensured to only use 15 port max & verified all your USB2.0 & USB3.0 ports are working as expected. Your IOReg would show that by searching for the term "USB" and seeing that "XHC@...." only has 15 max ports available/defined.

Ammulder's post is the best at explaining how to do it step by step, except he uses a file that's more complicated to modify than what RehabMan offers. Rehabman has a github rep (https://github.com/RehabMan/OS-X-USB-Inject-All) where there is a SSDT-UIAC-ALL.dsl template file that you can use to remove all the ports you don't need after you've used a USBInjectAll.kext file to inject all the ports on your motherboard & test which port actually is working & you want to keep. So this all depends on what type of board you got.

E.g. on my GA-Z170X-Gaming 7, I look at the file SSDT-UIAC-ALL.dsl & I just remove everything except the section that pertains to my board which is "PCI8086,a12f". You can download my SSDT-UIAC-KDL.dsl file above to see what I did from the original SSDT-UIAC-ALL.dsl file. The only thing I don't know what to do with is regarding USB3.1 Hubs, which I'm awaiting answer from @VoiletDragon - Looking forward to your help VoiletDragon . Thank you.

So basically, if you want your USB to work well, you need to combine the 2 procedures by RehabMan & Ammulder. Good luck on your side! It's a much longer process than 15-min for me, it took me pretty much all day to figure it out on my own at first... The secret is to find/read both RehabMan & Ammulder's posts.

Obviously you need to create an SSDT table by using SSDTPRgen.sh by PikeRAlpha, if you haven't done it yet (tip: Don't use PikeRAlpha master branch but its Beta Github). https://www.tonymacx86.com/threads/quick-guide-to-generate-a-ssdt-for-cpu-power-management.177456/
Though I'm assuming you already know that

 

[newz2000]

Thanks, I will check that out. I did not know about creating an SSDT table nor any of the tips, so I appreciate the time savers. Don't fall out of your chair laughing, but I don't have Skylake. Before Skylake was Broadwell, before that was Haswell, before that was Ivybridge, before that Sandybridge. What I have preceded that. *sigh*

The computer is very fast for the work that I do, especially with a good video card or two in it. And for the low cost of about $300!

By the way, I found the specs for my computer - all ports are USB2.0 so hopefully that makes my task easier. Though testing may be difficult since three of the ports are internal headers.

 

[KDL18]

Powermanagement with working fine. You can tell if you look for X86Platform Plugin. SATA is coming under SATA which is correct. Note USBinjectall is useless without customising a SSDT-UIAC and from looking at ioreg USB is messy. Origin files are useless without Patchmatic files. You might want to try patching AppleLPC as its fixed problems with some Skylake hacks.

Hi @VoiletDragon, sorry to bother you. I just wanted to know if you had any chance to look at my questions in post #44 (a few posts above). Thank you again for your kind help.

I've read as much as I could and have yet to be able to wake up from sleep without a frozen display. I agree it's probably related to USB. My motherboard has a "on/off" LED light that is lit for some reason even after computer is turned off.

 

[VioletDragon]

Hi @VoiletDragon, sorry to bother you. I just wanted to know if you had any chance to look at my questions in post #44 (a few posts above). Thank you again for your kind help.

I've read as much as I could and have yet to be able to wake up from sleep without a frozen display. I agree it's probably related to USB. My motherboard has a "on/off" LED light that is lit for some reason even after computer is turned off.

Attach all up to date files. Clover from EFI removing themes & ioreg ZIP attach.

 

[KDL18]

Attach all up to date files. Clover from EFI removing themes & ioreg ZIP attach.

Thanks so much for your response @VoiletDragon

Attached are my latest EFI Clover folder + IOREG zipped. Thank you.