SSDT generation script (Ivybridge PM)

[PikeRAlpha]

I am seeking some help with trying to understand how my system is reading my ssdt and whether I can actually get an overclock or not.

You can, but you don't seem to be using the latest version of ssdtPRGen. Well. I had to guess because you decided to drop the first line of the output of the script. And usually we would see this line:

Processor Declaration(s) Found in DSDT (ACPI 1.0 compliant)

But since I don't see that line, and the fact that I don't know what version you are using – we've only added it in a later version – I can only guess that the processor block declarations are missing in your DSDT. If that is the case then please add them to the generated SSDT (copy them from the factory SSDT's) and reboot with boot DropSSDT=Yes to see what it does. If not then please e-mail me, or attach a copy of IORegistryExplorer to your post. Thank you.

Note:Please make sure that you have a secondary way of booting, or you may end up with a broken configuration.

 

[PikeRAlpha]

Im tryin to figure out how to make a custom ssdt for overclocked i5 3570k 4.2ghz.
can someone help me?

See post #1 (under Overclocking).

 

[FTD0910]

You can, but you don't seem to be using the latest version of ssdtPRGen. Well. I had to guess because you decided to drop the first line of the output of the script. And usually we would see this line:

Processor Declaration(s) Found in DSDT (ACPI 1.0 compliant)

But since I don't see that line, and the fact that I don't know what version you are using – we've only added it in a later version – I can only guess that the processor block declarations are missing in your DSDT. If that is the case then please add them to the generated SSDT (copy them from the factory SSDT's) and reboot with boot DropSSDT=Yes to see what it does. If not then please e-mail me, or attach a copy of IORegistryExplorer to your post. Thank you.

Note:Please make sure that you have a secondary way of booting, or you may end up with a broken configuration.

Sorry for the bad screen shot, I attached a better one that should be complete. I also attached my DSDT the generated SSDT and the IOReg dump. Thanks for the help.

 

[mrkonow]

After reading many posts and trying different SMBIOS I only have 2 PStatesReached.

5/12/13 9:22:11.000 PM kernel[0]: MSRDumper PStatesReached: 16 34

sdtPRGen.sh v6.1 Copyright (c) 2013 by Pike R. Alpha----------------------------------------------------------------
Processor Declaration(s) Found in DSDT (ACPI 1.0 compliant)
Generating ssdt_pr.dsl for a Macmini6,2 [Mac-F65AE981FFA204ED]
Ivy Bridge Core i5-3570K processor [0x0601] setup
With a maximum TDP of 77 Watt, as specified by Intel
Number logical CPU's: 4 (Core Frequency: 3400 MHz)
Number of Turbo States: 4 (3500-3800 MHz)
Number of P-States: 23 (1600-3800 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Injected C-States for CPU1 (C1,C2,C3)
Warning: Model identifier [Macmini6,2] is missing from: /S*/L*/CoreServices/PlatformSupport.plist


Warning: 'cpu-type' may be set improperly (0x0601 instead of 0x0701)


Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation


ASL Input:     /Users/MrKO/Desktop/ssdt_pr.dsl - 231 lines, 7419 bytes, 36 keywords
AML Output:    /Users/MrKO/Desktop/ssdt_pr.aml - 1348 bytes, 15 named objects, 21 executable opcodes


Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations

 

[PikeRAlpha]

Sorry for the bad screen shot, I attached a better one that should be complete. I also attached my DSDT the generated SSDT and the IOReg dump. Thanks for the help.

Thanks for the added content. This helped me to locate the problem and I was right. The processor block definitions are part of a factory SSDT so what I would do is to replace the content of Scope (_PR) in the DSDT with this:

Processor (P000, 0x01, 0x00000410, 0x06) {}
Processor (P001, 0x02, 0x00000410, 0x06) {}
Processor (P002, 0x03, 0x00000410, 0x06) {}
Processor (P003, 0x04, 0x00000410, 0x06) {}

You can also use CPUn but then you also have to change the names in the generated SSDT. After this change you should be able to drop the factory SSDT's.

 

[PikeRAlpha]

After reading many posts and trying different SMBIOS I only have 2 PStatesReached.

Sorry but there appears to be something wrong with the attached IOREG because it won't even unzip here.

 

[FTD0910]

Processor (P000, 0x01, 0x00000410, 0x06) {}
Processor (P001, 0x02, 0x00000410, 0x06) {}
Processor (P002, 0x03, 0x00000410, 0x06) {}
Processor (P003, 0x04, 0x00000410, 0x06) {}

Thanks, this lets me boot with DropSSDT=Yes. But I still do not get an increased clock, the max is still 36 even with using a ferequency of 4200 when generating the ssdt. With Speedstep and Turbo enabled in my BIOS I thought the ssdt would dictate the frequencies. Am I missing something.

 

[PikeRAlpha]

...
Thanks, this lets me boot with DropSSDT=Yes. But I still do not get an increased clock, the max is still 36 even with using a ferequency of 4200 when generating the ssdt. With Speedstep and Turbo enabled in my BIOS I thought the ssdt would dictate the frequencies. Am I missing something.

Cool. We're one step closer now. Next. Please attach the output of ssdtPRGen and a new IORegistryExplorer.

Oh and disable EIST in the UEFI/BIOS – to let AppleIntelCPUPowerManagment.kext handle it – and see of that helps.

p.s. Don't let the bootloader generate P/C-States!

 

[giacomoleopardo]

Pike, just a quick question: I was taking a look to SSDT.aml generated by ~/ssdtPRGen.sh/ 4000 60, I noticed that the first package gives 0x2900 wich is dec 41. How come? You put +1 to reach the penultimate pstate? I'd like to understand how it works.

 

[PikeRAlpha]

Pike, just a quick question: I was taking a look to SSDT.aml generated by ~/ssdtPRGen.sh/ 4000 60, I noticed that the first package gives 0x2900 wich is dec 41. How come? You put +1 to reach the penultimate pstate? I'd like to understand how it works.

Yes. Without the extra P-State we would have been stuck at 800 MHz.