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Mavericks: Native CPU/IGPU Power Management

I had an i5-4670K and now an i7-4790K both ran wonderfully, however I could never get p-states other than 8 and base clock-turbo boost clocks (which right now is 40-47 for the 4790k and around 34-41 for the 4670K). Is there something I am missing or crazy, cause I tried to follow it down to the very detail and tried several times to no avail on getting anything other than those p-states.

I do get this from AICPUPMI:

Code:
7/16/14 1:54:23.000 AM kernel[0]: AICPUPMI: CPU P-States [ (8) 23 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 ] iGPU P-States [ (4) 8 ]

Seems like it never touches anything else but 8 and 40+
 
Having a little issue with PM. Everything else on the build is working great so far.



  1. Not sure if the SSDT worked, seems to have caused more erratic behavior at least in the Intel Power Gadget. Also the AICPUPMI seems to return values twice over. Are we meant to delete the AICPUPMI kext? I wasn't sure about that
  2. OS X 10.9.4/GA Z97N WIFI/BIOS F4/i7 4790K/MSI GTX 760
  3. Followed Stork here: and then yours on page 1 as his instructions didn't work for me completely (I didn't have the kexts from his initial instructions so couldn't verify). So installed the AICPUPMI kext, did the verify but Pstates weren't as long as yours so redid the SSDT and verification.
  4. Copy of IORegistryExplorer/IOJones (either)
    1. IOReg/File/Save a Copy As…, verify file (no ioreg.txt) attached
  5. Copy of AICPUPMI/Terminal attached
  6. Screenshot of Intel Power Gadget attached
  7. Chimera/Chameleon
    1. Extra/org.chameleon.Boot.plist attached
    2. Extra/ssdt.aml attached

Any help much appreciated.
 

Attachments

  • AICPUPMI.txt
    17.9 KB · Views: 157
  • Screen Shot 2014-07-16 at 4.05.22 PM.png
    Screen Shot 2014-07-16 at 4.05.22 PM.png
    110.7 KB · Views: 140
  • SSDT.aml
    2.2 KB · Views: 117
  • org.chameleon.Boot.plist
    1 KB · Views: 128
  • verify file.ioreg
    3.6 MB · Views: 92
Compared to what?

Sorry compared to before applying the SSDT. The duplicated AICPUPMI seems odd to me. Is this normal? What's your take?

Edit
Well I did another AICPUPMI log and got this. No more duplicate now.. seems to be working from what I can see..
 

Attachments

  • newAICPUPMI.txt
    7.7 KB · Views: 170
Sorry compared to before applying the SSDT. The duplicated AICPUPMI seems odd to me. Is this normal? What's your take?

Edit
Well I did another AICPUPMI log and got this. No more duplicate now.. seems to be working from what I can see..

Unfortunately did another one and now duplicates.. a lot.. anyone have any ideas or know if this is good/bad?

It is too large now to attach so had to compress.
 

Attachments

  • AICPUPMI.txt.zip
    6 KB · Views: 83
I have tried this procedure, but..getting some weird issues at boot and also the CPU load at "idle" is around 2-4Ghz.., which wasn't before. (at idle was arroung 800Mhz)
==
22/07/14 16:29:19,000 kernel[0]: IOPPF: XCPM mode
22/07/14 16:29:19,000 kernel[0]: XCPM: P-state table mismatch (error:0x12)
22/07/14 16:29:19,000 kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x12
22/07/14 16:29:19,000 kernel[0]: X86PlatformShim::start - Failed to send PStates
==

More details bellow:
1. OS X 10.9.4/ MB Asus Maximus Formula VI/ CPU i7-4790 / Geforce GTX 760 (no IGPU)
2. SSDT was created using ssdtPRGen.sh scipt (ssdtPRGen.sh -turbo 4100) and placed in EFI/Clover/ACPI/Patched/

Attached the Clover config.plist, SSDT and AICPUPMI dump.
 

Attachments

  • IOreg_copy.zip
    557.6 KB · Views: 77
  • aicpupmi_dump.txt
    25.8 KB · Views: 230
  • config.plist
    3 KB · Views: 225
  • SSDT.aml
    2.2 KB · Views: 127
  • Screen Shot 2014-07-22 at 16.51.00.jpg
    Screen Shot 2014-07-22 at 16.51.00.jpg
    81.5 KB · Views: 92
2. SSDT was created using ssdtPRGen.sh scipt (ssdtPRGen.sh -turbo 4100) and placed in EFI/Clover/ACPI/Patched/

What's your CPU multiplier set to in BIOS?
 
I used XMP profile 1, so it's set to auto. Using CPUz in Windows looks like it's set from 8 to 40 (fsb 102).
 
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