Contribute
Register

macOS Native CPU/IGPU Power Management

Just did this - I used ssdt-PRGen.sh previously. I now seem to have less states there before. Is this normal? Running Skylake Core i3-6100

Before (ssdtPRGen.sh):
Code:
Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 0
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0xb212eabac78
MWAIT C-States.....................: 1319200

Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35)  : 0x20004
MSR_PLATFORM_INFO..........(0xCE)  : 0x80838F1012500
MSR_PMG_CST_CONFIG_CONTROL.(0xE2)  : 0x1E008006
MSR_PMG_IO_CAPTURE_BASE....(0xE4)  : 0x31814
IA32_MPERF.................(0xE7)  : 0x32D74CD4DD
IA32_APERF.................(0xE8)  : 0x307960C2A0
MSR_FLEX_RATIO.............(0x194) : 0x0
MSR_IA32_PERF_STATUS.......(0x198) : 0x26A100002500
MSR_IA32_PERF_CONTROL......(0x199) : 0x2500
IA32_CLOCK_MODULATION......(0x19A) : 0x0
IA32_THERM_STATUS..........(0x19C) : 0x883B0000
IA32_MISC_ENABLES..........(0x1A0) : 0x850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x1CC1
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x25252525
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x1
MSR_POWER_CTL..............(0x1FC) : 0x2C005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA0E03
MSR_PKG_POWER_LIMIT........(0x610) : 0x42FFD0001AEA82
MSR_PKG_ENERGY_STATUS......(0x611) : 0x2540B3B
MSR_PKG_POWER_INFO.........(0x614) : 0x198
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x0
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x154BAA1
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PKGC6_IRTL.............(0x60b) : 0x8876
MSR_PKGC7_IRTL.............(0x60c) : 0x8894
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x3B684F6BE5
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x24212BC283
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0
IA32_TSC_DEADLINE..........(0x6E0) : 0xB2131C60D77

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 3700 MHz
CPU Maximum Turbo Frequency........: 3700 MHz
CPU P-States [ 35 (37) ]
CPU C3-Cores [ 0 1 2 3 ]
CPU C6-Cores [ 1 2 3 ]
CPU C7-Cores [ 2 3 ]
CPU P-States [ (8) 18 35 37 ]
CPU C6-Cores [ 0 1 2 3 ]
CPU P-States [ (8) 17 18 35 37 ]
CPU P-States [ 8 16 17 18 35 (37) ]
CPU P-States [ (8) 16 17 18 35 36 37 ]
CPU P-States [ (8) 16 17 18 22 35 36 37 ]
CPU P-States [ 8 16 17 18 22 25 35 36 (37) ]
CPU P-States [ (8) 16 17 18 21 22 25 35 36 37 ]
CPU P-States [ (8) 16 17 18 21 22 24 25 35 36 37 ]
CPU P-States [ (8) 15 16 17 18 21 22 24 25 35 36 37 ]
CPU P-States [ (8) 13 15 16 17 18 21 22 24 25 35 36 37 ]
CPU P-States [ 8 13 15 16 17 18 21 22 24 25 26 35 36 (37) ]
CPU P-States [ (8) 13 15 16 17 18 21 22 24 25 26 27 35 36 37 ]
CPU P-States [ 8 13 15 16 17 18 21 22 23 24 25 26 27 35 36 (37) ]
CPU P-States [ (8) 13 15 16 17 18 21 22 23 24 25 26 27 29 35 36 37 ]
CPU P-States [ (8) 13 15 16 17 18 21 22 23 24 25 26 27 29 31 35 36 37 ]
CPU P-States [ (8) 13 15 16 17 18 19 21 22 23 24 25 26 27 29 31 35 36 37 ]
CPU P-States [ (8) 13 14 15 16 17 18 19 21 22 23 24 25 26 27 29 31 35 36 37 ]
CPU P-States [ (8) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 29 31 35 36 37 ]
CPU P-States [ (8) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 29 31 34 35 36 37 ]
CPU P-States [ (8) 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 29 31 32 34 35 36 37 ]
CPU P-States [ (8) 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 29 31 32 34 35 36 37 ]
CPU P-States [ (8) 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 31 32 34 35 36 37 ]

After: (SSDT-XCMP.aml):
Code:
AppleIntelInfo.kext v1.4 Copyright © 2012-2015 Pike R. Alpha. All rights reserved

Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 0
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0xd7fc1fed3ee
MWAIT C-States.....................: 1319200

Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35)  : 0x20004
MSR_PLATFORM_INFO..........(0xCE)  : 0x80838F1012500
MSR_PMG_CST_CONFIG_CONTROL.(0xE2)  : 0x1E008006
MSR_PMG_IO_CAPTURE_BASE....(0xE4)  : 0x31814
IA32_MPERF.................(0xE7)  : 0x43AFA50C00
IA32_APERF.................(0xE8)  : 0x314438944F
MSR_FLEX_RATIO.............(0x194) : 0x0
MSR_IA32_PERF_STATUS.......(0x198) : 0x272600002500
MSR_IA32_PERF_CONTROL......(0x199) : 0x2500
IA32_CLOCK_MODULATION......(0x19A) : 0x0
IA32_THERM_STATUS..........(0x19C) : 0x883B0000
IA32_MISC_ENABLES..........(0x1A0) : 0x850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x1CC1
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x25252525
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x1
MSR_POWER_CTL..............(0x1FC) : 0x2C005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA0E03
MSR_PKG_POWER_LIMIT........(0x610) : 0x42FFD0001AEA82
MSR_PKG_ENERGY_STATUS......(0x611) : 0x32B0F92
MSR_PKG_POWER_INFO.........(0x614) : 0x198
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x0
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x21F67F4
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PKGC6_IRTL.............(0x60b) : 0x8876
MSR_PKGC7_IRTL.............(0x60c) : 0x8894
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x25B52835D1
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x172DAF3D8F
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0
IA32_TSC_DEADLINE..........(0x6E0) : 0xD7FC507DC3B

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 3700 MHz
CPU Maximum Turbo Frequency........: 3700 MHz
CPU P-States [ (8) 36 37 ]
CPU C3-Cores [ 0 1 3 ]
CPU C6-Cores [ 0 1 2 3 ]
CPU C7-Cores [ 2 3 ]
CPU C3-Cores [ 0 1 2 3 ]
CPU P-States [ (8) 19 36 37 ]
CPU P-States [ (8) 12 19 36 37 ]
CPU P-States [ (8) 12 19 21 36 37 ]
CPU P-States [ (8) 12 13 19 21 36 37 ]
CPU P-States [ (8) 12 13 19 21 24 36 37 ]
CPU P-States [ (8) 12 13 15 19 21 24 36 37 ]
CPU P-States [ (8) 12 13 15 19 21 22 24 36 37 ]
CPU P-States [ 8 12 13 15 17 19 21 22 24 36 (37) ]
CPU P-States [ 8 12 13 15 17 19 21 22 24 27 36 (37) ]
CPU P-States [ (8) 12 13 15 17 19 21 22 24 25 27 36 37 ]
CPU P-States [ (8) 12 13 15 17 19 21 22 24 25 26 27 36 37 ]

Edit: Above I was booting with my GT 710 as my display... here is the tail end I get when using SSDT-XCPM.aml when using the iGPU (HD 530):

Code:
...
p1 out of range
ref out of range
fp select out of range
pipe A dot 0 n 59 m1 43 m2 18 p1 1 p2 14
p2 out of range
p1 out of range
ref out of range
pipe B dot 0 n 59 m1 59 m2 18 p1 1 p2 1

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 3700 MHz
CPU Maximum Turbo Frequency........: 3700 MHz

IGPU Info:
------------------------------------
IGPU Current Frequency.............:    0 MHz
IGPU Minimum Frequency.............:  350 MHz
IGPU Maximum Non-Turbo Frequency...:  350 MHz
IGPU Maximum Turbo Frequency.......: 1050 MHz
IGPU Maximum limit.................: No Limit

CPU P-States [ (8) 33 37 ] iGPU P-States [ ]
CPU C3-Cores [ 0 1 3 ]
CPU C6-Cores [ 0 1 2 3 ]
CPU C7-Cores [ 2 3 ]
CPU P-States [ (8) 20 33 37 ] iGPU P-States [ ]
CPU P-States [ 8 20 22 33 (37) ] iGPU P-States [ ]
CPU C3-Cores [ 0 1 2 3 ]
CPU P-States [ 8 18 20 22 33 (37) ] iGPU P-States [ ]
CPU P-States [ (8) 18 20 22 33 36 37 ] iGPU P-States [ ]
CPU P-States [ 8 18 20 22 27 33 36 (37) ] iGPU P-States [ ]
CPU P-States [ 8 18 20 22 27 29 33 36 (37) ] iGPU P-States [ ]

Pstates observed will depend on how long you monitor and the variety of tasks you do while monitoring.
It is random sampling.

The more samples you take and the more varied the conditions (CPU load) under which the samples are taken, the more likely all values will be seen.
 
Pstates observed will depend on how long you monitor and the variety of tasks you do while monitoring.
It is random sampling.

The more samples you take and the more varied the conditions (CPU load) under which the samples are taken, the more likely all values will be seen.

Ok, so I let it run for a bit - ran Geekbench and CineBench, now I'm seeing this:

Code:
CPU P-States [ (8) 9 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 ]
iGPU P-States [ 2 5 7 10 11 12 13 14 (15) 16 17 18 19 20 21 ]

I also have the following .aml files installed (I also have a GT 710 I installed that I use sometimes):
Code:
HD530-SSDT-HDMI-HD530.aml
SSDT-PluginType1.aml           
HD530-SSDT-HDEF-HDAS-1.aml
Nvidia-SSDT-HDMI-NVIDIA-PEG0.aml
SSDT-XCPM.aml

I think that means everything is working, yes?

Finally, should I be at all concerned about this output that I see in my AppleIntelInfo.dat"
Code:
p1 out of range
ref out of range
fp select out of range
pipe A dot 0 n 59 m1 43 m2 18 p1 1 p2 14
p2 out of range
p1 out of range
ref out of range
pipe B dot 0 n 59 m1 59 m2 18 p1 1 p2 1
 

Attachments

  • Raptor.ioreg
    6.8 MB · Views: 160
HD530-SSDT-HDMI-HD530.aml
SSDT-PluginType1.aml
HD530-SSDT-HDEF-HDAS-1.aml
Nvidia-SSDT-HDMI-NVIDIA-PEG0.aml
SSDT-XCPM.aml
No need to rename ssdts.
SSDT-PluginType1.aml and SSDT-XCPM.aml are the same, remove one.
Rarely does combining two methods result in success.
 
Finally, should I be at all concerned about this output that I see in my AppleIntelInfo.dat"
Code:
p1 out of range
ref out of range
fp select out of range
pipe A dot 0 n 59 m1 43 m2 18 p1 1 p2 14
p2 out of range
p1 out of range
ref out of range
pipe B dot 0 n 59 m1 59 m2 18 p1 1 p2 1

No. This is just info on IGPU registers if one (developer) was interested.
 
No need to rename ssdts.
SSDT-PluginType1.aml and SSDT-XCPM.aml are the same, remove one.
Rarely does combining two methods result in success.
Oh I see! I wasn't trying to combine two methods...I was looking at post #1, requirement #3, and interpreted that as needing PluginType1. That wasn't clear to me at all!

I haven't fully caught on to your "shorthand" - I know you've been doing this a loooong time and you know it so well, I feel like I need two more words per instruction :) I'm willing to climb the curve though...sometime just feel like a need a decoder ring.

Thanks so much for all of your work.
 
Installation, step 6.
Installation always satisfies all requirements.

Maybe you should rename SSDT-XCPM.aml to SSDT-PluginType1.aml to avoid confusion.
Given my SSDT-PluginType1.dsl has existed for more than a year, it might not be a good time to introduce a new name for the same thing.
 
Well thanks. Instruction is not friendly but anyway.
But what is the benefit of this method comparing to usual generated ssdt?
 
Well thanks. Instruction is not friendly but anyway.

Remember, these are just words. We can't tell how he intends them or is stating them, so it is best not to "assume" any emotion. ;)
 
Back
Top