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[Guide] Creating a Custom SSDT for USBInjectAll.kext

@RehabMan, is there any reason to hang on to USR1 and USR2 in IO Reg?
 

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NorthAmTransAm said:
@RehabMan, is there any reason to hang on to USR1 and USR2 in IO Reg?
Click to expand...

You should be answering your own question after "port discovery". As written in post #1, any unused ports after complete port discovery should be eliminated.
 
RehabMan said:
PR11 should be attached to an internal hub, therefore should be UsbConnector=255.
Click to expand...
EH01.ports.PR11 for my Thinkpad T61 is an external USB port, so I changed 255 to 0. See attached screen shot.

Also, I figured out my T61 stability problems. I had Undervolt Step set to 9 in my CLOVER config.plist. It had been working great and kept CPU temps a little lower. Seems that my aging system no longer likes this. Clearing the Undervolt Step setting results in a stable system.
 

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deeveedee said:
EH01.ports.PR11 for my Thinkpad T61 is an external USB port, so I changed 255 to 0. See attached screen shot.
Click to expand...

Impossible to verify with that screen shot. Requires full PR files as requested post #1.

deeveedee said:
Also, I figured out my T61 stability problems. I had Undervolt Step set to 9 in my CLOVER config.plist. It had been working great and kept CPU temps a little lower. Seems that my aging system no longer likes this. Clearing the Undervolt Step setting results in a stable system.
Click to expand...

Off-topic.
 
deeveedee said:
If you're curious, full PR files are posted at #2689
Click to expand...

That was prior to fresh install, which I suggested later.

But looking at your profile, I see you have extremely old hardware. It is not unreasonable to expect that PR11 may be attached to a real port, as your hardware is older than the era where rate matching hubs on PR11 were common.
 
RehabMan said:
You should be answering your own question after "port discovery". As written in post #1, any unused ports after complete port discovery should be eliminated.
Click to expand...

I tried editing the working AML file but it wouldn't work (as if it didn't exist) so I started a fresh one for your GitHub and it did. Looks like I have some learning to do.
 
Last edited:
RehabMan said:
That was prior to fresh install, which I suggested later.

But looking at your profile, I see you have extremely old hardware. It is not unreasonable to expect that PR11 may be attached to a real port, as your hardware is older than the era where rate matching hubs on PR11 were common.
Click to expand...
Thank you. It is attached to a real port; however, I would love to learn more. What would I inspect in a PR dump to determine whether a port is "real" or internal.
 
Hello Rehabman,

Thank you for the clear instructions and all the hard work that you have put into this site.
This is my first time reaching out for support, please advise if I am missing information.

I've had success limiting ports, but get the following error when trying to eliminate EHCI. (I do not believe I need to keep EHCI)

"143, 6126, syntax error, unexpected PARSEOP_EXTERNAL, expecting $end and premature End-Of-File"

Can you advise how to get past this error?

Thank you in advance,
Ian


Here's my SSDT, other information attached.

Code: 
/*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20180427 (64-bit version)(RM)
 * Copyright (c) 2000 - 2018 Intel Corporation
 *
 * Disassembling to non-symbolic legacy ASL operators
 *
 * Disassembly of iASLVW4Upv.aml, Fri Dec  7 14:44:23 2018
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x000001AA (426)
 *     Revision         0x02
 *     Checksum         0xFF
 *     OEM ID           "hack"
 *     OEM Table ID     "_UIAC"
 *     OEM Revision     0x00000000 (0)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20180427 (538444839)
 */
DefinitionBlock ("", "SSDT", 2, "hack", "_UIAC", 0x00000000)
{
    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x02)
        {
            "8086_8xxx",
            Package (0x04)
            {
                "port-count",
                Buffer (0x04)
                {
                     0x15, 0x00, 0x00, 0x00                        
                },

                "ports",
                Package (0x10)
                {
                    "HS01",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x01, 0x00, 0x00, 0x00                        
                        }
                    },

                    "HS02",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x02, 0x00, 0x00, 0x00                        
                        }
                    },

                    "HS09",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x09, 0x00, 0x00, 0x00                        
                        }
                    },

                    "HS10",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x0A, 0x00, 0x00, 0x00                        
                        }
                    },

                    "SS01",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x10, 0x00, 0x00, 0x00                        
                        }
                    },

                    "SS02",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x11, 0x00, 0x00, 0x00                        
                        }
                    },

                    "SS05",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x14, 0x00, 0x00, 0x00                        
                        }
                    },

                    "SS06",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x15, 0x00, 0x00, 0x00                        
                        }
                    }
                }
            }
        })
    }
}
//
// Disabling EHCI #1
//
    External(_SB.PCI0, DeviceObj)
    External(_SB.PCI0.LPCB, DeviceObj)
    External(_SB.PCI0.EH01, DeviceObj)
    Scope(_SB.PCI0)
    {
        // registers needed for disabling EHC#1
        Scope(EH01)
        {
            OperationRegion(PSTS, PCI_Config, 0x54, 2)
            Field(PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE, 2  // bits 2:0 are power state
            }
        }
        Scope(LPCB)
        {
            OperationRegion(RMLP, PCI_Config, 0xF0, 4)
            Field(RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1, 32, // Root Complex Base Address
            }
            // address is in bits 31:14
            OperationRegion(FDM1, SystemMemory, Add(And(RCB1,Not(Subtract(ShiftLeft(1,14),1))),0x3418), 4)
            Field(FDM1, DWordAcc, NoLock, Preserve)
            {
                ,15,    // skip first 15 bits
                FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
            }
        }
        Device(RMD1)
        {
            //Name(_ADR, 0)
            Name(_HID, "RMD10000")
            Method(_INI)
            {
                // disable EHCI#1
                // put EHCI#1 in D3hot (sleep mode)
                Store(3, ^^EH01.PSTE)
                // disable EHCI#1 PCI space
                Store(1, ^^LPCB.FDE1)
            }
        }
    }
}
//EOF
 

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Last edited by a moderator:
NorthAmTransAm said:
I tried editing the working AML file but it wouldn't work (as if it didn't exist) so I started a fresh one for your GitHub and it did. Looks like I have some learning to do.
Click to expand...

Editing SSDT-UIAC.aml can be tricky as the iasl disassembler will fill in all package sizes, which you must then modify as a appropriate (when you make changes to the size of any package), or you must remove the package size specification to allow iasl to calculate the correct value.

This is why it is best to keep your .dsl source and compile to .aml for testing only. Then always edit your .dsl when making changes. Source code is important...and it is where you have appropriate comments regarding your ports anyway.
 
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