Z690 Chipset Motherboards and Alder Lake CPU

[StefanAM]

@StefanAM That is intriguing… The understanding so far was that OS X got processor information from MADT (APIC.aml table) and that there was no way to trick it through a SSDT. Could you provide the ACPI tables from MaciASL (File>Export tableset…) and the corresponding IOReg (or just indicate whether any of the ioregs you posted for @Elias64Fr corresponds to the situation with your cut-down SSDT-PLUG-ALT) to see what is going on?

Here you have. Origin folder from clover, IOReg, and the SSDT I use. In windows without touching the bios I have 24 processors and it work great, same on ubuntu. Tell me if you want something else.

 

[StefanAM]

@StefanAM

as said in this tread, clearing NVRAM is sometime required.

You can try with patches :

• device-id to C0940000
• compatible to 706369316436612C39346330000000
• kernel patch defined by @dehjomz or find on linked post (used as usual for AQC107 on BigSur+)
• make a NVRAM reset on Opencore piker

If nothing, try replacing on patch identifier com.apple.driver.AppleEthernetAquantiaAqtion by AppleEthernetAquantiaAqtion then NVRAM reset another time.

Hehehehheheh. It works man. Thank you! I have "en" on IOReg and Ethernet on Network. But it says cable unconnected. Any suggestion?

 

[etorix]

Here you have. Origin folder from clover, IOReg, and the SSDT I use. In windows without touching the bios I have 24 processors and it work great, same on ubuntu. Tell me if you want something else.

Thanks, but I really meant the MaciASL tableset from your current run, with all cores and HT enabled, because APIC.aml is a dynamic table… and the one I see in the original Clover dump was from a run with HT disabled.

 

[dehjomz]

@StefanAM That is intriguing… The understanding so far was that OS X got processor information from MADT (APIC.aml table) and that there was no way to trick it through a SSDT. Could you provide the ACPI tables from MaciASL (File>Export tableset…) and the corresponding IOReg (or just indicate whether any of the ioregs you posted for @Elias64Fr corresponds to the situation with your cut-down SSDT-PLUG-ALT) to see what is going on?

I tried this .aml but doesn’t work on Aero G. With HT enabled + 8 P cores + 4 E cores, X86_validate_topology() panics and says 12 cores but 16 processors found from madt.

 

[StefanAM]

Thanks, but I really meant the MaciASL tableset from your current run, with all cores and HT enabled, because APIC.aml is a dynamic table… and the one I see in the original Clover dump was from a run with HT disabled.

 

[StefanAM]

I tried this .aml but doesn’t work on Aero G. With HT enabled + 8 P cores + 4 E cores, X86_validate_topology() panics and says 12 cores but 16 processors found from madt.

Try this.

 

[CaseySJ]

I tried this .aml but doesn’t work on Aero G. With HT enabled + 8 P cores + 4 E cores, X86_validate_topology() panics and says 12 cores but 16 processors found from madt.

Try this.

I've tried a handful of variations, but none has worked so far (Z690 Aero G with i5-12600K).

 

[StefanAM]

I've tried a handful of variations, but none has worked so far (Z690 Aero G with i5-12600K).

Maybe it is another aml I attached. Look 2 post above. Or BIOS configuration. Or just my motherboard.

 

[StefanAM]

I think I know what it is. You need equal number of P and E cores. Doesn't work on uneven P and E cores processors.
I bet, if you make equal number of P and E cores in bios and use the according with the processors number the SSDT-PLUG-ALT.aml, it will work.

 

[StefanAM]

I've tried a handful of variations, but none has worked so far (Z690 Aero G with i5-12600K).

Disable 2 P cores. Enable HT and use this.