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How to build your own iMac Pro [Successful Build/Extended Guide]

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kgp said:
Please address your issue with all necessary information to the crowd and not only to me.. :) There are more experienced users here along this thread.. I am definitely not the only one who can provide help and support. I am working already 24 hours on build and guide development, and in addition I try to provide as much support as possible.

But really, I have to preserve some real life for me apart...
Click to expand...

Fair enough mate :) i see you guys are burning the midnight oil on the AGPM issues! and fixing up the SSDT's! good work! ill post it and keep my fingers crossed.Cheers
 
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perfecto245 said:
Fair enough mate :) i see you guys are burning the midnight oil on the AGPM issues! and fixing up the SSDT's! good work! ill post it and keep my fingers crossed.Cheers
Click to expand...

Note only that.. :) in paralell, I am developing Mojave X299 and x99 iMac Pro guides to be implemented here as soon as compatible with the board rules, which means in line with the official release of 10.14 PB1.
 
kgp said:
Note only that.. :) in paralell, I am developing Mojave X299 and x99 iMac Pro guides to be implemented here as soon as compatible with the board rules, which means in line with the official release of 10.14 PB1.
Click to expand...

That's awesome news! can't wait for that! good work buddy! , i am exited for that OS
 
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Some explanations to clarify and share my feedback and compilation on SSTs for Asus Thunderbolt EX3:

As mentioned bellow I wanted to adopt the SSDT-X299-TB3-iMacPro-KGP.aml witch contains implementations mainly developed by @apfelnico and @nmano, but also @mork vom Ork, @Matthew82, @maleorderbride and @TheRacerMaster. for my mobo.

At the beginning I was able to have some good feedback with my previous SSTD-TB3 adapted from one witch was shared by @Matthew82.

Then because I wasn't able to adopt directly the SSDT-X299-TB3-iMacPro-KGP.aml even according to my IOReg, I made the fusion between those 2 SSDTs.

The purpose was to obtain a full functional SSDT for my Gigabyte X299 UD4.

The challenge was amazing but long...

Step by step I compile this new RP21.PXSX SSDT , I made about 10 severals SSDT and I spent about 24 hours .

The result is good and my system is fully working with it.

I want to thanks again @kgp who spend here a lot of time, patience and advices for all of us.

Cheers.
 
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Loloflatsix said:
Some explanations to clarify and share my feedback and compilation on SSTs for Asus Thunderbolt EX3:

As mentioned bellow I wanted to adopt the SSDT-X299-TB3-iMacPro-KGP.aml witch contains implementations mainly developed by @apfelnico and @nmano, but also @mork vom Ork, @Matthew82, @maleorderbride and @TheRacerMaster. for my mobo.

At the beginning I was able to have some good feedback with my previous SSTD-TB3 adapted from one witch was shared by @Matthew82.

Then because I wasn't able to adopt directly the SSDT-X299-TB3-iMacPro-KGP.aml even according to my IOReg, I made the fusion between those 2 SSDTs.

The purpose was to obtain a full functional SSDT for my Gigabyte X299 UD4.

The challenge was amazing but long...

Step by step I compile this new RP21.PXSX SSDT , I made about 10 severals SSDT and I spent about 24 hours .

The result is good and my system is fully working with it.

I want to thanks again @kgp who spend here a lot of time, patience and advices for all of us.

Cheers.
Click to expand...

But now we need to know what you fused exactly between two codes as you say, apart from the change in the ACPI path definitions...

I am sorry to be that picky on that, but there is no other way to control any supposedly additionally implemented changes.

You know about the complexity and length of the TB-SSDT.aml. Nothing that can be compared or adopted just within two minutes.
 
@izo1 I've swapped the cable between port 1 & 3 to the wifi/BT card (connector 3 is the one used by most broadcom card for BT), and the BT problem is mostly resolved now.
It's not perfect, I still hear the occasional stutter, but for a start, my headset now connect instantly when I used to have to move the headset right next to the antenna before.

I still believe it's something to do with Apple BT stack, as yesterday I listened to audio on this Sennheiser headset in windows and not once did I have a problem.
 

TBH, most of that code in the SSDT serve no purpose, it calls ACPI method unique to Apple that aren't found.. it's just luck that those methods aren't called... otherwise it would crash.

Yesterday I got a Promise Pegasus 3 (TB3) to replace my Promise Pegasus 2, most of my TB issues are gone: can reboot the mac and the Pegasus still works, and can put to sleep and the drive will mount again.
 
taylorsyn said:
Yes @kgp it doesn't make sense to me don't take it personally, thanks! What I mean is my IO reg has the same number of CPxx but using a different CPU they are less populated (as its a ten core) but why would it hurt to rename the unused ones to PR?
Click to expand...
Check my posts in this thread from the past week and youll find some helpful info. You want to change the order and names.
 
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@mano @kgp

What is "TBRP"? I can not find it anywhere in the ACPI.

Code: 
DefinitionBlock ("", "SSDT", 1, "Mano", "L02", 0x00000000)
{
    External (_SB_.PC03, DeviceObj)    // (from opcode)
    External (_SB_.PC03.BR3B.HPEH, MethodObj)    // 1 Arguments (from opcode)
    External (_SB_.PC03.BR3B.PMEH, MethodObj)    // 1 Arguments (from opcode)
    External (_SB_.PC03.BR3B.PMEP, FieldUnitObj)    // (from opcode)
    External (_SB_.PC03.BR3B.UPSB, DeviceObj)    // (from opcode)
    External (_SB_.PC03.BR3B.UPSB.DSB0, DeviceObj)    // (from opcode)
    External (_SB_.PC03.BR3B.UPSB.DSB1, DeviceObj)    // (from opcode)
    External (_SB_.PC03.BR3B.UPSB.DSB2, DeviceObj)    // (from opcode)
    External (_SB_.PC03.BR3B.UPSB.DSB4, DeviceObj)    // (from opcode)
    External (IO80, FieldUnitObj)    // (from opcode)
    External (TBRP, UnknownObj)    // (from opcode)

    Method (_L02, 0, NotSerialized)  // _Lxx: Level-Triggered GPE
    {
        Sleep (0xC8)
        Store (One, IO80)
        Sleep (0x0A)
        Store (Zero, Local1)
        If (LEqual (\_SB.PC03.BR3B.PMEP, One))
        {
            Store (\_SB.PC03.BR3B.PMEH (0x09), Local0)
        }
        Else
        {
            Store (\_SB.PC03.BR3B.HPEH (0x09), Local0)
        }

        If (LEqual (ToInteger (TBRP), 0x22))
        {
            Store (0xFF, Local0)
            Store (One, Local1)
        }

        If (LNotEqual (Local0, 0xFF))
        {
            Store (One, Local1)
            Notify (\_SB.PC03.BR3B.UPSB, Local0)
            Notify (\_SB.PC03.BR3B.UPSB.DSB0, Local0)
            Notify (\_SB.PC03.BR3B.UPSB.DSB1, Local0)
            Notify (\_SB.PC03.BR3B.UPSB.DSB2, Local0)
            Notify (\_SB.PC03.BR3B.UPSB.DSB4, Local0)
        }
    }
}
 
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