Contribute
Register

How to build your own iMac Pro [Successful Build/Extended Guide]

Status
Not open for further replies.
View attachment 305401

Successfully running my iMac Pro Skylake-X/X299 Build with macOS High Sierra 10.13.3 (17D2047) Supplemental Update!

View attachment 308139

Abstract and Introduction:

This originating post constitutes a new macOS 10.13 High Sierra Desktop Guide for Skylake-X/X299, which certainly can still grow and improve by your estimated user feedback. This Skylake-X/X299 10.13 High Sierra Desktop Guide bases on the ASUS Prime X299 Deluxe (although initially, tests also have been performed with the Gigabyte X299 Aorus Gaming 9, thus this latter mainboard is also partly addressed in my guide below). However, also other X299 ASUS mainboard models or X299 mainboards of other brands should be compatible with this guide by considering a few mandatory modifications detailed below. The i7-7800X (6-core) was chosen as the Skylake-X Startup Configuration Model in order to minimise the guide development costs. It has been already replaced within the goal configuration by the i9-7980XE (18 core). All other Skylake-X models compatible with this guide are detailed in the figure below.

View attachment 276347

Carefully consider, which Skylake-X model might be the correct choice for your specific needs. Also the note of the following limitations:

a.) The i7-7640X and 7740X only support two channels DDR4-2666 and only posses 16 PCI express 3.0 lanes, which are already used up by implementing a state-of-the-art 16 lane PCIe graphics adapter. Thus, there are no further PCI express 3.0 lanes for using PCIe NVMe drives or additional PCIe adapters!

b.) The i7-7800X and i7-7820X already support four channels DDR4-2666 but however also possess only 28 PCI express 3.0 lanes! Thus by using a state-of-the-art 16 lane PCIe graphics adapter and a PCIe NVMe drive, there are nearly no PCI express 3.0 lanes remaining. When adding one or two additional PCIe adapters, one exceeds the 28 available PCI express 3.0 lanes by far! In this case, the resulting configuration might be error-prone!

c.) Thus, considering a.) and b.), I strongly recommend to start at least with the i9-7900X, which already supportsfour channels DDR4-2666 and also implements 44 PCI express 3.0 lanes

Further note, that for all Skylake-X processors, a sophisticated liquid cooling system is absolutely mandatory! For stock speeds something like the Corsair H115i might by sufficient. However, if somebody aims at OverClocking (OC) of the i9-7900X or Skylake-X Processors above, sophisticated Water Blocks for CPU and VRM of e.g. EKWB seem absolutely mandatory and unavoidable.

My Skylake-X/X299 System is up, fully stable and fully functional apart from the yet non-functional onboard WLAN (WIFI) module (chipset not natively supported by OS X). For Wifi, I therefore use the OSX WIFI PCIe Adapter instead.

Thanks to a very recent iMac Pro dump performed by @TheOfficialGypsy, we now have been able to successfully implement the necessary iMacPro1,1 details in both Clover_v2.4k_r4369 (thanks to Sherlocks) and Clover Configurator v4.60.0.0 (SMBIOS details, thanks to Mackie100) by beginning of January 2018. In collaboration with @macandrea we now achieved the full and direct implementation of macOSHigh Sierra 10.13.2 (17C2120), which can be subsequently updated to macOSHigh Sierra 10.13.3 (17D2047) or macOSHigh Sierra 10.13.4 Public Beta via the Appstore.

Note that with AptioMemoryFix.efi, the new Skylake/X299 iMac Pro build now also features fully native NVRAM support. No need for EmuVariableUefi-64.efi in /EFI/Clover/drivers64UEFI/ to properly transmit the SMBIOS iMacPro1,1 credentials to Apple.

Since 10.13 SU and with AppleIntelPCHPMC, Apple now natively implements IOPCIPrimaryMatchID "a2af8068" and AppleUSBXHCISPT on the ASUS Prime X299 Deluxe. Thus, all external and internal XHC USB 3.0 (USB 3.1 Gen 1 Type-A) and USB 2.0 (USB 2.0 Gen 1 Type-A) ports work natively at expected data transfer rates (90 Mb/S (USB 3.0)and 40 MB/s (USB 2.0), respectively) for all X299 mainboards. All external and internal USB 3.1 (USB 3.1 Gen 2 Type-A and Type-C) ports were natively implemented already before on different controllers than XHC and also work at data rates up to 140 MB/s. Up to my best knowledge, the native XHC USB implementation states for all X299 mainboards.

My former sophisticated XHC USB Kext Workaround and all respective Guidelines are are obsolete but still can be accessed at:
https://www.tonymacx86.com/threads/macos-high-sierra-10-13-xhc-usb-kext-creation-guideline.242999/

Also the ASUS Thunderbolt EX3 Extension Card is fully implemented except for hot plug functionality. E.g., external Thunderbolt drives connected via Apples Thunderbolt 3 to Thunderbolt 2 Adapter work at data rates and speeds similar to those of all USB 3.1 Gen 2 Type-A and Type-C connectors, i.e. 140 MB/s and above (see Section E.5 of my guide)!

Note that opposite to my previous EFI-Folder distributions, EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip does not contain any default audio configuration. You have to implement the audio approach of your choice during the Post Installation process in Section E.)! You can select between three possible audio implementations detailed in section E.3): 1.) The AppleALC audio approach (section E.3.1) bases on AppleALC.kext v1.2.2 and Lilu.kext v1.2.1 and could be implemented thanks to the extensive efforts and brilliant work of @vit9696 and @apfelnico . 2.) The VoodooHDA audio approach (section E.3.2) bases on the VoodooHDA.kext v2.9.0d10 and VoodooHDA.prefPane v1.2 and provides both analogue audio output/input and HDMI/DP digital audio output. 3.) Finally, @toleda 's cloverALC audio approach (section E.3.3) bases on the realtekALC.kext v2.8 and on an additional pathing of the native vanilla AppleHDA.kext in the /S/L/E/ directory of the System Disk and has been successfully implemented thanks to the instructions and help of @Ramalama.

The ASUS Prime X299 Deluxe on-board Bluetooth is natively supported and also Bluetooth Audio works OoB, however due to the non-functionality of the ASUS Prime X299 Deluxe on-board Wifi Module, I also use the Bluetooth 4.0 module of the OSX WIFI PCIe Adapter, which in line with its natively supported Wifi-module also provides native Airdrop, native Handoff and native Continuity as well as keyboard support in BIOS/UEFI and Clover Boot Loader.

Thanks to the SmallTree-Intel-211-AT-PCIe-GBE.kext, also the Intel I211_AT Gigabit on-board LAN controller of the ASUS Prime X299 Deluxe is now correctly implemented and fully functional, in addition to the anyway natively implemented and of course also fully operational Intel I219-V Gigabyte on-board LAN controller of the Asus Prime X299 Deluxe (see Section E.8 of my guide).

Excellent news concerning Power Management: Fully native HWP (Intel SpeedShift Technology) CPU Power Management for all Skylake-X processors resulting in absolutely brilliant and top-end CPU performance (see Section E.1).

Outstanding historical Benchmark Scores finally also depict the excellent overall build and and system performance:

Geekbench i9-7980XE (4.8GHz) CPU Benchmark:
  • Multi-Core Sore: 65.348
  • Single-Core Sore: 5.910
Cinebench i9-7980XE (4.8GHz) CPU Benchmark:
  • 4.618 CB
Geekbench Gigabyte Nvidia GeForce GTX 1080 Ti WaterForce WB 11GB Xtreme Edition OpenGL and Metal2 Benchmark:
  • OpenGL Sore: 229.965
  • Metal 2 Sore: 242.393
See Sections F.1) and F.2) for further details.

Like always also many thanks to @DSM2 and Fabiosun as wells PMheart form InsanelyMac for their extremely helpful and fruitful collaborations!

Before starting with all detailed instructions, please find a Table of Content that provides an overview of the individual topics addressed within this guide:

Table fo Contents

A.) Hardware Overview
Details about the build configuration that states the baseline of this guide.

B.) Mainboard BIOS
B1.) ASUS BIOS Firmware Patching
Unlock MSR 0xE2 register for native OSX XCPM power management on Asus mainboards
B2.) ASUS BIOS Configuration
B3.) - Initial Gigabyte BIOS Configuration

C.) Important General Note/Advice and Error Prevention
Hardware and System Configuration recommendations. Make sure you've read all of this before complaining that something does not work.

D.) iMac Pro macOS 10.13 High Sierra System Setup

This chapter includes a general guideline how to perform the initial setup of your iMac Pro with macOS High Sierra 10.13.2 (17C2120) - iMacPro special build. Note that there is no official downloadable installer for the iMacPro1,1. Here's how to officially built one. Only pristine sources from Apple.
D.1) iMac Pro EFI-Folder Preparation
D.2) iMac Pro macOS High Sierra 10.13.2 (17C2120) Installer Package Creation
D.3) iMac Pro macOS High Sierra 10.13.2 (17C2120) USB Flash Drive Installer Creation
D.4) iMac Pro macOS High Sierra 10.13.2 (17C2120) Clean Install on Skylake-X/X299
D.5) Direct iMac Pro conversions of a functional Skylake-X/X299 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation
D.6) iMac Pro macOS High Sierra Build Update Procedure

E.) Post Installation Process
E.1) HWP (Intel SpeedShift Technology) CPU Power Management Configuration
E.2) Graphics Configuration
General ATI and Nvidia GPU advices including a detailed guideline for Nvidia Web Driver Installation and Black Screen Prevention
E.3) Audio Configuration
Use only one of the following, where E.3.1 is recommended by the author.
E.3.1.) AppleALC Audio Implementation
E.3.2) VoodooHDA Audio Implementation
E.3.3) cloverALC Audio Implementation
E.4) USB Configuration
including some initial benchmarks
E.5) ASUS Prime X299 Deluxe Thunderbolt EX3 PCIe Add-On Implementation
E.6) NVMe compatibility
E.7.) SSD TRIM Support
Extend the life of your SSD and maintained its normal speed
E.8) ASUS Prime X299 Deluxe on-board Ethernet-Functionality
E.9) ASUS Prime X299 Deluxe PCI Device Implementation - Sleep/Wake functionality
E.9.1) ACPI DSDT Replacement Implementation
E.9.2) SSDT-X299-iMacPro.aml PCI Implementation
E.9.2.1) - HDEF - onboard PCI Audio Controller PCI Implementation
E.9.2.2) - GFX0, HDAU - Nvidia Graphics Card and HDMI/DP Audio PCI implementation
E.9.2.3) - SBUS - onboard System Management Bus (SMBUS) Controller Implementation
E.9.2.4) - LPCB - onboard Printed Circuit Board Controller PCI Implementation
E.9.2.5) - IMEI - onboard Intel Management Engine Interface (IMEI) Controller PCI Implementation
E.9.2.6) - PMCR - onboard Power Management Controller (PMC) PCI Implementation
E.9.2.7) - XHCI - onboard Extended Host Controller Interface (XHCI) PCI Implementation
E.9.2.8) - XHC2,3,4 - ASMedia ASM3142 USB 3.1 Controller PCI Implementation
E.9.2.9) - ANS2 - Apple NVMe Controller PCI Implementation
E.9.2.10) - SAT1 - Intel AHCI SATA Controller PCI Implementation
E.9.2.11) - ETH0/ETH1 - onboard LAN Controller PCI Implementation
E.9.2.12) - ARPT - OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI Implementation
E.9.2.13) - ThunderboltEX 3 Controller PCI Implementation
E.9.2.13) - DTGP Method
E.10) System Overview CPU Cosmetics
E.11) Logic-X and Audio Studio Software Functionality

F.) Benchmarking
F.1) Sylake-X Intel I9-7980XE CPU Benchmarking
F.2) Gigabyte AORUS GTX 1080 Ti Waterforce EB 11GB Extreme Edition Benchmarking

G.) Summary and Conclusion

Now enjoy and have have fun with the detailed guidelines below. Many thanks to @paulotex for committing the efforts in providing the Table of Contents detailed above.


A.) Hardware Overview

View attachment 294331

View attachment 294198

Mainboard: Asus Prime X299 Deluxe
CPU: i9-7980XE (18 core, 4.4Ghz)
RAM Memory: Tridentz DDR-4 3200 Mhz 128GB (8x16GB) Kit (F4-3200C14Q2-128GTZSW)
GPU: Gigabyte Aorus GTX 1080 Ti Waterforce WB Extreme Edition 11GB
System Disks: EVO 960 NVMe M.2 1TB (system disk macOS High Sierra 10.13.3); EVO 960 NVMe M.2 1TB (system disk macOS Sierra 10.12.6 Sierra)
Power Supply: Corsair AX1500i
Monitor: LG 38UC99-W 38" curved 21:9 Ultra Wide QHD+ IPS Display (3840 pix x 1600 pix)
WebCam: Logitech C930e
Mouse: Apple Magic Mouse 2
Keyboard: Logitech K811
Bluetooth + Wifi: PC/HACKINTOSH - APPLE BROADCOM BCM94360CD - 802.11 A/B/G/N/AC + BLUETOOTH 4.0
Internal USB2.0 HUB: NZXT AC-IUSBH-M1T
Case: Thermaltake Core X71 Tempered Glass Edition Full Tower Chassis
CPU/GPU Cooling: Water Cooling main components:
- 1x EK-FB ASUS Prime X299 RGB Monoblock - Nickel
- 1x EK-CoolStream PE 360 (Triple, 39 mm, Roof)
- 1x EK-CoolStream Ce 280 (Dual, 45mm, Front)
- 2x EK-CoolStream XE 360 (Triple, 60 mm, Cellar)
- 1x XSPC Twin D5 Dual Bay Reservoir/Pump Combo
- 15x Thermaltake Riing 12 High Static Pressure LED Radiator Fan (120mm)
- 5x Thermaltake Riing 14 High Static Pressure LED Radiator Fan (140mm)
- 3x Phantek PMW Fan Hub (up to 12 fans or 30W power consumption)
- 1x Alphacool Eisflügel Flow Indicator Black G1/4 IG
- 1x Phobya Temperatur Sensor G1/4 + C/F Display

View attachment 294330


B.) Mainboard BIOS

Please find below a detailed instruction for ASUS X299 mainboard BIOS Firmware patching, as well as a summary of my actual Asus X299 Prime Deluxe BIOS settings, in line with some likely already outdated Gigabyte X299 Aorus Gaming 9 BIOS settings, which I used during my initial testing period. Any user feedback that provides more actual settings for the latter mainboard is appreciated and will be immediately implemented.


B1.) ASUS BIOS Firmware Patching

On a real Mac with native OSX XCPM power management, the MSR 0xE2 register is unlocked and therefore writeable. However, on ASUS mobos this register is usually read only. This is also the case for all ASUS X299 mobos. When the kernel tries to write to this locked register, it causes a kernel panic. This panic can happen very early in the boot process, with the result that your system freezes or reboots during the boot process. We can circumvent the MSR 0xE2 register write with a dedicated KernelToPatch entry in the config.plist, namely "xcpm_core_scope_msrs © Pike R. Alpha" and by enabling the "KernelPM" in the config.plist in Section "Kernel and Kext Patches" of the Clover Configurator. See Section E.1) for further details.

However, thanks to recent modifications in CodeRush's Longsoft UEFIPatch distributions and thanks to three sophisticated MSR 0xE2 Register patches provided by @interferenc (partly former work of CodeRush, Pike Alpha and Adrian_dsl), we are now able to successfully patch any ASUS X299 mainboard BIOS distribution and unlock the MSR 0xE2 register. This makes the "xcpm_core_scope_msrs © Pike R. Alpha" KernelToPatch entry obsolete and allows full native read/write MSR 0xE2 register access by the OSX kernel. Also many thanks to FABIOSUN on InsanelyMac for his parallel contributions. The patched ASUS mainboard BIOS firmware finally can be uploaded to the specific ASUS X299 mainboard by means of the ASUS EZ BIOS Flashback Procedure.

The individual steps for the ASUS X299 BIOS Patching are detailed below:

1.) Installation of the BREW distribution:

a.) Open a terminal and change to "bash" shell.

Code:
bash

b.) Now enter the following "bash" terminal command and follow the standard BREW installation instructions:

Code:
/usr/bin/ruby -e "$(curl -fsSL https://raw.githubusercontent.com/Homebrew/install/master/install)"
2.) After the successful installation of the BREW distribution, we have to implement the QT5 distribution, again by using a "bash" terminal shell. Just enter the following "bash" terminal commands:
Code:
brew install qt5

Code:
brew link qt5 --force

3.) After successfully implementing BREW and QT5, we can now download the most actual CodeRush UEFIPatch distribution from Github to our home directory with the following terminal command:

Code:
git clone https://github.com/LongSoft/UEFITool

Now we have to change to ~/UEFITool/UEFIPatch/

Code:
cd ~/UEFITool/UEFIPatch/

and execute the following "bash" commands:

Code:
qmake uefipatch.pro

Code:
make

Now we have the executable UEFIPatch distribution.

4.) Create a UEFIPatch-Folder on your Desktop

Code:
mkdir ~/Desktop/UEFIPatch/

and copy the previously compiled UEFI patch distribution to your new Desktop-Folder

Code:
cp ~/UEFITool/UEFIPatch/UEFIPatch ~/Desktop/UEFIPatch/

5.) Now download the patches.txt provided by @interferenc (attached at the bottom of thisoriginating post/guide) and copy the file to your ~/Desktop/UEFIPatch/ Folder.

Code:
cp ~/Downloads/patches.txt ~/Desktop/UEFIPatch/

6.) Download the most recent BIOS Firmware file from ASUS. For the ASUS Prime X299 Deluxe follow THIS LINK

7.) Copy the most recent ASUS BIOS Firmware file to your UEFIPatch-Folder on your Desktop, e.g.

Code:
cp ~/Downloads/PRIME-X299-DELUXE-ASUS-1102.CAP ~/Desktop/UEFIPatch/

You now have all required data in the ~/Desktop/UEFIPatch/ Folder, which basically are UEFIPatch, patches.txt and the most recent ASUS BIOS Firmware distribution for your particular ASUS X299 mainboard.

8.) To finally patch the most recent ASUS BIOS Firmware distribution for your particular ASUS X299 mainboard, enter the following terminal commands (this example is for the ASUS Prime X299 Deluxe mainboard):

Code:
cd ~/Desktop/UEFIPatch/

Code:
./UEFIpatch PRIME-X299-DELUXE-ASUS-1102.CAP

You will see the following terminal output during the patch procedure:

Code:
parseImageFile: Aptio capsule signature may become invalid after image modifications
parseFile: non-empty pad-file contents will be destroyed after volume modifications
parseFile: non-empty pad-file contents will be destroyed after volume modifications
patch: replaced 8 bytes at offset 4380h 81E10080000033C1 -> 9090909090909090
patch: replaced 8 bytes at offset 4380h 81E10080000033C1 -> 9090909090909090
patch: replaced 8 bytes at offset 2CBEEh 81E10080000033C1 -> 9090909090909090
patch: replaced 8 bytes at offset 2CBEEh 81E10080000033C1 -> 9090909090909090
patch: replaced 4 bytes at offset 298Fh 0FBAE80F -> 0FBAE00F
Image patched

The resulting patched BIOS Firmware distribution file has the ending ".patched", e.g. for the ASUS Prime X299 Deluxe we obtain "PRIME-X299-DELUXE-ASUS-1102.CAP.patched".

9.) Now rename the patched BIOS Firmware distribution file in concordance with the ASUS EZ Flashback filename convention for your particular ASUS X299 mainboard. For the ASUS Prime X299 Deluxe, the modified BIOS Firmware distribution file must be named "X299D.CAP":

Code:
mv ~/Desktop/UEFIPatch/PRIME-X299-DELUXE-ASUS-1102.CAP.patched ~/Desktop/UEFIPatch/X299D.CAP

Now copy the CAP-file with the correct ASUS EZ Flashback filename convention to a USB Drive with a FAT32 File System of your choice.

Code:
cp ~/Desktop/UEFIPatch/X299D.CAP /Volumes/YOUR_USB_DRIVE/

and reboot.

10.) On reboot, enter the BIOS Menu with F2, save your actual BIOS settings to your USB Drive (CMO.file) and shut down your system.

11.) Connect the USB Drive to the USB-port assigned to the ASUS BIOS Flashback procedure (see your mainboard manual for further details)

Subsequently, press the EZ BIOS-Flashback button on your mainboard for three seconds until the EZ BIOS Flashback led starts blinking, indicating that the EZ BIOS Flashback procedure is in progress. Release the button and wait until the light turns off, indicating that the EZ BIOS Flashback procedure has completed.

View attachment 304996

12.) Boot your system, enter the BIOS Menu with F2 and restore your previously saved BIOS settings from your USB Drive (CMO.file). Save your BIOS settings and exit the BIOS with F7 and F10.

Now you completed the BIOS patching procedure and you should have an ASUS X299 mainboard with an unlocked MSR 0xE2 register.

To check that the latter is the case, enter the following terminal command after reboot:

Code:
bdmesg

The Clover boot log will show if the MSR 0xE2 register of your ASUS mainboard is unlocked.

If you are able to find something like the following information, you fully succeeded in unlocking your MSR 0xE2 register:

Code:
MSR 0xE2 before patch 00000402
MSR 0xCE              00070C2C_F3011A00
MSR 0x1B0             00000000

Alternatively, you can also check the status of your MSR 0xE2 register by means of the VoltageShift distribution.

Download the VoltageShift distribution by following THIS LINK.

Copy the voltageshift folder to your desktop

Code:
mv ~/Downloads/voltageshift ~/Desktop/

Enter the following terminal commands:

Code:
cd ~/Desktop/voltageshift/

sudo chmod -R 755 VoltageShift.kext

sudo chown -R root:wheel ~/Desktop/voltageshift/VoltageShift.kext

./voltageshift read 0xe2

If the output looks like the following

Code:
RDMSR e2 returns value 0x7e000008

Bit 15 is not set and your MSR 0xE2 register is unlocked.

View attachment 304997

Alternatively you can also check the MSR 0xE2 register status by means of Pike Alpha's AppleIntelInfo.kext. Note however that the latter kext is incompatible with the i9-7980XE! Users of the latter Skylake-X CPU should opt for either the "bdmesg" or "voltageshift" MSR 0xE2 register verification approach detailed above.

Please find the already patched ASUS Prime X299 Deluxe 1102 BIOS firmware distribution X299D.CAP attached at the bottom of this originating post/guide.


B2.) ASUS BIOS Configuration

Before applying the specific settings, please provide your ASUS X299 Prime Deluxe with the actual and hopefully best working BIOS firmware.

View attachment 276484
After Updating System time and System Date, enable X.M.P for your DDR4 modules. Don't forget to enable the EZ XMP Switch previously to this step on your ASUS Mainboard! Subsequently switch form the easy to the advanced ASUS BIOS Setup mode by pressing F7.

View attachment 276341

I use all optimized BIOS settings (OoB, no OC yet) despite a few changes listed in detail below:

1.) /AI Tweaker/
a.) ASUS MultiCore Enhancement: Auto [optional "Disabled", see important notification below!]
b.) AVX Instruction Core Ratio Negative Offset: "3" [optional "Auto", see important notification below!]
c.) AVX-512 Instruction Core Ratio Negative Offset: "2" [optional "Auto", see important notification below!]
d.) CPU Core Ratio: Sync All Cores [optional "Auto", see important notification below!]
e.) CPU SVID Support: Enabled [fundamental for proper IPG CPU power consumption display]
f.) DRAM Frequency: DDR4-3200MHz

2.) /Advanced/CPU Configuration/
a.) Hyper Threading [ALL]: Enabled

3.) /Advanced/CPU Configuration/CPU Power Management Configuration/
a.) Enhanced Intel Speed Step Technology (EIST): Enabled
b.) Autonomous Core C-States: Enabled
c.) Enhanced Halt State (C1E): Enabled
d.) CPU C6 report: Enabled
e.) Package C-State: C6(non retention) state
f.) Intel SpeedShift Technology: Enabled (crucial for native HWP Intel SpeedShift Technology CPU Power Management)
g.) MFC Mode Override: OS Native

4.) /Advanced/Platform Misc Configuration/
a.) PCI Express Native Power Management: Disabled
b.) PCH DMI ASPM: Disabled
d.) ASPM: Disabled
e.) DMI Link ASPM Control: Disabled
f.) PEG - ASMP: Disabled

5.) /Advanced/System Agent Configuration/
a.) Intel VT for Directed I/O (VT-d): Disabled (see VT-d notification below)

6.) /Boot/
a.) Fast Boot: Disabled
b.) Above 4G Decoding: Off
c.) Set your specific Boot Option Priorities

7.) /Boot/Boot Configuration
a.) Boot Logo Display: Full Screen
b.) Boot up NumLock State: Disabled
c.) Setup Mode: Advanced

8.) /Boot/Compatibility Support Module/
a.) Launch CSM: Disabled

9.) /Boot/Secure Boot/
a.) OS Type: Other OS

With F7 and F10 you can save the modified BIOS settings.

Important Notes:

"ASUS MultiCore Enhancement": When set to "Auto", MCE allows you to maximise the overclocking performance optimised by the ASUS core ratio settings. When disabled, MCE allows to set to default core ratio settings.

"CPU Core Ratio - Sync All Cores": Tremendous increase in CPU performance can be achieved with the CPU Core Ratio set to "Sync All Cores". In case of the i9-7980XE, the Geekbench score difference is approx. 51.000 (disabled) compared to 58.000 (enabled)! Note however, that Sync All Cores should be used only in case of the availability of an excellent and extremely sophisticated water cooling system! Otherwise, CPU Core Ratio should be set to "Auto". Further note that with CPU Core Ratio set to "Sync All Cores", the AVX Instruction Core Ratio Negative Offset must be set to "3" and the AVX-512 Instruction Core Ratio Negative Offset must be set to "2". Without the correct core ratio offsets, your system might become unstable with CPU Core Ratio set to "Sync All Cores"!

VT-d Note: For compatibility with VM or parallels, VT-d can be also ENABLED... Verify however, in this case that in your config.plist the boot flag "dart=0" is checked under Arguments in the "Boot" Section of Clover Configurator!

Intel(R) Power Gadget (IPG) CPU Power Consumption note: for the proper display of the CPU Power Consumption in e.g. the Intel(R) Power Gadget it is absolutely mandatory to enable both /AI Tweaker/CPU SVID Support/ and /Advanced/CPU Configuration/CPU Power Management Configuration/Enhanced Intel Speed Step Technology (EIST)

CPU Core Voltage Correction for ASUS X299 mainboard users: The ASUS Skylake-X BIOS microcode implementation is still somewhat buggy. With "/AI Tweaker/CPU Core Voltage/" set to "Auto", the CPU Core Voltages assigned to your Skylake-X CPU might be simply too high. This actually does not only affect the OSX but also the Windows performance in the same way!

View attachment 300826

It is recommended to fix the CPU Core Voltage in the ASUS mainboard BIOS to a minimum value that still provides flawless system boot and full system performance during CPU max. load conditions in line with significantly CPU core temperatures. With CPU max. load conditions I refer to the max. turbo frequency (e.g. 4.4 Ghz for the i9-7980XE) applied to ALL cores!

The optimal CPU Core Voltage setting can be retrieved within the following iterative approach:

Note that the iterative approach detailed below assumes the BIOS settings described in Section B1) - point 1) to 10) above, however by considering the following else optional settings:

i.) "ASUS MultiCore Enhancement" set to "Auto"
ii.) "CPU Core Ratio" set to "Sync All Cores"
iii.) "AVX Instruction Core Ratio Negative Offset" set to "3"
iv.) "AVX-512 Instruction Core Ratio Negative Offset" set to "2"

1.) Boot into Windows and launch ASUS CPU-Z as well as Cinebench.

2.) Run Cinebench CPU benchmarks and watch the Core VID values in CPU-Z under CPU max.load conditions. These values will usually exceed 1.2V with "/AI Tweaker/CPU Core Voltage/" set to "Auto"

View attachment 300827

3.) To optimise the "/AI Tweaker/CPU Core Voltage/" perform the following steps:

a.) Enter the BIOS, go to "/AI Tweaker/CPU Core Voltage/" and change from "Auto" to "Manual"

b.) Enter a slightly lower CPU Core Voltage Overrride (e.g. typically 0.01 V less) than originally observed with CPU-Z under Cinebench CPU benchmark max.load conditions in Windows, e.g. 1.190 V in the first iteration.

View attachment 300828

c.) Reboot into windows and check if the Cinebench CPU benchmark scores are still in the expected range by also controlling the respective Core VID values during the Cinebench CPU benchmark max. load conditions

d.) Repeat b.) and c.) until either your Cinebench CPU benchmarks scores start to significantly decrease or you start facing problems in booting your system. Given my personal experience with the i9-7980XE, a CPU Core Voltage Override of 1.120 V might be optimal in any case if one does not perform any OverClocking (4.4 GHz stock turbo frequency)! In case of OC, the optimal CPU Core Voltage can certainly also exceed 1.2 V, e.g. 1.26 V with a i9-7980XE @ 4.8 Ghz OC (perfect and delidded sample), however a sophisticated water block circuit is absolutely mandatory in this case! Therefore, always watch also your CPU temps in addition when performing this iterative CPU Core Voltage Override Value Optimisation, which should not exceed 90 deg C under CPU max. load conditions!
Warning!

Before performing the CPU Core Voltage Override Value Optimisation Approach, save your actual BIOS settings to a USB Drive. If during the iterative approach you are not able to successfully boot your system, perform a CMOS reset and restore your BIOS settings from the USB Drive, by subsequently entering the last successful CPU Core Voltage Override value!
Never but never enter CPU Core Voltage Overrride values larger than 1.xx V! Too high voltages (e.g. 1.5-10 V) can severely damage your CPU! Thus, never forget about the comma after the 1!!! Note if you perform this iterative CPU Core Voltage Override Value Optimisation Procedure, you perform it at your own risk!

Many thanks to @DSM2 for all his comments, valuable input, and proposed solutions.


B3.) - Initial Gigabyte BIOS Configuration

Please note once more, that my Gigabyte BIOS settings initially used and such summarised below, might not reflect the actual optimum choice for this mainboard. Any user feedback is appreciated and welcome. In any case, before applying the specific settings listed below, please provide also your Gigabyte X299 Aorus Gaming 9 with the actual and hopefully best working BIOS firmware.

View attachment 276340

1.) /M.I.T/Advanced Frequency Settings/
a.) Extreme Memory Profile: (X.M.P): Profile1

2.) /M.I.T/Advanced Frequency Settings/Advanced CPU Core Settings
a.) Active Cores Control: Manual
b.) Hyper-Threading Technology: Enabled
c.) Enhanced Multi-Core Performance: enabled/disabled (optional; individual CPU compatibility yet to be verified)
d.) CPU Enhanced Halt (C1E): Enabled
e.) C6/C7 State Support: Enabled
f.) Package C State limit: C6
g.) CPU EIST Function: Disabled

3.) /M.I.T/Advanced Memory Settings/
a.) Extreme Memory Profile (X.M.P): Profile1

4.) /BIOS/
a.) Boot Numlock State: Disabled
b.) Security option: Setup
c.) Full Screen Logo Show: Enbabled
d.) Fast Boot: Disabled
e.) CSM Support: Disabled

5.) /BIOS/Secure Boot/
a.) Secure Boot Enable: Disabled

6.) /Peripherals/USB Configuration/
a.) XHCI Hand-off: Enabled

7.) /Chipset/
a.) VT-d: Disabled (see VT-d notification in Section ASUS BIOS settings above)

8.) /Save& Exit/
a.) Save & Exit

C.) Important General Note/Advice and Error Prevention

Please note the following important General Note / Advice and Error Prevention, when setting up your Skylake-X/X299 System and implementing the latest respective special iMacPro macOS High Sierra distribution.

1.) The /EFI/Clover/drivers64UEFI/-directory of EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip implements now OsxAptioFix3Drv-64.efi, which replaces all former OsxAptioFixDrv-64.efi and OsxAptioFix2Drv-64.efi implementations.

OsxAptioFix3Drv-64.efi implements native NVRAM on our iMac Pro Skylake-X/X299 Systems under macOS High Sierra 10.13.2 (17C2120), 10.13.2 SA (17C2205) and 10.13.3 (17D2047), thus EmuVariableUefi-64.efi has been also omitted in the /EFI/Clover/drivers64UEFI/ directory contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip!

Note that for native NVRAM implementation, Clover's RC Scripts have to be omitted during the clover boot loader installation. If already previously installed, remove Clover's RC Scripts from the /etc directory of your macOS USB Flash Drive Installer or System Disk:

Code:
sudo rm -rf /etc/rc.boot.d
sudo rm -rf /etc/rc.shutdown.d

OsxAptioFix3Drv-64.efi works absolutely flawless on my system, without any memory allocation errors or slide issues even with the "slide" boot flag disabled.

However, anybody witnessing issues with OsxAptioFix3Drv-64.efi can try to use AptioMemoryFix.efi instead, which is a totally new approach developed by @vit9696. Note that AptioMemoryFix.efi is under permanent development. To retrieve the most actual version, download and compile the AptioMemoryFix.efi Source Code from Github by means of AptioMemory-Builder.sh developed by @Pavo, using the following terminal commands:

Code:
rm -rf AptioMemFix
git clone https://github.com/Pavo-IM/AptioMemFix
rm -rf ~/Desktop/AptioMemFix/
rm -rf ~/Desktop/AptioFix/
mv AptioMemFix/ ~/Desktop/
chmod +x ~/Desktop/AptioMemFix/AptioMemory_Builder.sh
~/Desktop/AptioMemFix/AptioMemory_Builder.sh

This will create "AptioFix" and "AptioFix_Build" folders on your Desktop. Now you can copy the most actual compiled AptioMemoryFix.efi release from ~/Desktop/AptioFix_Build/RELEASE/ to the /EFI/Clover/drivers64UEFI/ directories in the EFI-Folders of your macOS USB Flash Drive Installer and macOS System Disk. Don't forget to remove OsxAptioFix3Drv-64.efi from the /EFI/Clover/drivers64UEFI/ directories in the EFI-Folders of your macOS USB Flash Drive Installer and macOS System Disk.

For further details and to access the ongoing discussion to the topic follow THIS LINK.

Also AptioMemoryFix.efi maintains fully native NVRAM implementation and works absolutely flawless on my system, without any memory allocation errors or slide issues with the "slide" boot flag disabled. Note that also with AptioMemoryFix.efi, Clover's RC Scripts have to be omitted during the clover boot loader installation. If already previously installed, remove Clover's RC Scripts from the /etc directory of your macOS USB Flash Drive Installer or System Disk as detailed above.

2.) a.) All ATI Graphics Cards Users with typical rudimentary and basic Starter ATI Graphics Cards like the ATI Radeon RX 560 or RX 580 should use WhateverGreen.kext v1.1.4. and Lilu.kext v1.2.1.

Not however, that all ATI Vega 64 and Frontier GPUs are natively implemented by OSX and run Out of Box (OoB). No need for the additional Whatevergreen.kext and Lilu.kext implementation.

b.) All Nvidia Graphics Cards Users with SMBIOS MacPro1,1 can now also employ the officially distributed Nvidia 10.13 Web Drivers for their Nvidia Pascal and Maxwell graphics cards! Upon my initial request from 7 January 2018, a Web Driver for SMBIOS iMacPro1,1 and macOS 10.13.2 (17C2120) was yet under development the last days. On 11 January 2018, Nvidia released the first Web Drivers for macOS 10.13.2 (17C2120) and macOS 10.13.2 SA (17C2205). macOS 10.13.3 (17D2047) of 10.13.4 public beta users can also use this macOS 10.13.2 SA (17C2205) Web Driver after applying a minor and quite simple patching procedure. Nvidia Kepler Cards were anyway already natively implemented in the earlier beta distributions of macOS 10.13.

For further details and error prevention see Section E.2 .

3.) Avoid any MacOS assignments in KextToPatch and KernelToPatch entries implemented in the "Kernel and Kext Patches" Section of the Clover Configurator. If subsequently in my Guide you still find MatchOS assignments in respective figures or text, just ignore all likely yet persistent MatchOS assignments. In the config.plist of the EFI-Folder contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip, all MatchOS assignments have been definitely removed.

4.) If you have the Thunderbolt EX3 PCIe extension card already successfully connected with your ASUS Prime X299 Deluxe and properly implemented in your system, disconnect any Thunderbolt 2 drives during the macOS installation/upgrade procedure. If however the Thunderbolt EX3 PCIe extension card yet has not been properly configured and implemented in your system, remove the card for the macOS Upgrade or Clean Install procedure.

5.) Note that on some systems it might be necessary to check the KernelPM Option in the "Kernel and Kext Patches Section" of the Clover Configurator to successfully boot the respective system. Note that in the config.plist of the EFI-Folder attached below, this option is unchecked, as it is not required in case of the ASUS Prime X299 Deluxe.

6.) Always check that you have the most actual apfs.efi in the /EFI/CLOVER/drivers64UEFI/ - directories of your USB Flash Drive Installer and System Disk!

The actual apfs.efi can be obtained by following the respective guideline detailed below:

a.) Download and install Pacifist for Mac.

b.) Copy the "Install macOS High Sierra.app" to your Desktop -> right-click with your mouse on the app and select "Show Package Contents" -> click with the mouse on "Contents" and subsequently on "Shared Support" -> right-click with the mouse on "BaseSystem.dmg" and select "Open With" -> select "pacifist.app". Pacifist is now loading the "BaseSystem.dmg" package contents.

c.) Now click with the mouse on "usr" -> "standalone" -> "i386". After a right-click on apfs.efi, select "Extract toCustom Location...". Choose your Desktop as Destination. Answer the subsequent question "Extract apfs.efi ?" with "Extract". You now have the most actual version of apfs.efi on your Desktop.

d.) Note that the EFI-Folder EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip contains a patched apsf.efi without verbose boot. The respective patching procedure and the related discussion can be derived by following THIS LINK. Credits to PMheart and ErmaC from InsanelyMac.

e.) If necessary (usually the /EFI/CLOVER/drivers64UEFI/ - directory of my distributed EFI-Folders already containsthe most actual apfs.efi version), copy the actual patched apfs.efi to the /EFI/CLOVER/drivers64UEFI/ - directories of your USB Flash Drive Installer and System Disk!
7.) To avoid boot problems and for sleep/wake functionality (not verified yet), it is absolute mandatory to have VoodooTSCSync.kext in the /EFI/CLOVER/kexts/Other/ directory of both USB Flash Drive and System Disk.

Please note that the VoodooTSCSync.kext attached at the end of this originating post/guide is configured for a 6-core CPU (12 threads) like the i7-7800X. To adopt the kext for Skylake-X processers with more or less cores than 6 cores, apply the following approach:

a.) Download and unzip the
VoodooTSCSync.kext attached at the end of this originating post/guide to your desktop.

b.) Right-click with the mouse on the VoodooTSCSync.kext file and select "Show Packet Contents".

c.) Double-click with the mouse on /contents/ . After a right-click on the "Info.plist" file, select "Open with / Other". Select the TextEdit.app and edit the "Info.plist" file.

d.) Use the "find"-function of TextEdit.app and search for the term "IOCPUNumber"

e.) Note that the adequate IOCPUNumber for your particular Skylake-X processor is the number of its threads -1, by always keeping in mind that the number of it's threads is always 2x the number of it's cores.

Thus in case of the 6 core i7-7800X, the IOCPUNumber is 11 (12 threads - 1).

Code:
<key>IOCPUNumber</key>
<integer>11</integer>

By following this methodology, the correct IOCPUNumber for the 10-core i9-7900X would be (20 threads -1)

Code:
<key>IOCPUNumber</key>
<integer>19</integer>

and the IOCPUNumber for the 18-core i9-7980XE would result in (36 threads -1)

Code:
<key>IOCPUNumber</key>
<integer>35</integer>

f.) After adopting the IOCPUNumber for your particular Skylake-X processor, save the info.plist file and copy the modified VoodooTSCSync.kext to the /EFI/CLOVER/kexts/Other/ - directories of both USB Flash Drive Installer and System Disk (see D.1/4.f and D.2/4.e)!
8.) Already during the last Beta Versions of macOS 10.13 High Sierra, Apple forced the beta users to use the new Apple file system APFS in case of a Clean Install/update of MacOS High Sierra 10.13. Also within macOS High Sierra 10.13.3 (17D2047) this is the case. Most APSF incompatibilities with available system related software apparently have been already removed. The actual version of Carbon Copy Cloner (CCC) now supports the direct cloning of APFS system disks and hereby enables the previously missing option for APFS system backups. Until Boot-Loader Distribution Clover_v2.4k_r4210, it was also impossible to install the Clover Boot-Loader in the EFI-Partition of an APFS System Disk by means of the Clover Boot-Loader Installer Package. However, with any actual Clover Boot-Loader Distribution, the Clover Boot-Loader Installation works absolutely flawless on APFS System Disks.

Note that there is no way to convert an APFS disk back to HFS+ without the loss of all data, but one can easily reformat an APFS formatted disk to HFS+ under OSX by using either Apple's Disk Utility App or "diskutil" commands. All you need to do is to previously unmount the APFS volume before erasing it with a journaled HFS+ file system and a GRUB Partition Table (GTP). If you want to maintain the disk's content, perform a backup before erasing the disk with a HFS+ format.

The application of Apple's Disk utility is straight forward. The "diskutil" equivalent is detailed below:

In the Terminal app, type:

Code:
diskutil list

In the output which you can read by scrolling back, you will find all internal disks named /dev/disk0, /dev/disk1, depending upon how many physical disks are present in your system.

Make a note of the disk identifier for the disk you intend to format (you can eliminate risk by removing all disks but the intended target).

In the Terminal app, type:

Code:
diskutil unmount /dev/diskX

where diskX is a place holder for the disk to be unmounted.

Subsequently, you can erase the entire disk with HFS+ and a GPT by typing the following terminal command:

Code:
diskutil partitionDisk /dev/diskX 1 GPT jhfs+ "iMacPro" R

where /dev/diskX is again a place holder for disk to be erased and iMacPro would be the label for the single partition created. The remaining 1 GPT jhfs+ and R arguments tell diskutil to create a single partition, within a GUID partition table, formatted as Journaled HFS+ and using the entire disk, respectively.

Alternatively one can also use the following terminal command:

Code:
diskutil partitionDisk /dev/diskX GPT JHFS+ iMacPro 0b

where /dev/diskX is again a place holder for disk to be erased and iMacPro is again the label for the disk partition created. The GPT HFFS+ and 0b arguments again tell diskutil to create a single partition, within a GUID partition table, formatted as Journaled HFS+ and covering the entire disk, respectively.

In the Terminal app, type now:

Code:
diskutil mount /dev/diskX

where diskX is again a place holder for the disk to be remounted.

Note, that by means of the "diskutil approach", brand new unformatted or not compatibly formatted system NVMe, SSD and HDD system drives can be also directly formatted within the macOS Clean Install procedure. When presented with the initial install screen where you are presented options to Restore From Backup or Install, select Terminal from the Utilities menu bar item;

The "diskutil" terminal approach is also able to convert a HFS+ macOS High Sierra 10.13 System Disk to APFS. To do so enter the following terminal command:

Code:
diskutil apfs convert /dev/diskX

where diskX is again a place holder for the HFS+ disk to be converted to APFS. The same procedure again can also be directly performed by means of Apple's Disk Utility.

9.) All ASUS Prime X299 Deluxe users, who enabled the second LAN controller in the ASUS Prime X299 Deluxe BIOS, are advised to download, unzip and copy the SmallTree-Intel-211-AT-PCIe-GBE.kext to the EFI-Folders of both USB Flash Drive Installer and 10.13 System Disk, or to disable the second LAN port in the BIOS during the MacOS Installation.

10.) Lilu and Lilu Plugin distribution remarks:

Previously, I witnessed boot kernel panics (KP) on my Skylake-X/X299 system when implementing Lilu.kext v1.2.0, AppleALC.kext v1.2.0 and NvididaGraphicsFixup.kext v1.2.0 in /EFI/CLOVER/kexts/Other/ or /L/E/ (including LiluFriend.kext in the latter directory). The KPs only could be avoided with the additional boot flag -lilulowmem

The Lilu KPs might have been caused by a borked kextcache. However, even a kextcache rebuild with the following terminal commands:

Code:
sudo touch /Library/Extensions && sudo kextcache -u /

sudo touch /System/Library/Extensions && sudo kextcache -u /

did not solve the issue. KPs caused by Lilu v1.2.0 and AppleALC 1.2.0 remained...

Thanks to the actual changes by @vit9696 in the Lilu.kext v1.2.1 source distribution, Lilu.kext v1.2.1 now behaves again similar to v1.1.x and all KP issues totally vanished.

To always access, download and compile the most actual but not yet officially released Lilu and Lilu plugin distributions, follow these links:

a.) Lilu Source distribution
b.) AppleALC Source Distribution
c.) NvidiaGraphicsFixup

To successfully compile the AppleALC and NvidiaGraphicsFixup source code distributions with Xcode 9.2 under macOS High Sierra 10.13.3 (17D2047), download, unzip and copy the respective actual Lilu DEBUG distribution to the AppleALC and NvidiaGraphicsFixup source code distribution directories. To compile the respective Lilu, AppleALC, and NvidiaGraphicsFixup source code distributions just execute the terminal command "xcodebuild" after changing to the respective source code distribution with the "cd" terminal command. The resulting compiled kexts can be always found in the respective /build/Release/ sub-directories of the respective source code distribution directories.

Note the additional KernelToPatch entry to the config.plist contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip in the Kernel and Kext Patches Section of Clover Configurator

Code:
Find: 8A 02 84 C0 74 44  Replace: 8A 02 84 C0 EB 44    Comment: Lilu 1.2.x Debug

for Lilu 1.2.x debug reasons.

Further details to the topic can be accessed by following THIS LINK.

11.) To clearly get kernel panic images with a call trace in case of kernel panics, I implemented (checked) boot flags "debug=0x100" and "keepsyms=1" in the config.plist of EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip in the "Boot" Section of Clover Configurator under "Arguments".

12.) Note that in the current EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip distributions, I also removed CsmVideoDxe-64.efi from /EFI/CLOVER/drivers64UEFI, as the latter file is only required for proper Legacy screen resolution purposes with CSM enabled, which is definitely not our case.

D.) iMac Pro macOS 10.13 High Sierra System Setup

Below, one finds a detailed description for the Clean Install of macOS High Sierra 10.13.2 (17C2120) - special iMacPro build (D.4). This also includes the iMacPro EFI-Folder Preparation (D.1) as well as the iMac Pro macOS High Sierra 10.13.2 (17C2120) Installer Package (D.2) and iMac Pro macOS High Sierra 10.13.2 (17C2120) USB Flash Drive Installer Creation (D.3). One also finds instructions for a direct iMac Pro conversion of a functional Skylake-X/X299 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation (D.5), as well as for the subsequent iMac Pro macOS High Sierra Update Procedure.


D.1) iMac Pro EFI-Folder Preparation

In order to successfully boot a macOS USB Flash Drive Installer or System Disk on a Hackintosh system, both drives must be equipped with an EFI-Folder in their EFI partitions. In this Section we will prepare a fully equipped EFI-Folder with SMBIOS iMacPro1,1 System definition.

1.) Download and unzip EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip attached at the bottom of this originating post/guide and copy the therein contained EFI-Folder to your Desktop.

2.) Open the config.plist in /EFI/Clover/ with the latest version of Clover Configurator (>/= v.4.60.0), proceed to the "SMBIOS" Section and complete the SMBIOS iMacPro1,1 Serial Number, Board Serial Number and SMUUID entries. These details are mandatory to successfully run iMessage and FaceTime on your iMac Pro System. Note that all other iMacPro1,1 SMBIOS Details are already implemented in the config.plist of EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip.

Press several times the "Generate New" Button next to serial number text field.

In the final step, open a terminal, enter repeatedly the command "uuidgen", and copy the output value to
the SMUUID field in the "SMBIOS" Section of the Clover Configurator.

Finally save the modified config.plist.

3.) Copy the appropriate VoodooTSCSync.kext, which you modified by following error prevention C.7), to the /EFI/CLOVER/kexts/Other/ directory of the EFI-Folder.

You know have a fully equipped EFI-Folder for subsequent implementations as detailed below.


D.2) iMac Pro macOS High Sierra 10.13.2 (17C2120) Installer Package Creation

To derive the macOS 10.13.2 build 17C2120 Full-Package Installer follow the individual steps below:

1.) Open a terminal and create the "091-33271" directory on your Desktop. Subsequently change to the newly created directory. All this can be down with the following terminal commands:

Code:
mkdir ~/Desktop/091-33271/
cd ~/Desktop/091-33271/

2.) Download the following files from the Apple server (public links) to your ~/Desktop/091-33271/ directory:

Code:
curl https://swdist.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/091-33271.English.dist -o 091-33271.English.dist
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/RecoveryHDMetaDmg.pkg -o RecoveryHDMetaDmg.pkg
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/InstallInfo.plist -o InstallInfo.plist
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/AppleDiagnostics.chunklist -o AppleDiagnostics.chunklist
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/OSInstall.mpkg -o OSInstall.mpkg
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/AppleDiagnostics.dmg -o AppleDiagnostics.dmg
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/InstallESDDmg.chunklist -o InstallESDDmg.chunklist
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/BaseSystem.chunklist -o BaseSystem.chunklist
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/InstallESDDmg.pkg -o InstallESDDmg.pkg
curl https://swdist.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/RecoveryHDMetaDmg.pkm -o RecoveryHDMetaDmg.pkm
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/BaseSystem.dmg -o BaseSystem.dmg
curl https://swdist.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/InstallESDDmg.pkm -o InstallESDDmg.pkm
curl http://swcdn.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/InstallAssistantAuto.pkg -o InstallAssistantAuto.pkg
curl https://swdist.apple.com/content/downloads/49/07/091-33271/a0p216ukywyxia77i36ujq0bq91ghcyyaf/InstallAssistantAuto.pkm -o InstallAssistantAuto.pkm

The full list of package files can be found within the following catalog URL, searching for key “a0p216ukywyxia77i36ujq0bq91ghcyyaf”:

https://swscan.apple.com/content/ca...ion-snowleopard-leopard.merged-1.sucatalog.gz

If you are on a system different from iMac Pro, also download:

Code:
curl https://swdist.apple.com/content/downloads/51/44/091-52052/dsqmhvw2nghj6dh9mtqwvx7gp4ykc7k5lb/091-52052.English.dist -o 091-52052.English.dist

3.) If you are currently on a iMac Pro System, create the 10.13.2 (17C2120) installer.pkg on your Desktop with the following terminal command:

Code:
cd ..
productbuild --distribution ./091-33271/091-33271.English.dist --package-path ./091-33271/ installer.pkg

If you are currently on a system different from iMacPro, create the 10.13.2 (17C2120) installer.pkg on your Desktop with the following terminal command:

Code:
cd ..
productbuild --distribution ./091-33271/091-52052.English.dist --package-path ./091-33271/ installer.pkg

4.) Create the "Install MacOS High Sierra.app" in the /Applications folder of your System Disk with the following terminal command:

Code:
sudo /usr/sbin/installer -pkg installer.pkg -target /Volumes/YOUR_SYSTEM_DISK/

Note that YOUR_SYSTEM_DISK in the above terminal command is a place holder for your system disk's name, which is build dependent. Thus, substitute YOUR_SYSTEM_DISK by the actual name of your system disk, before executing the above terminal command

5.) Now add the following files to your "Install High Sierra.app" with the following terminal commands:

Code:
sudo cp ./091-33271/InstallESDDmg.pkg /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/InstallESD.dmg
sudo cp ./091-33271/AppleDiagnostics.dmg /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
sudo cp ./091-33271/AppleDiagnostics.chunklist /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
sudo cp ./091-33271/BaseSystem.dmg /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/
sudo cp ./091-33271/BaseSystem.chunklist /Applications/Install\ macOS\ High\ Sierra.app/Contents/SharedSupport/

Verify your "Install High Sierra.app" for completeness. You should now have a complete macOS High Sierra 10.13.2 (17C2120) Installer package in your /Applications Folder.

The entire iMac Pro macOS Installer Package Creation Approach detailed above has been verified and approved by Motbod and is fully in line with the actual board rules.

Many thanks to @macandrea for his substantial and extensive contributions. He even now automatised the entire "Install High Sierra.app" creation procedure detailed above within one single script:

createInstaller.sh will automatically create on any MacOS System the "Install High Sierra.app" for MacOS 10.13.2 (17C2120) SMBIOS iMacPro1,1 in the /Applications folder.

Just download und unzip createInstaller.sh.zip and run the following terminal commands:

Code:
cd Downloads
chmod +x ./createInstaller.sh
./createInstaller.sh

Absolutely brilliant, gorgeous and genius job man!


D.3) iMac Pro macOS High Sierra 10.13.2 (17C2120) USB Flash Drive Installer Creation

Follow the individual steps detailed below to successfully create a bootable iMac Pro macOS High Sierra 10.13.2 (17C2120) USB Flash Drive Installer.

1.) Format a USB Flash Drive of your choice (source, named USB) with HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility on any other Hackintosh or Mac of your choice. This will create an empty HFS+ Partition and a yet empty EFI-partition on your iMac Pro macOS USB Flash Drive Installer.

2.) With the iMac Pro macOS High Sierra 10.13.2 (17C2120) Installer Package in your /Application Folder, connect your USB Flash Drive (named USB) and run the following terminal command:

Code:
sudo /Applications/Install\ macOS\ High\ Sierra.app/Contents/Resources/createinstallmedia --volume /Volumes/USB --applicationpath /Applications/Install\ macOS\ High\ Sierra.app --nointeraction

Alternatively, one can create the iMac Pro macOS USB Flash Drive Installer also by means of the Install Disk Creator.app

3.) Yet we have to make our iMac Pro macOS USB Flash Drive Installer also bootable. This can be partly done by means of the following terminal commands:

Code:
cd /Volumes/USB_VOLUME
mkdir .IABootFiles
cd .IABootFiles
cp /Volumes/USB_VOLUME/System/Library/CoreServices/boot.efi .

4.) For successfully booting your iMac Pro macOS USB Flash Drive Installer, the latter must however also contain a valid EFI- Folder with an SMBIOS iMacPro1,1 system definition. Thus, copy the EFI-Folder you prepared in Section D.1) to the yet empty EFI Partition of your iMac Pro macOS USB Flash Drive Installer.

You now have a fully functional and bootable iMac Pro macOS High Sierra 10.13.2 (17C2120) USB Flash Drive Installer.

Many thanks to @macandrea for his substantial and extensive contributions.


D.4) iMac Pro macOS High Sierra 10.13.2 (17C2120) Clean Install on Skylake-X/X299
View attachment 272790
Follow the individual steps detailed below to successfully setup macOS High Sierra 10.13.2 (17C2120) on a virgin system drive of your choice (NVMe, SSD or HDD).

1.) In order to perform a clean install of macOS High Sierra 10.13.2 (17C2120), prepare a virgin NVMe, SDD or HDD destination drive for the iMac Pro macOS installation by formatting the drive with HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility on any other Hackintosh or Mac of your choice. This will create an empty HFS+ Partition and a yet empty EFI-partition on the drive.

2.) Copy the EFI-Folder you prepared in Section D.1) to the yet empty EFI Partition.

3.) Now connect the Destination Drive to your Hackintosh System and boot the latter with the plugged iMac Pro macOS High Sierra 10.13.2 (17C2120) USB Flash Drive Installer, your created in Section D.2)

5.) While booting your system, press the F8 button to enter the BIOS boot menu. Select to boot from your iMac Pro macOS USB Flash Drive Installer.

6.) Subsequently, click on the USB Flash Drive Installer Icon in the clover boot menu to boot the respective macOS Installer partition on your iMac Pro macOS USB Flash Drive Installer

7.) After successful boot, pass the individual steps of the macOS high Sierra 10.13 installation menu and finally select the destination drive of your macOS High Sierra 10.13 Installation, which should be logically the system disk you successfully configured above. In the next step, the Installer will create a macOS High Sierra 10.13 Installer Partition on the system disk and subsequently reboot your system.

8.) During system reboot, just press again the F8 button to enter the BIOS boot menu. Select again to boot from your USB Flash Drive. In contrary to 6.), click this time on the "Install MacOS.." Icon in the clover boot screen to boot the newly created macOS High Sierra 10.13 Installer Partition on your system disk.

9.) After successful boot, you will enter now the macOS High Sierra 10.13 Installer Screen with a progress bar starting at 18 minutes.

10.) After another reboot, press again the F8 button to enter the BIOS boot menu. Select to boot with your System Disk EFI-folder. Click on the "MacOS High Sierra" icon in the clover boot screen to boot the updated macOS High Sierra 10.13 partition on your system disk.

11.) After successfully registration at iCloud, you now have your first iMac Pro macOS High Sierra 10.13.2 (17C2120) build.

Proceed with D.3) - iMac Pro macOS High Sierra Build Updates and Section E.) - Post Installation Process.


D.5) Direct iMac Pro conversions of a functional Skylake-X/X299 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation
View attachment 276782

1.) Replace the EFI-Folder of your System Disk by the EFI-Folder you created in Section D.1)

2.) Copy /System/Library/CoreServices/PlatformSupport.plist to your Desktop, add "BoardID Mac-7BA5B2D9E42DDD94"
under SupportedBoardIDs by means of Xcode as suggested by user Griven from the German Hackintosh-Forum and copy back the modified PlatformSupport.plist to System/Library/CoreServices/.

3.) If not already in your /Applications folder after performing Section D.2), copy the iMac Pro macOS Installer Package ("Install High Sierra.app") to your /Applications folder. Alternatively to D.2) and the macOS Full Package Installer, it is also sufficient to just download the original unmodified 10.13.2 (17C2120) BaseSystem.dmg Distribution from the Apple Server by following this PUBLIC LINK.

4.) Double click on the "Install High Sierra.app" in the /Applications Folder to start the macOS 10.13.2 (17C2120) installation. Alternatively, double click on the BaseSystem.dmg to mount the macOS installer and double click on the therein contained "Install macOS High Sierra.app" to start the macOS 10.13.2 (17C2120) installation.

8.) After reboot, click on the "Install MacOS.." Icon in the clover boot screen to boot the newly created macOS High Sierra 10.13 Installer Partition on your system disk.

9.) After successful boot, you will enter now the macOS High Sierra 10.13 Installer Screen with a progress bar starting at
18 minutes.

10.) After another reboot, click on the "MacOS High Sierra" icon in the clover boot screen to boot the updated macOS High Sierra 10.13 partition on your system disk.

11.) After successfully registration at iCloud, you now have your first iMac Pro macOS High Sierra 10.13.2 (17C2120)
build.

Proceed with Section D.3)

D.6) iMac Pro macOS High Sierra Update Procedure

After the successful clean install or conversion you can update your iMac Pro macOS High Sierra 10.13.2 (17C2120) build to either macOS High Sierra 10.13.3 (17D2047) or macOS High Sierra 10.13.4 Public Beta 6 after successfully registration for Apple's Public Beta Program directly via the Appstore. Also any future macOS High Sierra Update can be directly performed via the Appstore.


E.) Post Installation Process

View attachment 272809
E.1) HWP (Intel SpeedShift Technology) CPU Power Management Configuration

View attachment 272852

The EFI folder of EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zipp attached towards the end of this originating post/guide, already contains a fully functional HWP (Intel SpeedShift Technology) CPU power management configuration for all Skylake-X processors! And the excellent news are that on Skylake-X/X299 Systems with open mainboard BIOS MSR 0xE2 register and SMBIOS iMacPro1,1 we even gain fully native HWP (IntelSpeedShift) Power Management after disabling the last remaining XCPM KernelToPatch entry "xcpm_core_scope_msrs" in Section "Kernel and Kext Patches" of Clover Configurator, which by default is yet implemented and enabled in the config.plist of the distributed EFI-Folder EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip. Users with locked mainboard BIOS MSR 0xE2 register, still have tho use the "xcpm_core_scope_msrs" XCPM KernelToPatch entry to successfully boot their systems.

View attachment 307470

Else, no XCPM Kernel patches, no FakeCUPID, no ssdt.aml, just beautiful native HWP (Intel SpeedShift Technology) CPU power management for all Skylake-X CPUs. Just remove, if still present, all XCPM Kernel patches and the FakeCPUID from your config.plist as well as the ssdt.aml from the /EFI/CLOVER/ACPI/patched/ directory in the EFI-Folders of your macOS USB Flash Drive Installer or macOS System Disk.

E.2) Graphics Configuration:

View attachment 272891

ATI graphics cards startup solutions like the Gigabyte Radeon RX 560 or RX 580 just require two basic kexts in the /EFI/Clover/kexts/Other/ directory of the EFI folders on both USB Flash Drive Installer and 10.13 System Disk , i.e. namely the WhateverGreen.kext v1.1.4 and the Lilu.kext v1.2.1.

ATI Radeon Vega 64 and Frontier users should have full native support under macOS High Sierra 10.13. These GPUs run Out of Box and do not require any additional tools or measurements like Whatevergreen.kext or Lilu.kext

Also Nvidia Kepler Cards are also natively implemented.

All Nvidia Pascal and Maxwell graphics cards users can now also employ the officially distributed Nvidia 10.13 Web Drivers for their Nvidia Pascal and Maxwell graphics cards! Upon my request from 7 January 2018, Nvidia officially realised the first WebDriver-78.10.10.10.25.105 for 10.13.2 (17C2120) and the first WebDriver-78.10.10.10.25.106 for 10.13.2 SA (17C2205) - Supplemental Update on 11 January 2018. 10.13.3 (17D2047) or 10.13.4 Public beta users can use WebDriver-78.10.10.10.25.106 after a simple patching procedure detailed blow.

How to patch the WebDriver:

Download the Nvidia WebDriver-Payload Repackager from InsanelyMac. Credits to Chris111 and Pavo.

The patch procedure is simple and fully described in the implemented Readme.txt and will reveal a Repackaged-WebDriver.pkg, which can be used for the Nvidia Web Driver Installation under macOS 10.13.3 (17D2047) or 10.13.4 public beta .

Nvidia Web Driver Installation and Black Screen Prevention:

As we do use SMBIOS iMacPro1,1, we MUST implement some way of subverting AppleMobileFileIntegrity banning the driver before performing the Nvidida Web Driver Installation!

Important Note: if you ever tried before a Black Screen Prevention by means of the NVWebDriverLibValFix.kext v1.0.0 in /EFI/CLOVER/kexts/Other/, remove the latter file from the latter directory! Note that NVWebDriverLibValFix.kext is now already implemented in NvidiaGraphicsFixup.kext v1.2.2! If you apply the content of the primer kext twice, you will end up in a boot loop!

a.) Copy NvidiaGraphicsFixup.kext v1.2.2 and Lilu.kext v1.2.1 to the /EFI/CLOVER/kexts/Other/ directory in the EFI-Partition of your System Disk.

b.) Install now the actual Nvidia 10.13 Web Driver Package.

c.) Now reboot as requested by the Nvidia Web Driver Installer and you will have a fully functional Web Driver after reboot.

d.) All 10.13.3 (17D2047) and 10.13.4 public beta Users still have to perform the following additional steps:

i.) Copy /L/E/ NVDAStartupWeb.kext to your Desktop.

ii.) Right-click on NVDAStartupWeb.kext and select show package content.

iii.) Change to "Contents" and edit the "Info.plist" with Xcode.

iv.) Go to IOKitPersonalities -> NVDAStartup -> change "NVDARequiredOS" from "17C2205 " to "17D2047" or the corresponding build number of 10.13.4 public beta.

v.) Save "Info.plist" and copy the modified "NVDAStartupWeb.kext" to /L/E/ with root permission.

vi.) Open a terminal and enter the following commands:

Code:
sudo chmod -R 755 /Library/Extensions/NVDAStartupWeb.kext

Code:
sudo chown -R root:wheel /Library/Extensions/NVDAStartupWeb.kext

Code:
sudo touch /System/Library/Extensions && sudo kextcache -u /

Code:
sudo touch /Library/Extensions && sudo kextcache -u /

vii.) Reboot.

viii.) The Web Driver will not be active yet. Therefore, open the Nvidia Driver Manager and select "Nvidia Web Driver".

ix.) Reboot and you have a fully functional WEB Driver also for 10.13.3 (17D2047) or 10.13.4 public beta.

E.3) Audio Configuration:

View attachment 272904

Note that opposite to my previous EFI-Folder distributions, EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip does not contain any default audio configuration. You have to implement the audio approach of your choice during the Post Installation process! Please select between one out of three possible audio implementations detailed below:

E.3.1.) AppleALC Audio Implementation


The actual AppleALC audio implementation traces back to the extensive efforts and brilliant work @vit9696 and @apfelnico . This new AppleALC audio approach bases on the AppleALC.kext v1.2.2, which further requires the Lilu.kext v1.2.1 in the /EFI/CLOVER/kexts/Other/ directory of your System Disk.

Provided that you use the EFI-Folder contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip, you need to open the config.plist in the /EFI/CLOVER/ directory of your System Disk with the Clover Configurator and enable the CAVS -> HDEF DSDT replacement patch
in Clover Configurator Section "ACPI" under "DSDT Patches".

Code:
Comment:          Find*[Hex]     Replace [Hex]
CAVS -> HDEF      43415653       48444546

Note that opposite to the alternative VoodooHDA and CLoverALC approach detailed below, the AppleALC audio implementation requires an Audio ID in injection of "7" instead of "1". Implement the latter Audio ID in the config.plist of your System Disk under "Audio" and "Injection" in the Section "Devices" of the Clover Configurator.

HDMI/DP digital Audio Output is fully implemented by means of Whatevergreen.kext v1.1.4 or NvidiaGraphicsFixup.kext v1.2.2 .

The correct audio PCI device implementation will be performed and detailed in Section E.9).

To remove the AppleALC Audio Approach Implementation perform the following steps:

1.) Remove AppleALC.kext v1.2.2 from the /EFI/CLOVER/kexts/Other/ directory of your System Disk.

2.) Disable in the config. plist the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under "DSDT Patches".

3.) Adopt the Audio ID Injection in your respective config.plist in Clover Configurator Section "Devices" for the alternative audio approach you intent to use.

4.) Reboot

E.3.2) VoodooHDA Audio Implementation

1.) Provided that you use the EFI-Folder contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip, you need to open the config.plist in the /EFI/CLOVER/ directory of your System Disk with the Clover Configurator and enable the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under "DSDT Patches".

Code:
Comment                         Find*[HEX]      Replace*[HEX]
Rename CAVS to HDEF      43415653        48444546

2.) Download, unzip the VoodooHDA.kext v2.9.0d10 attached at the end of this originating post/guide to your Desktop. Mouse Right-Click on VoodooHDA.kext -> select "Show Package Contents" -> click on "Contents" -> Right-Click on "Info.plist" -> "Open With" -> "Other" -> select "TextEdit.app"

3.) a.) In the TextEdit.app select in the menu "Edit" -> "Find" -> "Find..." -> search for "IOPCIClassMatch" and

replace

Code:
<key>IOPCIClassMatch</key>
<string>0x04020000&amp;0xfffe0000</string>

with

Code:
<key>IOPCIPrimaryMatch</key>
<string>0x43831002</string>

b.) Download, unzip and run the IORegistryExplorer.app v2.1 attached at the end of this originating post/guide.

Search for HDEF and write down the "IOName"-entry under e.g. PC00@0/AppleACPIPCI/HDEF@1F,3 which can slightly deviate on mainboards different from the ASUS Prime X299 Deluxe.

View attachment 278293

The HDEF-IOName on the ASUS Prime X299 Deluxe is "pci8086,a2f0"

Concert the IOName as shown below in case of the HDEF-IOName of the ASUS Prime X299 Deluxe:

"0xa2f08086"

c.) Now replace in the "Info.plist" of "VoodooHDA.kext"

"0x43831002"

by

"0xa2f08086"

and save the "Info.plist".

d.) Copy the modified "VoodooHDA.kext" to the /EFI/Clover/kexts/Other/ - directory of your System Disk.

4.) Download, unzip and copy the
VoodooHDA.prefPane v1.2 attached below to ~/Library/PreferencePanes/

5.) Note that the VoodooHDA audio approach requires an Audio ID in injection of "1". The corresponding modification of the config.plist has to be implemented by means of the Clover Configurator by modifying the respective entry in Section "Devices".

6.) Reboot

To remove the VoodooHDA audio implementation, perform the following steps:

1.) Disable in the config. plist the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under "DSDT
Patches".

2.) Remove VoodooHDA.kext from the /EFI/CLOVER/kexts/Other/ directory of your System Disk.

3.) Remove VoodooHDA.prefPane from ~/Library/PreferencePanes/

4.) Adopt the Audio ID Injection in your config.plist in Section "Devices" of the Clover Configurator for the alternative audio approach you intent to use

5.) Reboot

E.3.3) cloverALC Audio Implementation

@toleda 's cloverALC audio approach has been implemented thanks to the respective advices and help of user @Ramalama. Note that in contrary to the AppleALC and VoodooHDA approaches, the cloverALC audio approach detailed below will patch the native vanilla AppleHDA.kext in the /S/L/E directory of your System Disk! This before implementing the cloverALC audio approach, backup your native vanilla AppleHDA.kext from the /S/L/E directory on your System Disk! You will have to reinstall the native vanilla AppleHDA.kext from the /S/L/E directory on your System Disk with the appropriate permissions during a removal of the cloverALC Audio Implementation! Thus you need a backup of the latter native vanilla kext in any case!

CloverALC audio approach installation:

1.) Provided that you use the EFI-Folder contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip, you need to open the config.plist in the /EFI/CLOVER/ directory of your System Disk with the Clover Configurator and enable the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under "DSDT Patches".

Code:
Comment                  Find*[Hex]    Replace[Hex]
Rename CAVS to HDEF      43415653      48444546

2.) Change the Audio ID Injection in the config.plist on your System Disk in Section "Devices" under "Audio" and "Inject" to "1".

3.) Add the following cloverALC related KextToPatch entries to your config.plist on your System Disk in section "Kerneland Kext Patches" of Clover Configurator in the "KextsToPatch" listing:

Code:
Name*         Find*[Hex]         Replace* [Hex]    Comment
AppleHDA      8a19d411           00000000          t1-10.12-AppleHDA/Realtek ALC...
AppleHDA      8b19d411           2012ec10          t1-10.12-AppleHDA/RealtekALC1220
AppleHDA      786d6c2e 7a6c      7a6d6c2e 7a6c     t1-AppleHDA/Resources/xml>zml

4.) Download, unzip and copy the realtekALC.kext v2.8 to the /EFI/CLOVER/kexts/Other/ directory on your System Disk

5.) Download and execute audio_cloverALC-130.sh, which will patch the native vanilla AppleHDA.kext in the /S/L/Edirectory of your System Disk

6.) Reboot

To remove the cloverALC audio implementation, perform the following steps:

1.) Remove realtekALC.kext from the /EFI/CLOVER/kexts/Other/ directory on your System Disk

2.) Remove all cloverALC related KextToPatch entries from the config.plist on your System Disk in the "Kernel andKext Patches" section of Clover Configurator.

3.) Disable in the config. plist the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under"DSDT Patches".

4.) Delete the patched AppleHDA.kext in the /S/L/E/ Directory on your System Disk

5.) Reinstall the original vanilla AppleHDA.kext with the appropriate permission in the /S/L/E/ directory on yourSystem Disk using Kext Utility

6.) Adopt the Audio ID Injection in your config.plist in Section "Devices" of the Clover Configurator for the alternative audioapproach you intent to use

7.) Reboot


E.4) USB Configuration:

View attachment 272913


Since 10.13 SU and with AppleIntelPCHPMC, Apple now natively implements IOPCIPrimaryMatchID "a2af8068" and AppleUSBXHCISPT on the ASUS Prime X299 Deluxe. Thus, all external and internal XHC USB 3.0 (USB 3.1 Gen 1 Type-A) and USB 2.0 (USB 2.0 Gen 1 Type-A) ports work natively at expected data transfer rates (90 Mb/S (USB 3.0)and 40 MB/s (USB 2.0), respectively) for all X299 mainboards. All external and internal USB 3.1 (USB 3.1 Gen 2 Type-A and Type-C) ports were natively implemented already before on different controllers than XHC and also work at data rates up to 140 MB/s. Up to my best knowledge, the native XHC USB implementation states for all X299 mainboards.

My former sophisticated XHC USB Kext Workaround and all respective Guidelines are are obsolete but still can be accessed at:

https://www.tonymacx86.com/threads/macos-high-sierra-10-13-xhc-usb-kext-creation-guideline.242999/


USB 2.0 and USB 3.0 Benchmark Results

View attachment 284895


USB 3.1 Type-A and Type-C Benchmark Results

For the individual USB 3.1 Type-A and Type-C Connectors Benchmark, I used the external Lacie Rugged Thunderbolt / USB Type-A and Type-C HDD.

View attachment 276390


E.5) ASUS Prime X299 Deluxe Thunderbolt EX3 PCIe Add-On Implementation

View attachment 276330

For the successful implementation of the Thunderbolt EX3 PCIe Add-On Adapter, a fully working Dual Boot System with an UEFI Windows Implementation is unfortunately absolutely mandatory. You will not be able to configure your Thunderbolt EX3 PCIe Add-On Adapter in the mainboard BIOS, until the Adapter has been successfully recognised and initialised by the UEFI Windows System. Fortunately legal and official License Keys for the actual Windows 10 Pro distribution can be purchased with a little bit of temporal effort on Google for an actual price of 20 $ or even below! Thus, the installation of a dual boot system with Windows will require some additional temporal user effort but will not noticeably further affect the users's budget.

Please note that I especially emphasize the term UEFI, when speaking about the parallel Windows implementation. Don't use or perform a Legacy Implementation of Windows! In order to properly implement your Windows partition later-on in the Clover Bootloader and to comply with the actual Mainbaord-BIOS settings requirements, it is absolutely mandatory to run or perform an UEFI Windows implementation!

So if not already implemented, how to achieve a fully working UEFI Windows Implementation and Dual boot System with Windows?

1.) Important Note! For the implementation of the UEFI Windows Distribution disconnect all usually plugged macOSDrives from your rig! The Windows installer will implement a Windows Boot Loader! If you have any macOS Drive connected during installation, the latter Windows Boot Loader might overwrite and destroy your current Clover Boot Loader. This is the last thing you want! Thus for the windows installation just connect the destination drive for the installation and the Windows USB Flash Drive Installer your will create in the subsequent step below!

2.) This Tutorial explains in all necessary detail how to download an actual Windows 10 Creator distribution, and how tosubsequently create a bootable USB Flash Drive Installer for a subsequent UEFI Windows 10 installation by means RUFUS! Don't put emphasis on alternative optional methods and always take care that you just follow the instructions for a successful subsequent UEFI Windows Installation!

View attachment 275751

3.) This Tutorial explains in all necessary detail how to properly perform the actual Windows 10 Pro Creator UEFIInstallation, subsequent to the a bootable Windows USB Flash Drive Installer realisation detailed in 2.) above

View attachment 276317

4.) This Tutorial explains in all necessary detail, how to migrate/clone/backup your Windows 10 UEFI System Disk afterinstallation for future maintenance and safety

View attachment 276319

5.) After successfully performing the UEFI Windows 10 Pro Creator Implementation, you can reconnect your macOS driveto your rig. The newly created UEFI Windows 10 Pro Creator Partition will automatically appear as a further boot option in both BIOS Boot Option Menu (F8) and Clover Boot Menu! No additional or further actions or measurements have to be taken!

View attachment 276321

6.) Once your Windows 10 Pro Creator Partition is fully operational, install all drivers and programs implemented on theASUS Prime X299 Series DVD attached to your mainboard. This will further allow you to properly adjust the desired AURA Mainboard Settings and offer many other mainboard configuration options.

View attachment 276324

7.) Now switch of your rig and start with the installation of the Thunderbolt EX3 PCIe Add-On Adapter

a.) I recommend to install the adapter in third PCIe Slot from the bottom which is PCIEX_3

View attachment 276325

b.) Don't forget to also connect the attached TB-Cable with both the connector on the Thunderbolt EX3 PCIe Add-OnAdapter and the TB-Header on the ASUS Prime X299 Deluxe mainboard.

8.) Reboot into windows and install the ASUS ThunderboltEX 3 DVD accompanying your ASUS Prime X299 Deluxe mainboard.

View attachment 276326

9.) Reboot and enter the Mainboard BIOS (F2)

a.) Go to /Advanced/ Thunderbolt(TM) Configuration/ and apply the following BIOS Settings detailed below:

/Advanced/ Thunderbolt(TM) Configuration/

Code:
TBT Root por Selector                               PCIE16_3
Thunderbolt USB Support                             Enabled
Thunderbolt Boot Support                            Enabled
Wake From Thunderbolt(TM Devices)                   Off
Thunderbolt(TM) PCIe Cache-line Size                128
GPIO3 Force Pwr                                     On
Wait time in ms after applying Force Pwr            200
Skip PCI OptionRom                                  Enabled
Security Level                                      SL1-No Security
Reserve mem per phy slot                            32
Reserve P mem per phy slot                          32
Reserve IO per phy slot                             20
Delay before SX Exit                                300
GPIO Filter                                         Enabled
Enable CLK REQ                                      Disabled
Enable ASPM                                         Disabled
Enable LTR                                          Disabled
Extra Bus Reserved                                  65
Reserved Memory                                     386
Memory Alignment                                    26
Reserved PMemory                                    960
PMemory Alignment                                   28
Reserved I/O                                        0
Alpine Ridge XHCI WA                                Disabled

b.) Verify in /Boot/ that
Above 4G Decoding is Off

/Boot/

Code:
Above 4G Decoding              Off

10.) Shut down your rig, connect the Thunderbolt Device with the Thunderbolt EX3 Adaptor and boot

11.) You are done! Your Thunderbolt EX3 PCIe Adapter and connected devices should be now fully implemented andfunctional.

12.) Finally note that there is no Hot Plug Support with the current configuration. Thus related Thunderbolt Devices mustbe connected before System Boot and cannot be unplugged or replugged during system operation!


Thunderbolt Benchmark

For the sake fo completeness and for testing the overall Thunderbolt Functionality and Performance, I benchmarked the the data rates of an external Thunderbolt Drive connected via Apple's Thunderbolt-3 to Thunderbolt-2 Adapter. As External Thunderbolt Drive, I once more used the Lacie Rugged Thunderbolt / USB Type-A and Type-C HDD.

View attachment 276391


E.6) NVMe compatibility

View attachment 276327

In contrary to macOS Sierra 10.12, in macOS High Sierra 10.13 there is native support of non-4Kn NVMe SSDs, like my Samsung EVO 960 M.2 NVME. All patches applied under macOS Sierra 10.12 are therefore obsolete. The native support of non-4Kn NVMe SSDs enables the unique opportunity to directly perform a clean-install of macOS High Sierra 10.13 on M.2 NVMEs like the Samsung EVO 960.


E.7.) SSD TRIM Support:

Macs only enable TRIM for Apple-provided solid-state drives they come with. If you upgrade a Mac with an aftermarket SSD, the Mac won’t use TRIM with it. The same applies for SSD's used by a Hackintosh. When an operating system uses TRIM with a solid-state drive, it sends a signal to the SSD every time you delete a file. The SSD knows that the file is deleted and it can erase the file’s data from its flash storage. With flash memory, it’s faster to write to empty memory — to write to full memory, the memory must first be erased and then written to. This causes your SSD to slow down over time unless TRIM is enabled. TRIM ensures the physical NAND memory locations containing deleted files are erased before you need to write to them. The SSD can then manage its available storage more intelligently.

Note that the config.plist in the EFI-folder of EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip attached towards the end of this guide, contains an SSD "TRIM Enabler" KextsToPatch entry, which can be found in the " Kernel and Kext Patches" Section of the Clover Configurator.

View attachment 274131

Code:
Name*                   Find*[HEX]                  Replace*[HEX]               Comment           MatchOS
IOAHCIBlockStorage      4150504c 45205353 4400      00000000 00000000 0000      Trim Enabler      10.12.x,10.13.x

With this KextToPatch entry, SSD TRIM should be fully enabled on your 10.13 System, see Apple's System Report below.

View attachment 274132

NVMe and SSD Benchmark

For the sake of completeness please find below the Benchmark of connected NVMe and SDD Drives.

View attachment 276392


E.8) ASUS Prime X299 Deluxe on-board Ethernet-Functionality

View attachment 276393

Thanks to the SmallTree-Intel-211-AT-PCIe-GBE.kext, also the Intel I211_AT Gigabit on-board LAN controller of the ASUS Prime X299 Deluxe will be correctly implemented and fully functional, in addition to the anyway natively implemented Intel I219-V Gigabyte on-board LAN controller of the ASUS Prime X299 Deluxe. Thus, both ethernet ports on the ASUS Prime X299 Deluxe should now be fully operational..

Just download , unzip and copy the SmallTree-Intel-211-AT-PCIe-GBE.kex attached below to the /EFI/Clover/kexts/Other/, reboot and you should be done.


E.9) ASUS Prime X299 Deluxe PCI Device Implementation - Sleep/Wake functionality

In order to properly implement all PCI devices available on your system and build, one needs an adequate ACPI DSDT Replacement Patch Table and a sophisticated SSDT-X299.aml. Both requirements have been originally successfully implemented for the ASUS Prime X299 Deluxe by our gorgeous @apfelnico with partial contributions of @TheOfficialGypsy . Many thanks for the extensive efforts and extremely fruitful and brilliant work!
I now adopted the ACPI DSDT Replacement Patches and the SSDT-X299.aml in concordance with SMBIOS iMacPro1,1. The updated ACPI DSDT Replacement Patches are already part of the config.plist contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip. The new SSDT-X299-iMacPro.aml is attached at the bottom of this originating post/guide.

Note that both ACPI DSDT Replacement Patches and SSDT-X299-iMacPro.aml can be build and PCIe slot population dependend and have to be verified and likely adopted or modified for all mainboards different from the ASUS Prime X299 Deluxe and builds or PCIe slot populations different from the one that constitutes the baseline of this guide.

For the ASUS Prime X299 Deluxe I will use in the following the PCIe Slot nomenclature depicted below:

View attachment 303192

The verification and likely adaptation/modification can be performed by the help of IORegistryExplorer v1.2. Note once more that the ACPI DSDT Replacement Patches and SSDT-X299-iMacPro.aml implementation detailed below requires SMBIOS iMacPro1,1.


E.9.1) ACPI DSDT Replacement Implementation

Note that all required ACPI DSDT Patches are already implemented in the config.plist in the /EFI/CLOVER/ directory of the EFI-Folder contained in EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip. However, by default they are disabled, thus we will now open the config.plist in the /EFI/CLOVER/ directory of your 10.13 System Disk EFI-Folder with Clover Configurator and stepwise adopt (if necessary) and enable the different required DSDT replacement patches in Clover Configurator Section "ACPI" under "DSDT patches", by also discussing their respective function and impact.

a.) The CAVS -> HDEF DSDT replacement patch is audio related and has the aim to achieve the SMBIOS iMacPro1,1specific HDEF onboard audio controller implementation.

If not already enabled in Section E.3), please enable this DSDT replacement patch now independent from your mainboard.

Code:
Comment:          Find*[Hex]     Replace [Hex]
CAVS -> HDEF      43415653       48444546

b.) The PC00 -> PCI0 ACPI DSDT replacement patch has the main aim to achieve a SMBIOS iMacPro1,1specific PCI implementation. Note that under SMBIOS iMacPro1,1 all other PC0x definitions remain unchanged.

Please enable now the PC0x -> PCIx ACPI DSDT replacement patch.

Code:
Comment:            Find*[Hex]     Replace [Hex]
PC00 -> PCI0        50433030       50434930

c.) SL05 -> GFX0 is a graphics related ACPI DSDT replacement patch to achieve consistency with the SMBIOSiMacPro1,1 variable naming. This ACPI DSDT replacement patch is not mainboard but slot specific! All mainboard users with their GPU in PCIe Slot 1 can now enable this ACPI DSDT replacement patch.

Code:
Comment:            Find*[Hex]      Replace [Hex]
SL05 -> GFX0        534c3035        47465830

All mainboard users with their GPU in a PCIe Slot different from one have to adopt the patch previously. E.g. with a GPU in PCIe Slot 4, the ACPI DSDT replacement patch looks the following.

Code:
Comment:            Find*[Hex]      Replace [Hex]
SL01 -> GFX0        534c3031        47465830

Users with two GPUs in PCIe Slot 1 and 4 might use the following ACPI DSDT replacement patches

Code:
Comment:            Find*[Hex]      Replace [Hex]
SL05 -> GFX0        534c3035        47465830
SL01 -> GFX1        534c3031        47465831

Note that the respective ACPI DSDT replacement patch(es) are not GPU brand specific.

However, the SSDT-X299-iMacPro.aml, which will be addressed in detail in Section E.9.2) below, can have GPU brand dependent device definitions and can also be sensitive with respect to the GPU PCIe population.

d.) OSI -> XOSI, EC0_ -> EC__ and H_EC -> EC__ are once more ACPI DSDT replacement patches to achieveconsistency with the SMBIOS iMacPro1,1 variable naming.

i.) XOSI functionality is required as explained by @RehabMan (just follow this LINK forfurther details).

The ACPI code can use the_OSI method (implemented by the ACPI host) to check which Windows version is running. Most DSDT implementations will vary the USB configuration depending on the active Windows version. When running OS X, none of the DSDT _OSI("Windows <version>") checks will return "true" as there is only response from "Darwin". This issue can be solved by implementing the "OS Check Fix" family of DSDT patches in the SSDT-X299-iMacPro.aml. By DSDT patching we can simulate a certain version of Windows although running Darwin and we can obtain a system behaviour similar to a windows version specific environment. The respective SSDT-X299-iMacPro.aml implementations will be discussed in Section E.10.2) below. Note that in addition to the OSI -> XOSI DSDT Replacement Patch, one needs to add the
SSDT-XOSI.aml in the /EFI/Clover/ACPI/pathed directory of the System Disk EFI-Folder.

ii.) On the Asus X299 Prime Deluxe and most likely on all other X299 mobos we have the EC0 and H_EC controllers,which have to be renamed to 'EC' for proper USB power management. Thus once more investigate your mainboard specific IOREG entry and enable both EC0_ -> EC__ or and H_EC -> EC__ DSDT Replacement Patches.

Code:
Comment:             Find*[Hex]      Replace [Hex]
OSI -> XOSI          5f4f5349        584f5349
EC0_ -> EC__         4543305f        45435f5f
H_EC  -> EC__        485f4543        45435f5f

e.) GBE1 -> ETH0 and D0A4 -> ETH1 are ASUS Prime X299 Deluxe specific LAN related ACPI DSDT replacement patches to achieve consistency with the MAC variable naming. All ASUS Prime X299 users can now enable the respective ACPI DSDT replacement patches. Note that the ETH0 and ETH1 implementations in the SSDT-X299-iMacPro.aml addressed in Section E.9.2.) are of cosmetic nature. All users of mainboards different from the ASUS Prime X299 Deluxe have to find their mainboard-specific LAN-entries in the IOREG and replace the "GBE1" and "D0A4" ACPI DSDT Replacement Patches and SSDT-X299-iMacPro.aml implementations depending on the mainboard in use. Alternatively, the GBE1 -> ETH0 and D0A4 -> ETH1 ACPI DSDT replacement patches can als maintain disabled.

Code:
Comment:             Find*[Hex]       Replace [Hex]
GBE1 -> ETH0        47424531         45544830
D0A4  -> ETH1        44304134         45544831

f.) The HEC1 -> IMEI and IDER->MEID ACPI DSDT Replacement patches are Intel Management Engine Interface relatedand are vital as MacOS requires the variable names "IMEI" and "MEID" to load the 'AppleIntelMEIDriver'. The latter functionality solves the 'iTunes/Apple Store Content Access Problem' which is discussed here.

Please enable now both ACPI DSDT Replacement patches independent from your mainboard.

Code:
Comment:             Find*[Hex]       Replace [Hex]
HEC1 -> IMEI         48454331         494d4549
IDER->MEID          49444552         4d454944

g.) The PMC1 -> PMCR ACPI DSDT patch replacement is Power Management Controller (PMC) related and applied forconsistency with the PMC naming on real Macs.

Please enable now this ACPI DSDT replacement patch independent from your mainboard.

Code:
Comment:             Find*[Hex]        Replace [Hex]
PMC1 -> PMCR         504d4331          504d4352

h.) The LPC0 -> LPCB ACPI DSDT Replacement Patch is AppleLPC and SMBus related and is applied for consistency withthe variable naming on a real Mac. Note that LPCB injects AppleLPC, which however is not required in the X299 environment. X299 Systems seem to have sleep problems with the SMBus properties injected. Thus, the LPCB functionality will be disabled within the SSDT-X299-iMacPro.aml.

Please enable now this ACPI DSDT replacement patch independent from your mainboard.

Code:
Comment:             Find*[Hex]         Replace [Hex]
LPC0 -> LPCB         4c504330           4c504342

i.) FPU_->MATH, TMR_->TIMR, PIC_->IPIC are all ACPI DSDT Replacement Patches for consistency with the variablenaming on a real Mac. The variables are however functionless on either our X299 boards or real Macs.

Please enable now all three ACPI DSDT Replacement Patches independent from your mainboard.

Code:
Comment:             Find*[Hex]        Replace [Hex]
FPU_ -> MATH         4650555f          4d415448
TMR_ -> TIMR         544d525f          54494d52
PIC_ -> IPIC         5049435f          49504943

j.) SLOC -> ARPT is an Airport related ACPI DSDT replacement patch, which I additionally introduced for consistencywith the variable naming on a real Mac when using an OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 PCIe Adapter on the ASUS Prime X299 Deluxe in PCIe Slot 3. The respective SSDT-X299-iMacPro.aml implementations will be addressed in Section E.9.2).

All ASUS Prime X299 Deluxe and OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 users with the PCIe Adapter in PCIe Slot 3 can now enable the respective ACPI DSDT Replacement patch.

Code:
Comment:             Find*[Hex]         Replace [Hex]
SLOC -> ARPT         534c3043           41525054

All OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 users of different mainboards or with the PCIe Adapter in a PCIe Slot different from 3 have to primarily verify and likely adopt/modify the SLOC -> ARPT in concordance with the IOREG entries for their specific mainboard and build or slot population. Users without the OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 PCIe Adapter can simply leave this ACPI DSDT replacement patch disabled. Users of a WIFI and Bluetooth Adapter different from the OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 can enable this ACPI DSDT replacement patch but might have to adopt the SSDT-X299-iMacPro.aml device implementation discussed in Section E9.2 below.

k.) SL01 -> UPSB is a Thunderbolt related ACPI DSDT replacement patch for consistency with the variablenaming on a real Mac when using the ASUS TBEX 3 PCIe Adapter on the ASUS Prime X299 Deluxe in PCIe Slot 4. All respective users can now enable this ACPI DSDT replacement patch.

Code:
Comment:             Find*[Hex]         Replace [Hex]
SL01 -> UPSB         534c3031           55505342

ASUS mainboard users with the TBEX 3 in a PCIe slot different from 4 have to primarily adopt the ACPI DSDT replacement patch in concordance with the IOREG entries for their specific mainboard and slot population. Users without the ASUS TBEX 3 or any other TB PCIe Adapter can simply leave this ACPI DSDT replacement patch disabled. Users of a TB Adapter different from the ASUS TBEX 3 can enable this ACPI DSDT replacement patch but might have to adopt the SSDT-X299-iMacPro.aml device implementation discussed in Section E9.2 below.

l.) The DSM -> XDSM DSDT replacement patch is vital for loading the SSDT-X299-iMacPro.aml, as all DSM methods used in theoriginal DSDT do have a not compatible structure totally different from the real Mac environment. Without any fix, all DSM methods would be simply ignored. Note that one single device can have only one DSM method, which can assign additional properties to the respective device.

Thus please enable the latter DSDT replacement patch completely independent from your mainboard!

Code:
Comment:             Find*[Hex]         Replace [Hex]
_DSM -> XDSM         5f44534d            5844534d


E.9.2) SSDT-X299-iMacPro.aml PCI Implementation

View attachment 304026

For the proper PCI device implementation (detailed in the Figure above), which is mostly of cosmetic nature and not always directly related to device functionality, we now have to revise and likely adopt or modify the attached SSDT-X299-iMacPro.aml to our specific build and system configuration with the help of the IORegistryExplorer. The entire section can also be simply skipped by unexperienced users, who also prefer to skip the implementation of the SSDT-X299-iMacPro.aml and respective PCI Device implementation.

Note that for each device, the SSDT-X299-iMacPro.aml contains a DefinitionBlock entry and the underlying PCI device implementation. In case of necessary modifications/adaptations, don't forget to also modify/adapt the respective DefinitionBlock entries in concordance with your IOREG entries. The entire SSDT structure is module like. Each module can be independently added, changed or removed in dependence of your specific build, needs and requirements. A stepwise implementation of the individual PCI devices is recommended!

E.9.2.1) - HDEF - onboard PCI Audio Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.HDEF, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.HDEF)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x16)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "model",
                    Buffer (0x1C)
                    {
                        "Realtek ALC S1220A HD Audio"
                    },

                    "name",
                    Buffer (0x27)
                    {
                        "Realtek ALC S1220A HD Audio Controller"
                    },

                    "hda-gfx",
                    Buffer (0x0A)
                    {
                        "onboard-1"
                    },

                    "device_type",
                    Buffer (0x14)
                    {
                        "HD-Audio-Controller"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xF0, 0xA2, 0x00, 0x00                    
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,0C0C"
                    },

                    "MaximumBootBeepVolume",
                    Buffer (One)
                    {
                         0xEE                                      
                    },

                    "MaximumBootBeepVolumeAlt",
                    Buffer (One)
                    {
                         0xEE                                      
                    },

                    "layout-id",
                    Buffer (0x04)
                    {
                         0x07, 0x00, 0x00, 0x00                    
                    },

                    "PinConfigurations",
                    Buffer (Zero) {}
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The HDEF PCI device implementation is valid for the ASUS Prime X299 Deluxe and likely for all other mainboards with the Realtek ALC S1220A Audio Controller chipset. It is a build-in device and does not have any slot specific dependency. In any case verify device path "PCI0.HDEF" and PCI device implementations by means of IOREG.


E.9.2.2) - GFX0, HDAU - Nvidia Graphics Card and HDMI/DP Audio PCI implementation

DefintionBlock entry:

Code:
External (_SB_.PC02.BR2A, DeviceObj)    // (from opcode)
External (_SB_.PC02.BR2A.GFX0, DeviceObj)    // (from opcode)
External (GFX0, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
    Scope (_SB.PC02.BR2A)
    {
        Scope (GFX0)
        {
            OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
            Field (PCIS, AnyAcc, NoLock, Preserve)
            {
                PVID,   16,
                PDID,   16
            }

            Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
            {
                Return (GPRW (0x69, 0x04))
            }

            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x14)
                    {
                        "built-in",
                        Buffer (One)
                        {
                             0x00                                      
                        },

                        "device-id",
                        Buffer (0x04)
                        {
                             0x06, 0x1B, 0x00, 0x00                    
                        },

                        "hda-gfx",
                        Buffer (0x0A)
                        {
                            "onboard-2"
                        },

                        "AAPL,slot-name",
                        Buffer (0x07)
                        {
                            "Slot-1"
                        },

                        "@0,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00                    
                        },

                        "@1,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00                    
                        },

                        "@2,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00                    
                        },

                        "@3,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00                    
                        },

                        "@4,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00                    
                        },

                        "@5,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00                    
                        }
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }

        Device (HDAU)
        {
            Name (_ADR, One)  // _ADR: Address
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x0C)
                    {
                        "built-in",
                        Buffer (One)
                        {
                             0x00                                      
                        },

                        "device-id",
                        Buffer (0x04)
                        {
                             0xEF, 0x10, 0x00, 0x00                    
                        },

                        "AAPL,slot-name",
                        Buffer (0x07)
                        {
                            "Slot-1"
                        },

                        "device_type",
                        Buffer (0x16)
                        {
                            "Multimedia Controller"
                        },

                        "name",
                        Buffer (0x1D)
                        {
                            "NVIDIA High Definition Audio"
                        },

                        "hda-gfx",
                        Buffer (0x0A)
                        {
                            "onboard-2"
                        }
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

The actual GFX0 and HDAU PCI device implementation is valid for SMBIOS iMacPro1,1 (GFX0), the ASUS Prime X299 Deluxe and any Nvidia Graphics Card implemented in PCIe Slot 1.

It is a build and PCIe slot population dependent device implementation. Nvidia Graphics Card users with more than one graphics card, or with an Nvidia graphics card in a PCIe slot different from PCIe Slot 1, will have to adopt the respective device path entries PC02.BR2A, PCIe Slot definitions and PCI device properties following their respective IOREG entries.

Below one finds an example of @apfelnico for a GFX and HDAU PCI implementation of 2x Radeon Vega 64 in PCIe Slot 1 and 4. Note that for such implementation also requires an additional DSDT Replacement patch, namely:

Code:
SL01->GFX1     534c3031      47465831

DefintionBlock entry:

Code:
    External (_SB_.PC02.BR2A, DeviceObj)    // (from opcode)
    External (_SB_.PC02.BR2A.SL05, DeviceObj)    // (from opcode)
    External (_SB_.PC01.BR1A, DeviceObj)    // (from opcode)
    External (_SB_.PC01.BR1A.SL01, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PC02.BR2A.GFX0)
    {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Device (GFXA)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Device (GFX0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                OperationRegion (PCIB, PCI_Config, Zero, 0x0100)
                Field (PCIB, AnyAcc, NoLock, Preserve)
                {
                    Offset (0x10),
                    BAR0,   32,
                    BAR1,   32,
                    BAR2,   64,
                    BAR4,   32,
                    BAR5,   32
                }

                Method (_INI, 0, NotSerialized)  // _INI: Initialize
                {
                    If (LEqual (BAR5, Zero))
                    {
                        Store (BAR2, Local0)
                    }
                    Else
                    {
                        Store (BAR5, Local0)
                    }

                    OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFF0), 0x8000)
                    Field (GREG, AnyAcc, NoLock, Preserve)
                    {
                        Offset (0x6800),
                        GENA,   32,
                        GCTL,   32,
                        LTBC,   32,
                        Offset (0x6810),
                        PSBL,   32,
                        SSBL,   32,
                        PTCH,   32,
                        PSBH,   32,
                        SSBH,   32,
                        Offset (0x6848),
                        FCTL,   32,
                        Offset (0x6EF8),
                        MUMD,   32
                    }

                    Store (Zero, FCTL)
                    Store (Zero, PSBH)
                    Store (Zero, SSBH)
                    Store (Zero, LTBC)
                    Store (One, GENA)
                    Store (Zero, MUMD)
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x16)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-1"
                            },

                            "CFG,CFG_USE_AGDC",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "PP,PP_DisableAutoWattman",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "ATY,Part#",
                            Buffer (0x0C)
                            {
                                "113-3E366DU"
                            },

                            "@0,AAPL,boot-display",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "@0,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@1,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@2,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@3,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "model",
                            Buffer (0x13)
                            {
                                "AMD Radeon Vega 64"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (HDAU)
            {
                Name (_ADR, One)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0C)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-1"
                            },

                            "layout-id",
                            Buffer (0x04)
                            {
                                 0x01, 0x00, 0x00, 0x00
                            },

                            "name",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "model",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    }

Scope (\_SB.PC01.BR1A.GFX1)
    {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Device (GFXB)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Device (GFX1)
            {
                Name (_ADR, Zero)  // _ADR: Address
                OperationRegion (PCIB, PCI_Config, Zero, 0x0100)
                Field (PCIB, AnyAcc, NoLock, Preserve)
                {
                    Offset (0x10),
                    BAR0,   32,
                    BAR1,   32,
                    BAR2,   64,
                    BAR4,   32,
                    BAR5,   32
                }

                Method (_INI, 0, NotSerialized)  // _INI: Initialize
                {
                    If (LEqual (BAR5, Zero))
                    {
                        Store (BAR2, Local0)
                    }
                    Else
                    {
                        Store (BAR5, Local0)
                    }

                    OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFF0), 0x8000)
                    Field (GREG, AnyAcc, NoLock, Preserve)
                    {
                        Offset (0x6800),
                        GENA,   32,
                        GCTL,   32,
                        LTBC,   32,
                        Offset (0x6810),
                        PSBL,   32,
                        SSBL,   32,
                        PTCH,   32,
                        PSBH,   32,
                        SSBH,   32,
                        Offset (0x6848),
                        FCTL,   32,
                        Offset (0x6EF8),
                        MUMD,   32
                    }

                    Store (Zero, FCTL)
                    Store (Zero, PSBH)
                    Store (Zero, SSBH)
                    Store (Zero, LTBC)
                    Store (One, GENA)
                    Store (Zero, MUMD)
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x16)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-4"
                            },

                            "CFG,CFG_USE_AGDC",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "PP,PP_DisableAutoWattman",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "ATY,Part#",
                            Buffer (0x0C)
                            {
                                "113-3E366DU"
                            },

                            "@0,AAPL,boot-display",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "@0,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@1,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@2,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@3,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "model",
                            Buffer (0x13)
                            {
                                "AMD Radeon Vega 64"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (HDAU)
            {
                Name (_ADR, One)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0C)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-3"
                            },

                            "layout-id",
                            Buffer (0x04)
                            {
                                 0x01, 0x00, 0x00, 0x00
                            },

                            "name",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "model",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    }


E.9.2.3) - SBUS - onboard System Management Bus (SMBUS) Controller Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.SBUS, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.SBUS)
    {
        OperationRegion (GPIO, SystemIO, 0x0500, 0x3C)
        Field (GPIO, ByteAcc, NoLock, Preserve)
        {
            Offset (0x0C),
            GL00,   8,
            Offset (0x2C),
                ,   1,
            GI01,   1,
                ,   1,
            GI06,   1,
            Offset (0x2D),
            GL04,   8
        }

        Device (BUS0)
        {
            Name (_CID, "smbus")  // _CID: Compatible ID
            Name (_ADR, Zero)  // _ADR: Address
            Device (MKY0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Name (_CID, "mikey")  // _CID: Compatible ID
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03
                        })
                    }

                    Return (Package (0x07)
                    {
                        "refnum",
                        Zero,
                        "address",
                        0x39,
                        "device-id",
                        0x0CCB,
                        Buffer (One)
                        {
                             0x00
                        }
                    })
                }

                Method (H1EN, 1, Serialized)
                {
                    If (LLessEqual (Arg0, One))
                    {
                        If (LEqual (Arg0, One))
                        {
                            Or (GL04, 0x04, GL04)
                        }
                        Else
                        {
                            And (GL04, 0xFB, GL04)
                        }
                    }
                }

                Method (H1IL, 0, Serialized)
                {
                    ShiftRight (And (GL00, 0x02), One, Local0)
                    Return (Local0)
                }

                Method (H1IP, 1, Serialized)
                {
                    If (LLessEqual (Arg0, One))
                    {
                        Not (Arg0, Arg0)
                        Store (Arg0, GI01)
                    }
                }

                Name (H1IN, 0x11)
                Scope (\_GPE)
                {
                    Method (_L11, 0, NotSerialized)  // _Lxx: Level-Triggered GPE
                    {
                        Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80)
                    }
                }

                Method (P1IL, 0, Serialized)
                {
                    ShiftRight (And (GL00, 0x40), 0x06, Local0)
                    Return (Local0)
                }

                Method (P1IP, 1, Serialized)
                {
                    If (LLessEqual (Arg0, One))
                    {
                        Not (Arg0, Arg0)
                        Store (Arg0, GI06)
                    }
                }

                Name (P1IN, 0x16)
                Scope (\_GPE)
                {
                    Method (_L16, 0, NotSerialized)  // _Lxx: Level-Triggered GPE
                    {
                        Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80)
                    }
                }
            }

            Device (DVL0)
            {
                Name (_ADR, 0x57)  // _ADR: Address
                Name (_CID, "diagsvault")  // _CID: Compatible ID
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x03)
                        {
                            "address",
                            0x57,
                            Buffer (One)
                            {
                                 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (BLC0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Name (_CID, "smbus-blc")  // _CID: Compatible ID
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0E)
                        {
                            "refnum",
                            Zero,
                            "version",
                            0x02,
                            "fault-off",
                            0x03,
                            "fault-len",
                            0x04,
                            "skey",
                            0x4C445342,
                            "type",
                            0x49324300,
                            "smask",
                            0xFF
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0C)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "model",
                    Buffer (0x18)
                    {
                        "Intel X299 Series SMBus"
                    },

                    "name",
                    Buffer (0x21)
                    {
                        "System Management Bus Controller"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xA3, 0xA2, 0x00, 0x00
                    },

                    "device_type",
                    Buffer (0x0F)
                    {
                        "SMB Controller"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The SBUS PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification.


E.9.2.4) - LPCB - onboard Printed Circuit Board Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.LPCB, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.LPCB)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x06)
                {
                    "device-id",
                    Buffer (0x04)
                    {
                         0xD2, 0xA2, 0x00, 0x00                    
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                                      
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,d2a2"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The LPBC PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.HDEF" and PCI device implementations by means of IOREG.


E.9.2.5) - IMEI - onboard Intel Management Engine Interface (IMEI) Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.IMEI, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.IMEI)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0E)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "model",
                    Buffer (0x1E)
                    {
                        "Intel X299 Series Chipset MEI"
                    },

                    "name",
                    Buffer (0x22)
                    {
                        "Intel Management Engine Interface"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xBA, 0xA2, 0x00, 0x00                    
                    },

                    "device_type",
                    Buffer (0x10)
                    {
                        "IMEI-Controller"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                                      
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,d2a2"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The IMEI PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.IMEI" and PCI device implementations by means of IOREG.

E.9.2.6) - PMCR - onboard Power Management Controller (PMC) PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.PMCR, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.PMCR)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0E)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "model",
                    Buffer (0x1E)
                    {
                        "Intel X299 Series Chipset PMC"
                    },

                    "name",
                    Buffer (0x0A)
                    {
                        "Intel PMC"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xA1, 0xA2, 0x00, 0x00                    
                    },

                    "device_type",
                    Buffer (0x0F)
                    {
                        "PMC-Controller"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                                      
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,a1a2"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The PMCR PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.PMCR" and PCI device implementations by means of IOREG.

E.9.2.7) - XHCI - onboard Extended Host Controller Interface (XHCI) PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.XHCI, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.XHCI)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xAF, 0xA2, 0x00, 0x00
                    },

                    "name",
                    Buffer (0x34)
                    {
                        "ASMedia / Intel X299 Series Chipset XHCI Controller"
                    },

                    "model",
                    Buffer (0x34)
                    {
                        "ASMedia ASM1074 / Intel X299 Series Chipset USB 3.0"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The XHCI USB3.0 ASMedia ASM1074 / Intel X299 Series Chipset PCI device implementation is valid for the ASUS Prime X299 Deluxe and for all other X299 mainboards with the same XHC controller chipset. Verify and adopt/modify if necessary device path "PCI0.XHCI" and PCI device implementations by means of IOREG.

E.9.2.8) - XHC2,3,4 - ASMedia ASM3142 USB 3.1 Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.RP01.PXSX, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP01.XHC2, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP05.PXSX, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP05.XHC3, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP07.PXSX, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP07.XHC4, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Device (\_SB.PCI0.RP01.XHC2)
    {
        Name (_ADR, Zero)  // _ADR: Address
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03
                })
            }

            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x42, 0x21, 0x00, 0x00
                    },

                    "name",
                    Buffer (0x17)
                    {
                        "ASMedia XHC Controller"
                    },

                    "model",
                    Buffer (0x2F)
                    {
                        "ASMedia ASM3142 #1 1x USB 3.1 Type-C Internal "
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Name (_SB.PCI0.RP01.PXSX._STA, Zero)  // _STA: Status
    Device (\_SB.PCI0.RP05.XHC3)
    {
        Name (_ADR, Zero)  // _ADR: Address
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03
                })
            }

            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x42, 0x21, 0x00, 0x00
                    },

                    "name",
                    Buffer (0x17)
                    {
                        "ASMedia XHC Controller"
                    },

                    "model",
                    Buffer (0x2E)
                    {
                        "ASMedia ASM3142 #2 2x USB 3.1 Type-A External"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Name (_SB.PCI0.RP05.PXSX._STA, Zero)  // _STA: Status
    Device (\_SB.PCI0.RP07.XHC4)
    {
        Name (_ADR, Zero)  // _ADR: Address
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03
                })
            }

            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x42, 0x21, 0x00, 0x00
                    },

                    "name",
                    Buffer (0x17)
                    {
                        "ASMedia XHC Controller"
                    },

                    "model",
                    Buffer (0x4A)
                    {
                        "ASMedia ASM3142 #3 1x USB 3.1 Type-A / ASM1543 1x USB 3.1 Type-C External"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Name (_SB.PCI0.RP07.PXSX._STA, Zero)  // _STA: Status

The XHC2,XHC3,XHC4 ASMedia ASM3142/ASM1543 USB 3.1 onboard Intel XHCI controller PCI device implementation is valid for the ASUS Prime X299 Deluxe and for all other X299 mainboards with the same XHC USB3.1 controller ASMedia ASM3142 chipset configuration. Note that this SSDT-X299-iMacPro.aml device implementation also performs the following ACPI Replacements

PCI0.RP01.PXSX -> PCI0.RP01.XHC2
PCI0.RP05.PXSX -> PCI0.RP01.XHC3
PCI0.RP07.PXSX -> PCI0.RP01.XHC3

in concordance with the respective SMBIOS iMacPro1,1 variable naming. Verify and adopt/modify if necessary the corresponding "PCI0.RP01.XHC2", "PCI0.RP05.XHC3", "PCI0.RP07.XHC4" PCI device implementations by means of IOREG.

E.9.2.9) - ANS2 - Apple NVMe Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.RP09.PXSX, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP09.ANS2, DeviceObj)    // (from opcode)
PCI Device Implementation:

Code:
Device (\_SB.PCI0.RP09.ANS2)
    {
        Name (_ADR, Zero)  // _ADR: Address
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03
                })
            }

            Store (Package (0x08)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "name",
                    Buffer (0x14)
                    {
                        "AppleANS2Controller"
                    },

                    "model",
                    Buffer (0x12)
                    {
                        "Apple SSD AP1024M"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Name (_SB.PCI0.RP09.PXSX._STA, Zero)  // _STA: Status

The current ANS2 Apple NVMe Controller PCI implementation is of purely cosmetic nature and is valid for the ASUS Prime X299 Deluxe. Note that this SSDT-X299-iMacPro.aml device implementation also performs the following ACPI Replacement

PCI0.RP09.PXSX -> PCI0.RP09.ANS2

in concordance with the respective SMBIOS iMacPro1,1 variable naming.

Verify and adopt/modify if necessary the "PCI0.RP09.ANS2" PCI device implementations by means of IOREG.


E.9.2.10) - SAT1 - Intel AHCI SATA Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.SAT1, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.SAT1)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0C)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel AHCI Controller"
                    },

                    "model",
                    Buffer (0x1F)
                    {
                        "Intel X299 Series Chipset SATA"
                    },

                    "device_type",
                    Buffer (0x15)
                    {
                        "AHCI SATA Controller"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x82, 0xA2, 0x00, 0x00
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The SAT1 onboard Intel AHCI SATA controller PCI device implementation is valid for the ASUS Prime X299 Deluxe and for all other X299 mainboards with the same AHCI SATA controller chipset. Verify and adopt/modify if necessary device path "PCI0.SAT1" and PCI device implementations by means of IOREG.

E.9.2.11) - ETH0/ETH1 - onboard LAN Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.ETH0, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP02.ETH1, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.ETH0)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x10)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                                      
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel I219V2 Ethernet"
                    },

                    "model",
                    Buffer (0x2A)
                    {
                        "Intel I219V2 PCI Express Gigabit Ethernet"
                    },

                    "location",
                    Buffer (0x02)
                    {
                        "1"
                    },

                    "subsystem-id",
                    Buffer (0x04)
                    {
                         0x72, 0x86, 0x00, 0x00                    
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xB8, 0x15, 0x00, 0x00                    
                    },

                    "subsystem-vendor-id",
                    Buffer (0x04)
                    {
                         0x43, 0x10, 0x00, 0x00                    
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Scope (\_SB.PCI0.RP02.ETH1)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x10)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                                      
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel I211VA Ethernet"
                    },

                    "model",
                    Buffer (0x2A)
                    {
                        "Intel I211VA PCI Express Gigabit Ethernet"
                    },

                    "location",
                    Buffer (0x02)
                    {
                        "2"
                    },

                    "subsystem-id",
                    Buffer (0x04)
                    {
                         0xF0, 0x85, 0x00, 0x00                    
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x39, 0x15, 0x00, 0x00                    
                    },

                    "subsystem-vendor-id",
                    Buffer (0x04)
                    {
                         0x43, 0x10, 0x00, 0x00                    
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

Note that the XGBE/ETH1 Intel I219V2 PCI Express Gigabit Ethernet and Intel I211VA PCI Express Gigabit Ethernet onboard LAN controller PCI implementations are of pure cosmetic nature and only valid for ASUS Prime X299 Deluxe or X299 mainboards with the same LAN Controller configuration. Owners of different X299 mainboards have to verify and adopt/modify if necessary the device these PCI device implementations by means of IOREG.

E.9.2.12) - ARPT - OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PC03.BR3D.ARPT, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (_SB.PC03.BR3D.ARPT)
    {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0E)
                {
                    "built-in",
                    Buffer (One)
                    {
                         0x00
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xA0, 0x43, 0x00, 0x00
                    },

                    "AAPL,slot-name",
                    Buffer (0x07)
                    {
                        "Slot-3"
                    },

                    "device_type",
                    Buffer (0x13)
                    {
                        "AirPort Controller"
                    },

                    "model",
                    Buffer (0x4A)
                    {
                        "OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 Controller"
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci14e4,43a0"
                    },

                    "name",
                    Buffer (0x10)
                    {
                        "AirPort Extreme"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The ARPT OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI device implementation is of pure cosmetic nature and only valid for users of the latter WIFI/Bluetooth PCIe Adapter in PCIe Slot 3. Users of this PCIe Adapter within a PCIe slot population different from PCIe Slot 3 have to adapt/modify the respective device path "PC03.BR3D.ARPT" and likely also the respective ACPI DSDT Replacement Patch. Users of the Asus Prime X299 Deluxe onboard Bluetooth chipset controller or with a completely different WIFI/Bluetooth configuration have to either adopt the entire Airport PCI implementation by means of IOREG or can also skip the entire part.

E.9.2.13) - ThunderboltEX 3 Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PC01.BR1A, DeviceObj)    // (from opcode)
External (_SB_.PC01.BR1A.UPSB, DeviceObj)    // (from opcode)
External (UPSB, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (_SB.PC01.BR1A)
    {
        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
        {
            Return (Zero)
        }

        Scope (UPSB)
        {
            OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
            Field (PCIS, AnyAcc, NoLock, Preserve)
            {
                PVID,   16,
                PDID,   16
            }

            Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
            {
                Return (GPRW (0x69, 0x04))
            }

            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
            {
                Return (Zero)
            }

            Device (DSB0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (NHI0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Name (_STR, Unicode ("Thunderbolt"))  // _STR: Description String
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }

                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        Store (Package (0x0D)
                            {
                                "built-in",
                                Buffer (One)
                                {
                                     0x00
                                },

                                "device_type",
                                Buffer (0x19)
                                {
                                    "Thunderbolt 3 Controller"
                                },

                                "AAPL,slot-name",
                                Buffer (0x07)
                                {
                                    "Slot-4"
                                },

                                "model",
                                Buffer (0x30)
                                {
                                    "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 NHI"
                                },

                                "name",
                                Buffer (0x37)
                                {
                                    "ThunderboltEX 3 Intel DSL6540 Thunderbolt 3 Controller"
                                },

                                "power-save",
                                One,
                                Buffer (One)
                                {
                                     0x00
                                }
                            }, Local0)
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (DSB1)
            {
                Name (_ADR, 0x00010000)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS3)
                {
                    Name (_ADR, 0x00030000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS5)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS6)
                {
                    Name (_ADR, 0x00060000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (DSB2)
            {
                Name (_ADR, 0x00020000)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (XHC5)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }

                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        If (LEqual (Arg2, Zero))
                        {
                            Return (Buffer (One)
                            {
                                 0x03
                            })
                        }

                        Return (Package (0x19)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-4"
                            },

                            "model",
                            Buffer (0x41)
                            {
                                "ThunderboltEX 3 Texas Instruments TPS65982 USB 3.1 Type-A/Type-C"
                            },

                            "name",
                            Buffer (0x31)
                            {
                                "ThunderboltEX 3 Texas Instruments XHC Controller"
                            },

                            "AAPL,current-available",
                            0x0834,
                            "AAPL,current-extra",
                            0x0A8C,
                            "AAPL,current-in-sleep",
                            0x0A8C,
                            "AAPL,max-port-current-in-sleep",
                            0x0834,
                            "AAPL,device-internal",
                            Zero,
                            "AAPL,clock-id",
                            Buffer (One)
                            {
                                 0x01
                            },

                            "AAPL,root-hub-depth",
                            0x1A,
                            "AAPL,XHC-clock-id",
                            One,
                            Buffer (One)
                            {
                                 0x00
                            }
                        })
                    }
                }

                Name (_SB.PC01.BR1A.UPSB.DSB2.UPS0._STA, Zero)  // _STA: Status
                Device (UPS1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS3)
                {
                    Name (_ADR, 0x00030000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS5)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS6)
                {
                    Name (_ADR, 0x00060000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (DSB3)
            {
                Name (_ADR, 0x00040000)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS3)
                {
                    Name (_ADR, 0x00030000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS5)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS6)
                {
                    Name (_ADR, 0x00060000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x02)
                    {
                        "PCI-Thunderbolt",
                        One
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Method (DTGP, 5, NotSerialized)
    {
        If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b")))
        {
            If (LEqual (Arg1, One))
            {
                If (LEqual (Arg2, Zero))
                {
                    Store (Buffer (One)
                        {
                             0x03
                        }, Arg4)
                    Return (One)
                }

                If (LEqual (Arg2, One))
                {
                    Return (One)
                }
            }
        }

        Store (Buffer (One)
            {
                 0x00
            }, Arg4)
        Return (Zero)
    }
}

The ThunderboltEX 3 PCI device implementation (in my personal opinion by far the most sophisticated and most beautiful PCI device implementation performed by @afpelnico) is of pure cosmetic nature and only valid for users of the latter TB PCIe Adapter in PCIe Slot 4. Users of this PCIe Adapter within a PCIe slot population different from PCIe Slot 3 have to adapt/modify the respective path entires "PC01", "BR1A" and likely also the respective UPSB ACPI DSDT Replacement. Users of TB PCIe Adapters different from the ASUS TBEX 3 or users without any TB PCIe Adapter, have to either adopt the entire TB PCI implementation by means of IOREG or can simply skip the entire part.

Note that ThunderboltEX 3 PCI device implementation also performs the following ACPI Replacement:

PC01.BR1A.UPSB.DSB2.UPS0 -> PC01.BR1A.UPSB.DSB2.XHC5

in concordance with the respective SMBIOS iMacPro1,1 variable naming.

E.9.2.13) - DTGP Method:

Code:
Method (DTGP, 5, NotSerialized)
    {
        If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b")))
        {
            If (LEqual (Arg1, One))
            {
                If (LEqual (Arg2, Zero))
                {
                    Store (Buffer (One)
                        {
                             0x03
                        }, Arg4)
                    Return (One)
                }

                If (LEqual (Arg2, One))
                {
                    Return (One)
                }
            }
        }

        Store (Buffer (One)
            {
                 0x00
            }, Arg4)
        Return (Zero)
    }
}

The DTG Method Implementation is required for SSDT functionality and has not to be modified or adopted in any case.

After successfully implementing the ACPI DSDT Replacement Patches, SSDT-X299-iMacPro.aml and SSDT-XOSI.aml, my System possesses full sleep/wake functionality even with the ThunderboltEX 3 PCIe Adapter implemented.

Note that in addition I added the "darkwake=1" and "nv_spanmodepolicy=1" boot flags to my config.plist by means of Clover Configurator, Section "Boot", "Arguments". "nv_spanmodepolicy=1" can be unchecked by all AMD graphics card users.


E.10) System Overview CPU Cosmetics

As our Skylake-X CPU at present will not be properly recognised by OS X, Apple's System Overview ("About This Mac") reveals incomplete or simply wrong CPU details. Many times CPU's like the i9-7980XE are implemented as "unknown"...

View attachment 286632

I recently discovered on InsanelyMac a sophisticated fix of pure cosmetic nature developed by Shaneee (also thanks to fabiosun for pointing me to this direction), which allows to implement those CPU details you want to be implemented. For the sake of simplicity, I summarise the necessary steps once more below. Note that the following example is only valid for systems with English as main system language. If your system language is German, French, Spanish, Chinese etc., substitute "English.lproj" in the individual commands by the "lproj" of your System language! Thanks to @PedroJSkywalker for this latter important advice!

1.) Open a terminal and use the following commands:

Code:
cp /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings ~/Desktop/

Code:
sudo mv /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings-Backup

2.) Open "AppleSystemInfo.strings" on your Desktop with TextWrangler and change

Code:
<key>UnknownCPUKind</key>
<string>Unknown</string>

to what ever you want. In my case I choose:

Code:
<key>UnknownCPUKind</key>
<string>4,4 GHz 18-core 36-thread Skylake-X i9-7980XE</string>

Save "AppleSystemInfo.strings"

3.) Run the following terminal commands:

Code:
sudo codesign -f -s - ~/Desktop/AppleSystemInfo.strings

Code:
sudo cp ~/Desktop/AppleSystemInfo.strings /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/

and reboot your system.

4.) Open your config.plist with Clover Configurator and in Section "CPU" set "Type" to "Unknown". Save the config.plist and reboot.

5.) Apple's System Overview now will reveal the following details:

View attachment 286655


As fall back option enter the following terminal commands:

Code:
sudo rm /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings

Code:
sudo mv /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings-Backup /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.string

and reboot.

E.11) Logic-X and Audio Studio Software Functionality

The ASUS BIOS patching, providing full read/write access for the OSX Kernel to the MSR 0xE2 register, apparently also circumvents the Intel SKZ7 bug and yet missing BIOS microcode implementations. The Xnu CPU Power Management (XCPM) is now solely handled by the OSX Kernel, which completely resolves all former Logic-X or other studio audio software implementations. The same states for all other X299 mainboards with factory-default open MSR 0xE2 register implementation.

Nevertheless there is a second extremely important intrinsic LOGIC X configuration setting, which has to be adopted depending on the degree of sophistication of the studio audio hardware (Latency) in use.

In the following description, I will provide the correct audio preference settings for the ASUS Prime X299 with the onboard Realtek ALC S1220A audio chip:

1.) Within Logic X go to "Preferences" -> "Audio"

2.) Under Advanced check "Show Advanced Tools"

3.) Go back to the "Audio" settings and adopt "I/O Buffer Size" from "128" to e.g. "512" or even better "1024" Samples, in case you really use the onboard Realtek ALC S1220A audio chipset. Users of more sophisticated Studio Audio Hardware with better latencies have to adopt the I/O Buffer Size accordingly to their hardware implementation.

View attachment 305825

Now your Logic-X distribution should work absolutely flawless.

To check the now flawless functionality and performance of Logic-X, download, unzip and run the attached Logic-X test sample Test Hyperthreading Bug.logicx.zip of @DSM2 attached at the bottom of this originating post/guide. Note that the test sample sound volume output is zero, for avoiding epileptic or panic attacks at audience side... this is just a test sample to check the Logic-X functionality and performance and not a chart breaking audio sample.

Start Intel Power Gadget (IPG) in parallel and play the test sample with Logic-X:

View attachment 305828

You will rapidly notice that everything fully behaves as expected. All credits to @DSM2.


F.) Benchmarking

View attachment 294976


F.1) Sylake-X Intel I9-7980XE (4.8GHz) CPU Benchmarking

View attachment 294709

View attachment 307053

Geekbench CPU Benchmark:
  • Multi-Core Sore: 65.348
  • Single-Core Sore: 5.910
Cinebench Cpu Benchmark:
  • 4.618 CB
View attachment 307242

F.2) Gigabyte AORUS GTX 1080 Ti Waterforce EB 11GB Extreme Edition Benchmarking

View attachment 294977

Geekbench OpenGl and Metal2 Benchmarks:
  • OpenGL Sore: 229.965
  • Metal2 Sore: 242.393
View attachment 305079


G.) Summary and Conclusion:

Already during the individual macOS High Sierra 10.13 beta releases, Syklake-X/X299 systems reached full functionality together with flawless stability. Now it might be the right moment to follow my Desktop Guide and to unfold the unbelievable Skylake-X/X299 potential together with macOS High Sierra 10.13!

I am quite optimistic that high-end builds based on extremely novel Skylake-X/X299 technology will find manifold application, not only in science and research at universities or research institutions, engineering facilities, or medical labs, etc... Skylake-X processors with up to 18 cores (36 threads) and turbo frequencies up to 4.8 GHz will make make X299 to a "relatively cheap" but really serious alternative to the iMac Pro's and Mac Pro's. The principal intention of this desktop guide was to demonstrate, that we are able to build and configure fully functional and relatively "low-cost" high-end systems nowadays, which go far beyond of what Apple is able to offer at present or will be ever able to offer for some reasonable pricing. A Skylake-X/X299-System, that allows the use of all software-packages developed for MacOS, Unix, Linux or even Windows at the same time (e.g. think on Vine, Parallels, or a dual boot system configuration). The flexibility between different mainboards (Asus, Gigabyte, ASRock, MSI, etc.), different Skylake-X processors, and different RAM memory configurations (16-128GB) should make such system affordable for anybody (also home office, audio and video editing/production, etc.) and allow its perfect adaptation for the specific purpose, requirements and available budgets. It might not be necessary to outline, that current Skylake-X/X299 Systems perform absolutely stable on a 24/7/365 basis.

I am a scientist, expert in solar physics, space weather forecast and related telescope/instrument/space-mission development. In the frame of my scientific research, I developed parallelized image reconstruction, spectral line inversion and numerical modeling algorithms/applications, which require tremendous parallelized calculation power, RAM memory and storage capacities to reduce, analyze and interpret extensive and pioneering scientific ground-based or space-born observational data sets. This basically was also the professional motivation for my innovative Customac-Pro build iSPOR-S, the imaging Spectropolarimetric Parallel Organized Reconstruction Server running iSPOR-DP, the Imaging Spectropolarimetric Parallel Organized Reconstruction Data Pipeline software package for the GREGOR Fabry-Pérot Interferometer, located at the 1.5m GREGOR Solar Telescope (Europe's largest solar telescope) on Tenerife, Canary Islands, Spain. Anybody interested can find more details on my personal webpage.

View attachment 272069


Hi KGP

I have tried the guide for MacPro1 definition on EFI, EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip (including my kext) in BOOT USB on the MB Aorus Gaming 9 and when selecting to start "High Sierra" o "Install" remains blocked and restarts, without any verbose message (-v)

It's my first hackintosh and I'm a bit lost, but as I read iMacPro 1 is the first X299 implementation that Apple does, so it should adapt better to the MB X299 Hackintosh.

Do I have to make any more changes in the EFI that you attach for this MB?

Have you got to try it on that MB?

Thank you very much.
 
Could you upload the modified webpackage ? As I had trouble getting it to work. What size is it ?

Thanks
 
Hi KGP

I have tried the guide for MacPro1 definition on EFI, EFI-X299-10.13.2-SA-Release-iMacPro1,1-210118.zip (including my kext) in BOOT USB on the MB Aorus Gaming 9 and when selecting to start "High Sierra" o "Install" remains blocked and restarts, without any verbose message (-v)

It's my first hackintosh and I'm a bit lost, but as I read iMacPro 1 is the first X299 implementation that Apple does, so it should adapt better to the MB X299 Hackintosh.

Do I have to make any more changes in the EFI that you attach for this MB?

Have you got to try it on that MB?

Thank you very much.

Please kindly provide your Skylake-X/X299 system specs (mobo, CPU, GPU) in either your profile or signature. Many thanks in advance!

Did you adopt and implement VoodooTSCSync.kext in your EFI-Folder as indicated in my guide?

Cheers,

KGP
 
Nah it's just that I was still on 17C88 :), I've upgraded to 17C2120 and all is good now, I can see the 10.13.3 package in the appstore from which I can upgrade, and the standalone 10.13.3 installer also works as intended on APFS volume, no need of extra kexts.



Nah, there was no need to start from scratch, APFS was not the issue. The issue was that I was still on 17C88 and I thought I would upgrade from there.

So how did you upgrade to 17C2120? Is that a version of 10.13.2?
 
Could you upload the modified webpackage ? As I had trouble getting it to work. What size is it ?

Thanks

You do not have to reinstall the web driver. Just perform the steps indicated in post #4230.

Is it really so difficult to follow these indications?
 
So how did you upgrade to 17C2120? Is that a version of 10.13.2?

You need to follow kgp's guide. It's not that clear from his guide but you can upgrade from 17C88 to 17C2120 by creating the "Install High Sierra.app" for this build and then just launch the installer.

D.2) iMac Pro macOS High Sierra 10.13.2 (17C2120) Installer Package Creation

then

D.5) Direct iMac Pro conversions of a functional Skylake-X/X299 system with a SMBIOS System Definition different from iMacPro1,1 and a standard macOS build implementation

But ignore the "Proceed with Section D.3)" statement at the end of D.5 because that's a mistake.
 
So how did you upgrade to 17C2120? Is that a version of 10.13.2?

Please see section D.) of my guide in the originating post of this thread.. You will find all requested details and information..

Edit: already answered at the same time by user @Thireus above :). Thanks!
 
Status
Not open for further replies.
Back
Top