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[Guide] Gigabyte BRIX using Clover UEFI (GB-BXi5H-4200/GB-BXi5-4570R/GB-BXi7-4770R)

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[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

I did, but 'make install' failed on my Fusion drive reporting:

The guide does not use Fusion.
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

Note that your driversUEFI64 is not according to the guide...

Clover/kexts is wrong as well.

The CLOVER.ZIP you provide here shows DSL files in ACPI/patched.

Yes. Those things have been corrected. I don't need the FakePCIID kexts since I have Apple's WiFi/BT card in my BRIX.

LasVegas
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

Yes. Those things have been corrected. I don't need the FakePCIID kexts since I have Apple's WiFi/BT card in my BRIX.

LasVegas

Just saying... It is possible the extraneous EFI drivers you have in drivers64UEFI were causing your issue with OsxAptioFixDrv-64.efi.

As far as Clover/kexts, I was referring to other things not according to the guide... The FakePCIID kexts are not strictly called for [in Clover/kexts] by the guide anyway.

Glad you got it going on your hardware, but given the fact that you didn't really follow the guide, I won't attempt to make any changes to the guide text or project files.
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

Just saying... It is possible the extraneous EFI drivers you have in drivers64UEFI were causing your issue with OsxAptioFixDrv-64.efi.

You're right. Eliminating the extraneous drivers solved the OsxAptioFix issue.

Thanks again,

LasVegas
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

You're right. Eliminating the extraneous drivers solved the OsxAptioFix issue.

Thanks for testing/confirming.
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

I've completely reinstalled El Capitan (10.11.3), very carefully following your guide. As before, I still have problems with USB3. USB3 only works on port 1 (Front Top). The other 3 works fine with USB 2.0 devices, but USB 3.0 drives don't mount. Also USB 3.0 hubs only appear as USB 2.0. I've got screenshots of IORegistryExplorer's USB output with the same USB3 hub plugged into each port. Everything is plugged into that port so that none of the other ports appear in the shots. This hub has a built-in USB to SATA Bridge so that also appears in the port 1 (Front Top) shot.

I've also included the requested files...

Las Vegas
 

Attachments

  • Front Top USB.png
    Front Top USB.png
    148 KB · Views: 165
  • Front Bottom USB.png
    Front Bottom USB.png
    139 KB · Views: 165
  • Rear Top USB.png
    Rear Top USB.png
    130.2 KB · Views: 133
  • Rear Bottom USB.png
    Rear Bottom USB.png
    129.6 KB · Views: 130
  • RehabMan.zip
    28.7 KB · Views: 80
  • IORegistry Output.ioreg
    5.8 MB · Views: 155
  • kextstat Output.txt
    878 bytes · Views: 183
  • CLOVER.zip
    2.9 MB · Views: 111
  • kextcache output.txt
    951 bytes · Views: 370
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

I've completely reinstalled El Capitan (10.11.3), very carefully following your guide. As before, I still have problems with USB3. USB3 only works on port 1 (Front Top). The other 3 works fine with USB 2.0 devices, but USB 3.0 drives don't mount. Also USB 3.0 hubs only appear as USB 2.0. I've got screenshots of IORegistryExplorer's USB output with the same USB3 hub plugged into each port. Everything is plugged into that port so that none of the other ports appear in the shots. This hub has a built-in USB to SATA Bridge so that also appears in the port 1 (Front Top) shot.

I've also included the requested files...

Las Vegas

USB configuration is different than my BRIX. You have XHC 8086:8xxx (8c31), where my BRIX is 8086:9xxx. It requires a different USB setup.

Also the port assignments are different, so I can't just copy the 8xxx config to 9xxx config... (on my BRIX, bluetooth is on HS07, where yours is HS09).

Currently, you have a non-custom config for USBInjectAll.kext so it is injecting all ports. This puts you past the 15-port limit.

Here's how to proceed:
- remove SSDT-USB.aml (not strictly necessary, but it will tell us if anything is connected to EH01)
- add the port limit patch to your config.plist (copy/paste from config_patches.plist from USBInjectAll repo)
- reboot
- now all ports will likely work (both USB2 and USB3 speeds)

To customize/optimize:
- run IORegistryExplorer
- while it is running, plug both USB2 and USB3 device into each port
- the resulting ioreg can be saved, it will show all ports used (USB2 on HSxx, USB3 on SSPx)
- if you want to be complete and detailed, watch ioreg as you plug devices in and note the association between ports in ioreg and physical port location
- from the list of ports, we can create a custom configuration in SSDT-USB.dsl for BRIX XHC 9xxx, just as I did for BRIX XHC 8xxx

github is down, so USBInjectAll repo at bitbucket: https://bitbucket.org/RehabMan/os-x-usb-inject-all

From the ioreg you have, nothing on EH02, and I don't expect anything to appear on EH01, so likely we can disable both ECHI controllers. On my BRIX only EH01 was enabled, so I only disabled it... and didn't need to touch EH02.
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

...
- from the list of ports, we can create a custom configuration in SSDT-USB.dsl for BRIX XHC 9xxx, just as I did for BRIX XHC 8xxx

I'm guessing it will look something like this:
Code:
            // XHC overrides (8086:8xxx)
            "8086_8xxx", Package()
            {
                //"port-count", Buffer() { 0x0d, 0, 0, 0},
                "ports", Package()
                {
                    "HS01", Package() // HS USB3 front top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x01, 0, 0, 0 },
                    },
                    "HS02", Package() // HS USB3 front bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x02, 0, 0, 0 },
                    },
                    "HS03", Package() // HS USB3 rear top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x03, 0, 0, 0 },
                    },
                    "HS04", Package() // HS USB3 rear bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x04, 0, 0, 0 },
                    },
                    "HS09", Package() // bluetooth
                    {
                        "UsbConnector", 255,
                        "port", Buffer() { 0x09, 0, 0, 0 },
                    },
                    "SS01", Package() // SS USB3 front top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x10, 0, 0, 0 },
                    },
                    "SS02", Package() // SS USB3 front bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x11, 0, 0, 0 },
                    },
                    "SS03", Package() // SS USB3 rear top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x12, 0, 0, 0 },
                    },
                    "SS04", Package() // SS USB3 rear bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x13, 0, 0, 0 },
                    },
                },
            },
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

Thanks RehabMan!

Your guess was just about right on! It worked out to:

Code:
            // XHC overrides (8086:8xxx)
            "8086_8xxx", Package()
            {
                //"port-count", Buffer() { 0x0d, 0, 0, 0},
                "ports", Package()
                {
                    "HS01", Package() // HS USB3 front top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x01, 0, 0, 0 },
                    },
                    "HS02", Package() // HS USB3 front bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x02, 0, 0, 0 },
                    },
                    "HS03", Package() // HS USB3 rear top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x03, 0, 0, 0 },
                    },
                    "HS04", Package() // HS USB3 rear bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x04, 0, 0, 0 },
                    },
                    "HS09", Package() // bluetooth
                    {
                        "UsbConnector", 255,
                        "port", Buffer() { 0x09, 0, 0, 0 },
                    },
                    "SS01", Package() // SS USB3 front top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0a, 0, 0, 0 },
                    },
                    "SS02", Package() // SS USB3 front bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0b, 0, 0, 0 },
                    },
                    "SS03", Package() // SS USB3 rear top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0c, 0, 0, 0 },
                    },
                    "SS04", Package() // SS USB3 rear bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0d, 0, 0, 0 },
                    },
                },
            },

I couldn't figure out how to disable EH02 like you did for EH01, but it doesn't get in the way of anything.

Thanks again!

LasVegas
 
[Guide] Gigabyte BRIX-s using Clover UEFI (GB-BXi5H-4200)

Thanks RehabMan!

Your guess was just about right on! It worked out to:

Code:
            // XHC overrides (8086:8xxx)
            "8086_8xxx", Package()
            {
                //"port-count", Buffer() { 0x0d, 0, 0, 0},
                "ports", Package()
                {
                    "HS01", Package() // HS USB3 front top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x01, 0, 0, 0 },
                    },
                    "HS02", Package() // HS USB3 front bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x02, 0, 0, 0 },
                    },
                    "HS03", Package() // HS USB3 rear top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x03, 0, 0, 0 },
                    },
                    "HS04", Package() // HS USB3 rear bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x04, 0, 0, 0 },
                    },
                    "HS09", Package() // bluetooth
                    {
                        "UsbConnector", 255,
                        "port", Buffer() { 0x09, 0, 0, 0 },
                    },
                    "SS01", Package() // SS USB3 front top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0a, 0, 0, 0 },
                    },
                    "SS02", Package() // SS USB3 front bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0b, 0, 0, 0 },
                    },
                    "SS03", Package() // SS USB3 rear top
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0c, 0, 0, 0 },
                    },
                    "SS04", Package() // SS USB3 rear bottom
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 0x0d, 0, 0, 0 },
                    },
                },
            },

Please post ioreg. The port address assignments don't make sense for that XHC device-id.

They also don't match your IOACPIPlane. I suspect USB3 devices will not work at USB3 speeds with that configuration.

My original configuration is correct, I think...

I couldn't figure out how to disable EH02 like you did for EH01, but it doesn't get in the way of anything.

Yes... it is a little tricky and requires knowledge of the chipset spec.

I have it here and will update it when I update the SSDT-USB...

Note: I went ahead and committed what I believe to be the correct configuration.
 
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