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x1 carbon 2015 usbinject 10.13.2

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FakePCIID_XHCIMux.kext is needed if you plan to use the EHCI controller (as you are currently).
The alternate setup is to disable the EHCI controller such that everything is on XHC.
Both are covered in my USBInjectAll guide.

Benefits of having EHCI controller disabled?

I have a problem with the sleep:

Apple and sleep works fine

Lid close dont work, i aply _pwr lid patch but continue wake ...

Thanks for you help
 
Benefits of having EHCI controller disabled?

More like a real Apple laptops. Apple laptops Haswell and later tend to use xHCI only.

Lid close dont work, i aply _pwr lid patch but continue wake ...

Keep in mind assertions must be clear (check with 'pmset -g assertions').
And keep in mind 15-20 sec delay.
 
More like a real Apple laptops. Apple laptops Haswell and later tend to use xHCI only.


I trying to disable EHCI.

This is my new ssdt usb, when I use usb pen give me power error...

Code:
/*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20171110 (64-bit version)(RM)
 * Copyright (c) 2000 - 2017 Intel Corporation
 *
 * Disassembling to non-symbolic legacy ASL operators
 *
 * Disassembly of iASLRilh3N.aml, Thu Jan 11 14:38:09 2018
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000023D (573)
 *     Revision         0x02
 *     Checksum         0xF7
 *     OEM ID           "hack"
 *     OEM Table ID     "UIAC-ALL"
 *     OEM Revision     0x00000000 (0)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20171110 (538382608)
 */
DefinitionBlock ("", "SSDT", 2, "hack", "UIAC-ALL", 0x00000000)
{
    External (_SB_.PCI0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.EH01, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.LPCB, DeviceObj)    // (from opcode)

    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x06)
        {
            "8086_9cb1",
            Package (0x04)
            {
                "port-count",
                Buffer (0x04)
                {
                     0x0F, 0x00, 0x00, 0x00                       
                },

                "ports",
                Package (0x0C)
                {
                    "HS01",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0xFF, 0x00, 0x00, 0x00                       
                        }
                    },

                    "HS02",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x02, 0x00, 0x00, 0x00                       
                        }
                    },

                    "HS07",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0xFF,
                        "port",
                        Buffer (0x04)
                        {
                             0x07, 0x00, 0x00, 0x00                       
                        }
                    },

                    "HS08",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0xFF,
                        "port",
                        Buffer (0x04)
                        {
                             0x08, 0x00, 0x00, 0x00                       
                        }
                    },

                    "SSP1",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x0C, 0x00, 0x00, 0x00                       
                        }
                    },

                    "SSP2",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x0D, 0x00, 0x00, 0x00                       
                        }
                    }
                }
            }
        })
    }

    Scope (_SB.PCI0)
    {
        Scope (EH01)
        {
            OperationRegion (PSTS, PCI_Config, 0x54, 0x02)
            Field (PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE,   2
            }
        }

        Scope (LPCB)
        {
            OperationRegion (RMLP, PCI_Config, 0xF0, 0x04)
            Field (RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1,   32
            }

            OperationRegion (FDM1, SystemMemory, Add (And (RCB1, 0xFFFFFFFFFFFFC000), 0x3418), 0x04)
            Field (FDM1, DWordAcc, NoLock, Preserve)
            {
                    ,   15,
                FDE1,   1
            }
        }

        Device (RMD1)
        {
            Name (_HID, "RMD10000")  // _HID: Hardware ID
            Method (_INI, 0, NotSerialized)  // _INI: Initialize
            {
                Store (0x03, ^^EH01.PSTE)
                Store (One, ^^LPCB.FDE1)
            }
        }
    }
}

xhc2.png


What I are doing wrong?

XHC:
HS01= USB 2.0 left
HS02= USB 2.0 Right
HS07= bluethooh
HS08=Camera
SSP1= USB 3.0 Left
SSP2= USB3.0 Right

Camara and bluethooh works fine. Usb pen 2.0 and 3.0 give me power error...


Keep in mind assertions must be clear (check with 'pmset -g assertions').
And keep in mind 15-20 sec delay.


Code:
Last login: Thu Jan 11 09:21:47 on console
MacBook-Air-de-Gines:~ ginespriede$ pmset -g assertions
2018-01-11 09:24:54 +0100
Assertion status system-wide:
   BackgroundTask                 0
   ApplePushServiceTask           0
   UserIsActive                   1
   PreventUserIdleDisplaySleep    0
   PreventSystemSleep             0
   ExternalMedia                  0
   PreventUserIdleSystemSleep     0
   NetworkClientActive            0
Listed by owning process:
   pid 99(hidd): [0x0000000800098039] 00:00:00 UserIsActive named: "com.apple.iohideventsystem.queue.tickle.4294967979.3"
    Timeout will fire in 120 secs Action=TimeoutActionRelease
Kernel Assertions: 0x4=USB
   id=501  level=255 0x4=USB mod=01/01/1970, 01:00 description=com.apple.usb.externaldevice.14800000 owner=Integrated Camera
Idle sleep preventers: IODisplayWrangler

Are correct?
 

Attachments

  • debug_14487.zip
    1.3 MB · Views: 69
Last edited:
I trying to disable EHCI.

This is my new ssdt usb, when I use usb pen give me power error...

Code:
/*
 * Intel ACPI Component Architecture
 * AML/ASL+ Disassembler version 20171110 (64-bit version)(RM)
 * Copyright (c) 2000 - 2017 Intel Corporation
 *
 * Disassembling to non-symbolic legacy ASL operators
 *
 * Disassembly of iASLRilh3N.aml, Thu Jan 11 14:38:09 2018
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000023D (573)
 *     Revision         0x02
 *     Checksum         0xF7
 *     OEM ID           "hack"
 *     OEM Table ID     "UIAC-ALL"
 *     OEM Revision     0x00000000 (0)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20171110 (538382608)
 */
DefinitionBlock ("", "SSDT", 2, "hack", "UIAC-ALL", 0x00000000)
{
    External (_SB_.PCI0, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.EH01, DeviceObj)    // (from opcode)
    External (_SB_.PCI0.LPCB, DeviceObj)    // (from opcode)

    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x06)
        {
            "8086_9cb1",
            Package (0x04)
            {
                "port-count",
                Buffer (0x04)
                {
                     0x0F, 0x00, 0x00, 0x00                     
                },

                "ports",
                Package (0x0C)
                {
                    "HS01",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0xFF, 0x00, 0x00, 0x00                     
                        }
                    },

                    "HS02",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x02, 0x00, 0x00, 0x00                     
                        }
                    },

                    "HS07",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0xFF,
                        "port",
                        Buffer (0x04)
                        {
                             0x07, 0x00, 0x00, 0x00                     
                        }
                    },

                    "HS08",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0xFF,
                        "port",
                        Buffer (0x04)
                        {
                             0x08, 0x00, 0x00, 0x00                     
                        }
                    },

                    "SSP1",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x0C, 0x00, 0x00, 0x00                     
                        }
                    },

                    "SSP2",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,
                        "port",
                        Buffer (0x04)
                        {
                             0x0D, 0x00, 0x00, 0x00                     
                        }
                    }
                }
            }
        })
    }

    Scope (_SB.PCI0)
    {
        Scope (EH01)
        {
            OperationRegion (PSTS, PCI_Config, 0x54, 0x02)
            Field (PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE,   2
            }
        }

        Scope (LPCB)
        {
            OperationRegion (RMLP, PCI_Config, 0xF0, 0x04)
            Field (RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1,   32
            }

            OperationRegion (FDM1, SystemMemory, Add (And (RCB1, 0xFFFFFFFFFFFFC000), 0x3418), 0x04)
            Field (FDM1, DWordAcc, NoLock, Preserve)
            {
                    ,   15,
                FDE1,   1
            }
        }

        Device (RMD1)
        {
            Name (_HID, "RMD10000")  // _HID: Hardware ID
            Method (_INI, 0, NotSerialized)  // _INI: Initialize
            {
                Store (0x03, ^^EH01.PSTE)
                Store (One, ^^LPCB.FDE1)
            }
        }
    }
}

xhc2.png


What I are doing wrong?

XHC:
HS01= USB 2.0 left
HS02= USB 2.0 Right
HS07= bluethooh
HS08=Camera
SSP1= USB 3.0 Left
SSP2= USB3.0 Right

Camara and bluethooh works fine. Usb pen 2.0 and 3.0 give me power error...





Code:
Last login: Thu Jan 11 09:21:47 on console
MacBook-Air-de-Gines:~ ginespriede$ pmset -g assertions
2018-01-11 09:24:54 +0100
Assertion status system-wide:
   BackgroundTask                 0
   ApplePushServiceTask           0
   UserIsActive                   1
   PreventUserIdleDisplaySleep    0
   PreventSystemSleep             0
   ExternalMedia                  0
   PreventUserIdleSystemSleep     0
   NetworkClientActive            0
Listed by owning process:
   pid 99(hidd): [0x0000000800098039] 00:00:00 UserIsActive named: "com.apple.iohideventsystem.queue.tickle.4294967979.3"
    Timeout will fire in 120 secs Action=TimeoutActionRelease
Kernel Assertions: 0x4=USB
   id=501  level=255 0x4=USB mod=01/01/1970, 01:00 description=com.apple.usb.externaldevice.14800000 owner=Integrated Camera
Idle sleep preventers: IODisplayWrangler

Are correct?

Your ioreg shows more than the ports you mention (on XHC) enabled.
The package size you have here is wrong:
Code:
                "ports",
                Package (0x0C)
                {

Just as SSDT-UIAC-ALL.dsl is coded, do not specify package sizes (because you'll likely get it wrong).
The compiler will calculate the correct value when the package size is unspecified.

Also, your LPC device is named 'LPC', but you have coded (incorrectly) LPCB in your SSDT-USB-Test.aml. As a result, EH01 is not disabled, and likely the entire SSDT is ignored.

You need to pay attention to details.
 
Your ioreg shows more than the ports you mention (on XHC) enabled.
The package size you have here is wrong:
Code:
                "ports",
                Package (0x0C)
                {

Just as SSDT-UIAC-ALL.dsl is coded, do not specify package sizes (because you'll likely get it wrong).
The compiler will calculate the correct value when the package size is unspecified.

Also, your LPC device is named 'LPC', but you have coded (incorrectly) LPCB in your SSDT-USB-Test.aml. As a result, EH01 is not disabled, and likely the entire SSDT is ignored.

You need to pay attention to details.

The size of the package was calculated by maciasl...I leave it blank "ports",


Package ()
{

If I rename lpcb to lpc it gives me an error in the compilation...solution?

I have read the guide but I do not know how to deactivate EHCi
 
The size of the package was calculated by maciasl...I leave it blank "ports",


Package ()
{

If I rename lpcb to lpc it gives me an error in the compilation...solution?

I have read the guide but I do not know how to deactivate EHCi

I changed all three LPCB->LPC, and no compilation error. You must have missed one.
 
I changed all three LPCB->LPC, and no compilation error. You must have missed one.

Code:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20171110 (64-bit version)(RM)
* Copyright (c) 2000 - 2017 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASLAUaiP9.aml, Thu Jan 11 11:50:01 2018
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x00000443 (1091)
*     Revision         0x02
*     Checksum         0xA0
*     OEM ID           "hack"
*     OEM Table ID     "UIAC-ALL"
*     OEM Revision     0x00000000 (0)
*     Compiler ID      "INTL"
*     Compiler Version 0x20171110 (538382608)
*/
DefinitionBlock ("", "SSDT", 2, "hack", "UIAC-ALL", 0x00000000)
{
    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x06)
        {
          "AppleBusPowerControllerUSB",
            Package (0x08)
            {
                "kUSBSleepPortCurrentLimit",
                0x0834,
                "kUSBSleepPowerSupply",
                0x0A28,
                "kUSBWakePortCurrentLimit",
                0x0834,
                "kUSBWakePowerSupply",
                0x0C80
            },
              "8086_9cb1", Package()
            {
                "port-count", Buffer() { 15, 0, 0, 0 },
                "ports", Package()
                {
                      "HS01", Package()
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 1, 0, 0, 0 },
                    },
                    "HS02", Package()
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 2, 0, 0, 0 },
                    },
                
                    "HS08", Package() //camara
                    {
                        "UsbConnector", 255,
                        "port", Buffer() { 8, 0, 0, 0 },
                    },
              
                    "SSP1", Package() //usb 3.0 right
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 12, 0, 0, 0 },
                    },
                    "SSP2", Package() //usb3.0 left
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 13, 0, 0, 0 },
                    },
                 
                },
            },          
        })
    }

//
// Disabling EHCI #1
//
    External(_SB.PCI0, DeviceObj)
    External(_SB.PCI0.LPC, DeviceObj)
    External(_SB.PCI0.EH01, DeviceObj)
    Scope(_SB.PCI0)
    {
        // registers needed for disabling EHC#1
        Scope(EH01)
        {
            OperationRegion(PSTS, PCI_Config, 0x54, 2)
            Field(PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE, 2  // bits 2:0 are power state
            }
        }
        Scope(LPC)
        {
            OperationRegion(RMLP, PCI_Config, 0xF0, 4)
            Field(RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1, 32, // Root Complex Base Address
            }
            // address is in bits 31:14
            OperationRegion(FDM1, SystemMemory, Add(And(RCB1,Not(Subtract(ShiftLeft(1,14),1))),0x3418), 4)
            Field(FDM1, DWordAcc, NoLock, Preserve)
            {
                ,15,    // skip first 15 bits
                FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
            }
        }
        Device(RMD1)
        {
            //Name(_ADR, 0)
            Name(_HID, "RMD10000")
            Method(_INI)
            {
                // disable EHCI#1
                // put EHCI#1 in D3hot (sleep mode)
                Store(3, ^^EH01.PSTE)
                // disable EHCI#1 PCI space
                Store(1, ^^LPC.FDE1)
            }
        }
    }
}
//EOF

Ok solved, attached problem reporting for you ok... I think all work 100%

My last problem its lid sleep, suggestions?


Thanks for you amazing work!
 

Attachments

  • debug_14231.zip
    1.4 MB · Views: 71
Code:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20171110 (64-bit version)(RM)
* Copyright (c) 2000 - 2017 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASLAUaiP9.aml, Thu Jan 11 11:50:01 2018
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x00000443 (1091)
*     Revision         0x02
*     Checksum         0xA0
*     OEM ID           "hack"
*     OEM Table ID     "UIAC-ALL"
*     OEM Revision     0x00000000 (0)
*     Compiler ID      "INTL"
*     Compiler Version 0x20171110 (538382608)
*/
DefinitionBlock ("", "SSDT", 2, "hack", "UIAC-ALL", 0x00000000)
{
    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x06)
        {
          "AppleBusPowerControllerUSB",
            Package (0x08)
            {
                "kUSBSleepPortCurrentLimit",
                0x0834,
                "kUSBSleepPowerSupply",
                0x0A28,
                "kUSBWakePortCurrentLimit",
                0x0834,
                "kUSBWakePowerSupply",
                0x0C80
            },
              "8086_9cb1", Package()
            {
                "port-count", Buffer() { 15, 0, 0, 0 },
                "ports", Package()
                {
                      "HS01", Package()
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 1, 0, 0, 0 },
                    },
                    "HS02", Package()
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 2, 0, 0, 0 },
                    },
               
                    "HS08", Package() //camara
                    {
                        "UsbConnector", 255,
                        "port", Buffer() { 8, 0, 0, 0 },
                    },
             
                    "SSP1", Package() //usb 3.0 right
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 12, 0, 0, 0 },
                    },
                    "SSP2", Package() //usb3.0 left
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 13, 0, 0, 0 },
                    },
                
                },
            },         
        })
    }

//
// Disabling EHCI #1
//
    External(_SB.PCI0, DeviceObj)
    External(_SB.PCI0.LPC, DeviceObj)
    External(_SB.PCI0.EH01, DeviceObj)
    Scope(_SB.PCI0)
    {
        // registers needed for disabling EHC#1
        Scope(EH01)
        {
            OperationRegion(PSTS, PCI_Config, 0x54, 2)
            Field(PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE, 2  // bits 2:0 are power state
            }
        }
        Scope(LPC)
        {
            OperationRegion(RMLP, PCI_Config, 0xF0, 4)
            Field(RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1, 32, // Root Complex Base Address
            }
            // address is in bits 31:14
            OperationRegion(FDM1, SystemMemory, Add(And(RCB1,Not(Subtract(ShiftLeft(1,14),1))),0x3418), 4)
            Field(FDM1, DWordAcc, NoLock, Preserve)
            {
                ,15,    // skip first 15 bits
                FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
            }
        }
        Device(RMD1)
        {
            //Name(_ADR, 0)
            Name(_HID, "RMD10000")
            Method(_INI)
            {
                // disable EHCI#1
                // put EHCI#1 in D3hot (sleep mode)
                Store(3, ^^EH01.PSTE)
                // disable EHCI#1 PCI space
                Store(1, ^^LPC.FDE1)
            }
        }
    }
}
//EOF

Ok solved, attached problem reporting for you ok... I think all work 100%

My last problem its lid sleep, suggestions?


Thanks for you amazing work!

Your SSDT-USB-Test.aml is still ineffective (obvious if you look at ioreg).
Again you have wrong package size... example:
Code:
        Name (RMCF, Package (0x06)
        {

Actual package size there is 2.
You really need to read post #25.
Leave all package sizes unspecified, and let the compiler calculate them for you (it doesn't make mistakes).
 
Your SSDT-USB-Test.aml is still ineffective (obvious if you look at ioreg).
Again you have wrong package size... example:
Code:
        Name (RMCF, Package (0x06)
        {

Actual package size there is 2.
You really need to read post #25.
Leave all package sizes unspecified, and let the compiler calculate them for you (it doesn't make mistakes).
Last compile

Code:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20171110 (64-bit version)(RM)
* Copyright (c) 2000 - 2017 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASLAUaiP9.aml, Thu Jan 11 11:50:01 2018
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x00000443 (1091)
*     Revision         0x02
*     Checksum         0xA0
*     OEM ID           "hack"
*     OEM Table ID     "UIAC-ALL"
*     OEM Revision     0x00000000 (0)
*     Compiler ID      "INTL"
*     Compiler Version 0x20171110 (538382608)
*/
DefinitionBlock ("", "SSDT", 2, "hack", "UIAC-ALL", 0x00000000)
{
    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package ()
        {    "AppleBusPowerControllerUSB",
            Package ()
            {
                "kUSBSleepPortCurrentLimit",
                0x0834,
                "kUSBSleepPowerSupply",
                0x0A28,
                "kUSBWakePortCurrentLimit",
                0x0834,
                "kUSBWakePowerSupply",
                0x0C80
            },
              "8086_9cb1", Package()
            {
                "port-count", Buffer() { 15, 0, 0, 0 },
                "ports", Package()
                {
                      "HS01", Package()
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 1, 0, 0, 0 },
                    },
                    "HS02", Package()
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 2, 0, 0, 0 },
                    },
                  
                       "HS07",
                    Package ()
                    {
                        "UsbConnector",
                        255,
                        "port",
                        Buffer (0x04)
                        {
                             0x07, 0x00, 0x00, 0x00                       
                        }
                    },
                
                    "HS08", Package() //camara
                    {
                        "UsbConnector", 255,
                        "port", Buffer() { 8, 0, 0, 0 },
                    },
              
                    "SSP1", Package() //usb 3.0 right
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 12, 0, 0, 0 },
                    },
                    "SSP2", Package() //usb3.0 left
                    {
                        "UsbConnector", 3,
                        "port", Buffer() { 13, 0, 0, 0 },
                    },
                 
                },
            },          
        })
    }

//
// Disabling EHCI #1
//
    External(_SB.PCI0, DeviceObj)
    External(_SB.PCI0.LPC, DeviceObj)
    External(_SB.PCI0.EH01, DeviceObj)
    Scope(_SB.PCI0)
    {
        // registers needed for disabling EHC#1
        Scope(EH01)
        {
            OperationRegion(PSTS, PCI_Config, 0x54, 2)
            Field(PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE, 2  // bits 2:0 are power state
            }
        }
        Scope(LPC)
        {
            OperationRegion(RMLP, PCI_Config, 0xF0, 4)
            Field(RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1, 32, // Root Complex Base Address
            }
            // address is in bits 31:14
            OperationRegion(FDM1, SystemMemory, Add(And(RCB1,Not(Subtract(ShiftLeft(1,14),1))),0x3418), 4)
            Field(FDM1, DWordAcc, NoLock, Preserve)
            {
                ,15,    // skip first 15 bits
                FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
            }
        }
        Device(RMD1)
        {
            //Name(_ADR, 0)
            Name(_HID, "RMD10000")
            Method(_INI)
            {
                // disable EHCI#1
                // put EHCI#1 in D3hot (sleep mode)
                Store(3, ^^EH01.PSTE)
                // disable EHCI#1 PCI space
                Store(1, ^^LPC.FDE1)
            }
        }
    }
}
//EOF

Lid not working
 

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