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Anyone else has only x12 and x26 speedsteps for cpu freq

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Here are my ioreg and ssdt

That's neat, but I didn't ask you for it...

But it does not appear that X86PlatformPlugin is loading... Wonder why...??

Download patchmatic: https://github.com/RehabMan/OS-X-MaciASL-patchmatic. Install it to /usr/bin.

In terminal,
Code:
cd ~/Downloads/RehabMan
patchmatic -extract

Post contents of Downloads/RehabMan directory (as ZIP).

Also, post ioreg: http://www.tonymacx86.com/audio/58368-guide-how-make-copy-ioreg.html. Please, use the IORegistryExplorer v2.1 attached to the post! DO NOT reply with an ioreg from any other version of IORegistryExplorer.app.

And output from:
Code:
kextstat|grep -y acpiplat
kextstat|grep -y appleintelcpu
 
It's strange that plugin-type in SSDT.aml is not injected into CPU0. Here are all files you required:

EDIT: I found the bug in _PR and _SB, will contact Piker soon.
 

Attachments

  • CPUDebug.zip
    423.5 KB · Views: 69
It's strange that plugin-type in SSDT.aml is not injected into CPU0. Here are all files you required:

EDIT: I found the bug in _PR and _SB, will contact Piker soon.

Yes, mine works. I haven't regenerated my SSDT in a while...

Mine is inserted into the correct scope (\_PR, due to CPU objects being there in DSDT).

One other difference is that my SSDT has the "extra" pstate at the top (max+1), where yours does not. My top state is 33 (CPU limit is 32), where your top state is also 33 (but your CPU limit is 33).
 
Yes, mine works. I haven't regenerated my SSDT in a while...

Mine is inserted into the correct scope (\_PR, due to CPU objects being there in DSDT).

One other difference is that my SSDT has the "extra" pstate at the top (max+1), where yours does not. My top state is 33 (CPU limit is 32), where your top state is also 33 (but your CPU limit is 33).

The ssdt generator script does not add "extra" states by default (mode 0). I have to set it to include both steps at the bottom and top in PBI CE (mode 3).

EDIT: Will be fixed temporarily (hard code _PR) in next version of PBI CE.
 
The ssdt generator script does not add "extra" states by default (mode 0). I have to set it to include both steps at the bottom and top in PBI CE (mode 3).

I'm not sure top & bottom is such a good idea... Make sure you test that. Still running here with just the one extra state at the top, no extra at the bottom. Reaching x12 just fine. Yours is generated with mode 0.

It used to be that mode 1 was chosen automatically for Ivy+.
 
There is nothing wrong with the latest version 13.9, at least on my ProBook. Just generated two SSDTs, one with patched DSDT, one with vanilla one and tested them both. I get more that I can count power states with both of them.

Edit: wopsie, that's the result with the version I currently have in the PBI code base, I've changed some of the settings like the Ivy workaround that I've set to 3 by default.

@nguyenmac: the version in the PBI code base is slightly different that vanilla one. Here's the changes I make before putting it in:

line 227: let gIvyWorkAround=3
line 232: let gAutoCopy=0
line 260: let gCallOpen=0
line 266: let gDebug=0
line 352: gPath=.
line 2966 to 2995: all content between these two is replaced by iasl=./iaslpbi

I've attached both SSDTs.
 

Attachments

  • SSDTs.zip
    1.3 KB · Views: 66
Ok so basically there is a bug with the ssdt generated from PBI CE ? So for now I should just use the flags until next PBI CE release?
 
Ok so basically there is a bug with the ssdt generated from PBI CE ? So for now I should just use the flags until next PBI CE release?

Ok, here's what you can try: download the latest script and generate a new SSDT using the following:

Code:
./ssdtPRGen.sh -c 1 -d 0 -w 3

then test it and tell us if it works for you.
 
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