I have fixed the rename mistake and make some changes on EC patch. Moreover, I also added 2 methods for write buffers, but I am not sure if it is appropriate because they are not showing on the static patch. However, my understanding is read/write buffers should be in pair. Please correct me if this is not the case. Kindly advise if any fix &/or enhancement is required. Thanks....
Forgot to update the status of bluetooth. After change the product id and vendor id on Brmpatch2ram.kext, it was detected, but could not find and bluetooth device. Tried 2 different versions with same chip, but still have no luck for pairing.
How about the write buffer on EC? Is it necessary?As far as a battery status, from ioreg you can see that _BIF is failing.
Bluetooth is off-topic.
How about the write buffer on EC? Is it necessary?
I am referring WE1B and WECB that are not found on the static patch diffs, and I find that it is hardly found a hotpatch set up only have RE1B and RECB. That is why I added them in. If there no effect, I will remove it.I assume you're referring to WECB (and RECB).
It all depends on whether you need those methods to accomplish your patched battery methods.
You should know by looking at the static patch diffs.
Note: Patch you have for "change ECOR to XCOR" is wrong, unnecessary, misguided. No idea why you're doing that...
I am referring WE1B and WECB that are not found on the static patch diffs,
Method (_OFF, 0, Serialized) // _OFF: Power Off
{
If (LEqual (CTXT, Zero))
{
If (LNotEqual (GPRF, One))
{
Store (VGAR, VGAB)
}
Store (One, CTXT)
}
HGOF ()
}
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
Store (Zero, \_SB.PCI0.RP01.PEGP._ADR)
}
Method (HGOF, 0, Serialized)
{
If (LNotEqual (SGGP, One))
{
Return (Zero)
}
If (LEqual (CCHK (Zero), Zero))
{
Return (Zero)
}
Store (\_SB.PCI0.LPCB.EC0.RRAM (0xF924), Local0)
And (Local0, 0x8F, Local0)
Or (Local0, 0x40, Local0)
\_SB.PCI0.LPCB.EC0.WRAM (0xF924, Local0)
\_SB.PCI0.LPCB.EC0.WRAM (0xF920, 0x95)
\_SB.PCI0.LPCB.EC0.WRAM (0xF7A4, Zero)
\_SB.PCI0.LPCB.EC0.WRAM (0xF7A5, Zero)
Store (LCTL, ELCT)
Store (SVID, HVID)
Store (SDID, HDID)
Store (\_SB.PCI0.RP01.LREN, \_SB.PCI0.RP01.PEGP.LTRE)
Store (One, LNKD)
While (LNotEqual (LNKS, Zero))
{
Sleep (One)
}
SGPO (HRE0, HRG0, HRA0, One)
SGPO (PWE0, PWG0, PWA0, Zero)
Return (Zero)
}
DefinitionBlock("", "SSDT", 2, "hack", "DDGP", 0)
{ External(_SB.PCI0.RP01.PEGP._OFF, MethodObj)Device(RMD1)
{
Name(_HID, "RMD10000")
Method(_INI)
{
// disable discrete graphics (Nvidia/Radeon) if it is present
If (CondRefOf(\_SB.PCI0.RP01.PEGP._OFF)) { \_SB.PCI0.RP01.PEGP._OFF() }
}
}
}
hi @RehabMan.
i have _OFF method in SSDT6:
and _INI methods in SSDT5:Code:Method (_OFF, 0, Serialized) // _OFF: Power Off { If (LEqual (CTXT, Zero)) { If (LNotEqual (GPRF, One)) { Store (VGAR, VGAB) } Store (One, CTXT) } HGOF () }
and HGOF in SSDT 5:Code:Method (_INI, 0, NotSerialized) // _INI: Initialize { Store (Zero, \_SB.PCI0.RP01.PEGP._ADR) }
i used this hotpatch for disable nVidia graphic card:Code:Method (HGOF, 0, Serialized) { If (LNotEqual (SGGP, One)) { Return (Zero) } If (LEqual (CCHK (Zero), Zero)) { Return (Zero) } Store (\_SB.PCI0.LPCB.EC0.RRAM (0xF924), Local0) And (Local0, 0x8F, Local0) Or (Local0, 0x40, Local0) \_SB.PCI0.LPCB.EC0.WRAM (0xF924, Local0) \_SB.PCI0.LPCB.EC0.WRAM (0xF920, 0x95) \_SB.PCI0.LPCB.EC0.WRAM (0xF7A4, Zero) \_SB.PCI0.LPCB.EC0.WRAM (0xF7A5, Zero) Store (LCTL, ELCT) Store (SVID, HVID) Store (SDID, HDID) Store (\_SB.PCI0.RP01.LREN, \_SB.PCI0.RP01.PEGP.LTRE) Store (One, LNKD) While (LNotEqual (LNKS, Zero)) { Sleep (One) } SGPO (HRE0, HRG0, HRA0, One) SGPO (PWE0, PWG0, PWA0, Zero) Return (Zero) }
should I consider this patch complete?Code:DefinitionBlock("", "SSDT", 2, "hack", "DDGP", 0) { External(_SB.PCI0.RP01.PEGP._OFF, MethodObj)Device(RMD1) { Name(_HID, "RMD10000") Method(_INI) { // disable discrete graphics (Nvidia/Radeon) if it is present If (CondRefOf(\_SB.PCI0.RP01.PEGP._OFF)) { \_SB.PCI0.RP01.PEGP._OFF() } } } }
how about this:As per guide, the EC related code in HGOF must be moved to _REG.
DefinitionBlock("", "SSDT", 2, "hack", "DGPU", 0)
{
Device(RMD1)
{
Name(_HID, "RMD10000")
Method(_INI)
{
// disable discrete graphics (Nvidia/Radeon) if it is present
If (CondRefOf(\_SB.PCI0.RP01.PEGP._OFF)) { \_SB.PCI0.RP01.PEGP._OFF() }
}
}
Scope(_SB.PCI0.RP01.PEGP)
{
Method (HGOF, 0, Serialized)
{
If (LNotEqual (SGGP, One))
{
Return (Zero)
}
If (LEqual (CCHK (Zero), Zero))
{
Return (Zero)
}
Store (LCTL, ELCT)
Store (SVID, HVID)
Store (SDID, HDID)
Store (\_SB.PCI0.RP01.LREN, \_SB.PCI0.RP01.PEGP.LTRE)
Store (One, LNKD)
While (LNotEqual (LNKS, Zero))
{
Sleep (One)
}
SGPO (HRE0, HRG0, HRA0, One)
SGPO (PWE0, PWG0, PWA0, Zero)
Return (Zero)
}
}
Scope(_SB.PCI0.LPCB.EC0)
{
OperationRegion(RME3, EmbeddedControl, 0x00, 0xFF)
Method(_REG, 2)
{
XREG(Arg0, Arg1) // call original _REG, now renamed XREG
If (3 == Arg0 && 1 == Arg1) // EC ready?
{
Store (\_SB.PCI0.LPCB.EC0.RRAM (0xF924), Local0)
And (Local0, 0x8F, Local0)
Or (Local0, 0x40, Local0)
\_SB.PCI0.LPCB.EC0.WRAM (0xF924, Local0)
\_SB.PCI0.LPCB.EC0.WRAM (0xF920, 0x95)
\_SB.PCI0.LPCB.EC0.WRAM (0xF7A4, Zero)
\_SB.PCI0.LPCB.EC0.WRAM (0xF7A5, Zero)
}
}
}
}
how about this:
Code:DefinitionBlock("", "SSDT", 2, "hack", "DGPU", 0) { Device(RMD1) { Name(_HID, "RMD10000") Method(_INI) { // disable discrete graphics (Nvidia/Radeon) if it is present If (CondRefOf(\_SB.PCI0.RP01.PEGP._OFF)) { \_SB.PCI0.RP01.PEGP._OFF() } } } Scope(_SB.PCI0.RP01.PEGP) { Method (HGOF, 0, Serialized) { If (LNotEqual (SGGP, One)) { Return (Zero) } If (LEqual (CCHK (Zero), Zero)) { Return (Zero) } Store (LCTL, ELCT) Store (SVID, HVID) Store (SDID, HDID) Store (\_SB.PCI0.RP01.LREN, \_SB.PCI0.RP01.PEGP.LTRE) Store (One, LNKD) While (LNotEqual (LNKS, Zero)) { Sleep (One) } SGPO (HRE0, HRG0, HRA0, One) SGPO (PWE0, PWG0, PWA0, Zero) Return (Zero) } } Scope(_SB.PCI0.LPCB.EC0) { OperationRegion(RME3, EmbeddedControl, 0x00, 0xFF) Method(_REG, 2) { XREG(Arg0, Arg1) // call original _REG, now renamed XREG If (3 == Arg0 && 1 == Arg1) // EC ready? { Store (\_SB.PCI0.LPCB.EC0.RRAM (0xF924), Local0) And (Local0, 0x8F, Local0) Or (Local0, 0x40, Local0) \_SB.PCI0.LPCB.EC0.WRAM (0xF924, Local0) \_SB.PCI0.LPCB.EC0.WRAM (0xF920, 0x95) \_SB.PCI0.LPCB.EC0.WRAM (0xF7A4, Zero) \_SB.PCI0.LPCB.EC0.WRAM (0xF7A5, Zero) } } } }