SSDT generation script (Ivybridge PM)

[plantoschka]

I got some problem with mit i7-3770k (Stock Clocked, ASRock Z77E-ITX).

When I run the generation script it gives me a SSDT that has the following P-State: 16,22,29,35,37.

Problem 1: When all 4 Cores run at full my CPU clocks at 3.7Ghz. But that should be 3.5Ghz according to Intel.

Problem 2: I never get to 3.9 Ghz Turbo (when only 2 Cores are running).

I use MacMini6,2 as SysDef.

Hope somebody can help me

Thanks

 

[konjow]

I just discovered ssdt possibilities here - Thank you
I installed app and added ssdt-yes in plist.
Im getting this worning in terminal "Warning: 'board-id' [Mac-F221BEC8] is not supported by Ivy Bridge PM"
using 77 UD5H board 3770K 10.9. Should I do something else? Btw HW shows 1600Hz the lowest

Edit I used Terminal to use OC - seems to be successfully update ssdt but max is still 3500hz

Im going back to SSDT-no for now

 

[hackintoshx86]

I just discovered ssdt possibilities here - Thank you
I installed app and added ssdt-yes in plist.
Im getting this worning in terminal "Warning: 'board-id' [Mac-F221BEC8] is not supported by Ivy Bridge PM"
using 77 UD5H board 3770K 10.9. Should I do something else? Btw HW shows 1600Hz the lowest

Edit I used Terminal to use OC - seems to be successfully update ssdt but max is still 3500hz

Im going back to SSDT-no for now

What system definition are you using? Ivy bridge with your board should be Macmini 6,2 not Macpro3,1

 

[konjow]

Im on Mac Pro 5.1 since 10.8.5 was best option to prevent crashing Cuda in CS6
Thank you very much hackintoshx86 for info I will change it now.


Update: its changed to Mac mini 6.2. I run ~/ssdtPRGen.command 4200 in terminal and still HWmonitor shows 1600/3500
What can be wrong?

Update 2
Premier CC is cracking all the time with Mac mini si I'm back on Mac Pro 5.1

 

[RehabMan]

Pike --

Nice work on this script.

I found a minor bug...

The data for i7-4700MQ is incorrect:
i7-4700MQ,47,800,2400,3600,4,8

correct data is:
i7-4700MQ,47,800,2400,3400,4,8

See: http://ark.intel.com/products/75117

AppleIntelCPUPowerManagementInfo.kext confirms accurate data at ark.intel.com.

Surprisingly this doesn't cause a KP... It did cause the lowest pstate reached to be x10 instead of x8 (even though APSN was 12). When I corrected the error (removed the first two [x35,x36] pstates, APSN=10), then I was able to reach x8. Kind of interesting, huh?

 

[mmmprod]

HASWELL is correctly recognized however I'm losing Sleep when using this generator...
Very strange...

Sleep come back when I use GENERATED C and P STATE or when I use MACiASL SSDT Generator...
however, the CPU is not recognized during boot...

strange...

I also have better benchmark using SSDTPrGen ...
I have tried using MAC PRO 3,1 5,1 as well as iMAC 13,2 and 14,2 same problem...

Also ... I noticed that I'm experiencing more random Freeze when using SSDTPrGen ...

strange...

anyway I wanted to share my experience

 

[ronalith]

Pike, after the successful upgrade to Mavericks and being able to use the SSDT I've noticed my processor works only at the top p-state. Could that be because of something in the SSDT? or maybe related to something else in my config? Everything else works but the processor seems to run rather hot, around 10ºC extra when idle. I am now considering to change the cooler but saving energy would be great since my computer is most of the time on.

 

[RehabMan]

Pike, after the successful upgrade to Mavericks and being able to use the SSDT I've noticed my processor works only at the top p-state. Could that be because of something in the SSDT? or maybe related to something else in my config? Everything else works but the processor seems to run rather hot, around 10ºC extra when idle. I am now considering to change the cooler but saving energy would be great since my computer is most of the time on.

How are you testing pstates? Have you checked Activity Monitor to see if there is a process using CPU resources?

Otherwise post ioreg: http://www.tonymacx86.com/audio/58368-guide-how-make-copy-ioreg.html

 

[ronalith]

@RehabMan I tested with AppleIntelCPUPowermanagementInfo.kext... it gives me only P-state 24:

Thinkstation:~ ronalith$ cat /var/log/system.log | grep "AICPUPMI:"
Nov 13 07:18:16 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]
Nov 13 12:22:15 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]
Nov 13 13:06:04 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]
Nov 13 14:58:21 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]

This was just after a fresh reboot. Attached is my IOreg.

 

[RehabMan]

@RehabMan I tested with AppleIntelCPUPowermanagementInfo.kext... it gives me only P-state 24:

Thinkstation:~ ronalith$ cat /var/log/system.log | grep "AICPUPMI:"
Nov 13 07:18:16 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]
Nov 13 12:22:15 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]
Nov 13 13:06:04 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]
Nov 13 14:58:21 localhost kernel[0]: AICPUPMI: CPU P-States [ 24 ]

This was just after a fresh reboot. Attached is my IOreg.

You should use DropSSDT=Yes as there is a crazy-weird-large OEM SSDT table loading. Also, you don't have an SSDT in /Extra/ssdt.aml.

Also, your Processor objects are declared strangely in DSDT. It might work, but I'm not certain. They look like this:

        Processor (CP00, 0x00, 0x00000410, 0x06)
        {
            Name (_HID, "ACPI0007")
            Name (_UID, "PCI0-CP00")
            Name (_PXM, Zero)
            Method (_STA, 0, NotSerialized)
            {
                If (LEqual (CSTA (Zero, Zero), Zero))
                {
                    Return (Zero)
                }
                Else
                {
                    Return (0x0F)
                }
            }
        }

        Processor (CP01, 0x01, 0x00000410, 0x06)
        {
            Name (_HID, "ACPI0007")
            Name (_UID, "PCI0-CP01")
            Name (_PXM, Zero)
            Method (_STA, 0, NotSerialized)
            {
                If (LEqual (CSTA (Zero, One), Zero))
                {
                    Return (Zero)
                }
                Else
                {
                    Return (0x0F)
                }
            }
        }
... and so on ...

Standard is inside of Scope (_PR) like this patch creates:

into definitionblock code_regex . insert
begin
    Scope (_PR)\n
    {\n
        Processor (CPU0, 0x00, 0x00000410, 0x06) {}\n
        Processor (CPU1, 0x01, 0x00000410, 0x06) {}\n
        Processor (CPU2, 0x02, 0x00000410, 0x06) {}\n
        Processor (CPU3, 0x03, 0x00000410, 0x06) {}\n
        Processor (CPU4, 0x04, 0x00000410, 0x06) {}\n
        Processor (CPU5, 0x05, 0x00000410, 0x06) {}\n
        Processor (CPU6, 0x06, 0x00000410, 0x06) {}\n
        Processor (CPU7, 0x07, 0x00000410, 0x06) {}\n
    }\n
end;

You could remove them and replace with the patch above, or you can create your SSDT around the existing declarations which are named different than normal (CP00 vs CPU0). You will have to edit the SSDT to comply if you intend to use the existing declarations in the DSDT.