XHC USB Kext Creation Guideline

[kgp]

Good evening to all you port limiters. Here is my kext for the:

ASUS ROG MAXIMUS X HERO (z370)

Same issues and requests like in post #180 above. Thanks in advance!

 

[Racke]

o.k. port-count was wrong. Highest port is SSP6 with port number 16000000. Therefore I changed port-count from 1a000000 to 16000000. See attached files. Please upload both fully implemented and truncated 15-port XHC Usb kexts for the Gigabyte z170x Designare. As soon I have both files, I will implement them in the Github library.

Thanks, dude!

I thought the port count should be the highest port that physically exist, if there was no limitation. My highest port would be SS10.

The highest possible port would therefore be SS10(1a000000), the highest I actually use because of my kext is SS06(16000000)

Did I misunderstand that?

 

[kgp]

I thought the port count should be the highest port that physically exist, if there was no limitation. My highest port would be SS10.

The highest possible port would therefore be SS10(1a000000), the highest I actually use because of my kext is SS06(16000000)

Did I misunderstand that?

Port-count is the port number of the highest port in use. If SSP10 is the highest port in use, port-count is 1a000000. If like in your two kexts SSP6 is the highest port in use, port-count is 16000000 and not 1a000000.

 

[Racke]

Port-count is the port number of the highest port in use. If SSP10 is the highest port in use, port-count is 1a000000. If like in your two kexts SSP6 is the highest port in use, port-count is 16000000 and not 1a000000.

OK, sorry. I will change that - little misunderstanding. I need a few days. Lot of work at the moment.

 

[kgp]

OK, Sorry. I will change that. little misunderstanding

No problem..

and two files for each board, ok?

Thanks, dude!

 

[Racke]

No problem..

and two files for each board, ok?

Thanks, dude!

ok

 

[oli.mathieu]

Hello
I've done XHCI.kext for the Gigabyte X299 UD4 PRO
But I've some issues for the 15 ports truncated version.
The MoBo has 6 USB 3.0 connector on the backPanel and I have 2 other USB 3.0 on the front panel via an internal connector.
I need at least 8 HSxx port and 8 SSPxx Port don't I ? With lead to 16 port that is exceeding the 15 ports.
Any advice ?
Thanks in advance

 

[kgp]

Hello
I've done XHCI.kext for the Gigabyte X299 UD4 PRO
But I've some issues for the 15 ports truncated version.
The MoBo has 6 USB 3.0 connector on the backPanel and I have 2 other USB 3.0 on the front panel via an internal connector.
I need at least 8 HSxx port and 8 SSPxx Port don't I ? With lead to 16 port that is exceeding the 15 ports.
Any advice ?
Thanks in advance

Woow.. now I understand why you faced so many troubles right at the beginning! 24 ports, 10 SS ports! Amazing!

Now.. for the truncated 15-port kext, I would drop HS04/SSP04 and HS03/SSP03 on the back panel and HS09/SSP09 and HS10/SSP10 of the lower internal USB3.0 header. Finally, to stay within Apple's 15-port USB limit, I would also drop HS14, thus F_USB2 only supports one device, but F_USB1 is still fully functional (2x USB2.0).

Does the 5 digit nomenclature SSPxx properly show up in IOREG? Otherwise, change to SSxx within the fully implemented kext (you would also need to correct the port layout drawings). For the truncated 15-port kext, I anyway reconverted to the 4-digit SSPx nomenclature, as highest SS port in this case is SSP8.

Please let me know as soon I can upload both files to the Github Library..

Perfect work, my friend!

 

[oli.mathieu]

now I understand why you faced so many troubles right at the beginning! 24 ports,

It was this another Mobo (X99 designare EX ...still working on it). This one was easy ... just to buy 2 USB2 bracket to test the 2 USB2 internals connectors

I would drop HS04/SSP04 and HS03/SSP03 on the back panel

So those Usb 3.0 connector won't work anymore, if I understand correctly.

HS09/SSP09 and HS10/SSP10 of the lower internal USB3.0 header

I will do that, because this internal connector isn't connected.
I will also drop HS11 ➧ HS14 since the 2 USB2 internals connector aren't connected either.

Does the 5 digit nomenclature SSPxx properly show up in IOREG?

Yesss

Please let me know as soon I can upload both files to the Github Library..

You're good to go ;-)
Thank you for helping

 

[oli.mathieu]

Sorry
I made a mistake in the port report (png) I swap HS01/SSP1 and HS02/SSP2
I corrected it