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X299 Big Sur Support

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Asus Pro WS x299 Sage II
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Your IOReg looks good :
All the ports under XHC2 , XHC3 and XHCI are loaded on the right side.

Just some improvements :
- On SSDT-X299-XHC :
1/ XHC2 : 2 ports USB 3.2 Gen1 Type-A External (N° 6 : USB 3.2 Gen 1 ports 7 and 8 on rear IO)
2/ XHC3 : 1x USB 3.2 Type-A / ASM1543 1x USB 3.2 Type-C External (gen 2) - ( N°9 USB 3.2 Gen 2 Type-C® port EC1 and N°5 USB 3.2 Gen 2 port E2 on rear IO)

- On USB.kext :
1/ XHC2 : HS01 and HS02 : usb-connector : 2 (never 255 on external) -SS01 and SS02 : usb-connector : 3 OK (N° 6 : USB 3.2 Gen 1 ports 7 and 8 on rear IO)
2/ XHC3 : HS01 and SS01 : usb-connector : 9 (10 works also) and HS02 and SS02 : usb-connector : 3 (never 255 on external) ( N°9 USB 3.2 Gen 2 Type-C® port EC1 and N°5 USB 3.2 Gen 2 port E2 on rear IO)

Only for cosmetic but SSDT--X299-XHCI no more needed and we can achieve that by adding PciRoot device properties on OC config.plist

I don't think your internal USB C header is plugged actually.

Note : usb-connector : 255 only for USB Wifi header if plugged in.

Thanks would like to port all this over to Device Properties in OpenCore and the Internal USB 3 20 pin is being used but the Kracken Aura cPump/LED with a converter female 20 pin to male USB 9 header, not sure why it shows up as USB2 on HS14 maybe this is correct? The Lianli Case LED and BCM94362CD Bluetooth card USB is connected to NZXT expanded Hub of 9 pin male headers whic is connected to the Inateck PCIe card internal 20 pin USB 3 with a conversion female 20 pin to 9 pin male header connected to NZXT, does it make sense now?

Also would like to somehow port over this SSDT for the GPU 580/5500XT and 5700XT cards mattystonie thread AMD Radeon Performance SSDT Thread let me know I would love to port over the SSDT for the 5500XT because his SSDT won't load for me.

Link:


On Page 82 they have ported the 580 SSDT to Device Properties using the recommended flags CFG PP and Caiv. For my Card Matty didn't like doing that maybe the amount of binary data is huge let me know if you think we can port this or not, but for the life of me spending all weekend on it I could not get his RX5500XT SSDT to load.
 
Joined
Jul 16, 2010
Messages
451
Motherboard
Asus Pro WS x299 Sage II
CPU
i9-10980XE
Graphics
RX 5500 XT
Mac
  1. Mac Pro
Mobile Phone
  1. iOS
Your IOReg looks good :
All the ports under XHC2 , XHC3 and XHCI are loaded on the right side.

Just some improvements :
- On SSDT-X299-XHC :
1/ XHC2 : 2 ports USB 3.2 Gen1 Type-A External (N° 6 : USB 3.2 Gen 1 ports 7 and 8 on rear IO)
2/ XHC3 : 1x USB 3.2 Type-A / ASM1543 1x USB 3.2 Type-C External (gen 2) - ( N°9 USB 3.2 Gen 2 Type-C® port EC1 and N°5 USB 3.2 Gen 2 port E2 on rear IO)

- On USB.kext :
1/ XHC2 : HS01 and HS02 : usb-connector : 2 (never 255 on external) -SS01 and SS02 : usb-connector : 3 OK (N° 6 : USB 3.2 Gen 1 ports 7 and 8 on rear IO)
2/ XHC3 : HS01 and SS01 : usb-connector : 9 (10 works also) and HS02 and SS02 : usb-connector : 3 (never 255 on external) ( N°9 USB 3.2 Gen 2 Type-C® port EC1 and N°5 USB 3.2 Gen 2 port E2 on rear IO)

Only for cosmetic but SSDT--X299-XHCI no more needed and we can achieve that by adding PciRoot device properties on OC config.plist

I don't think your internal USB C header is plugged actually.

Note : usb-connector : 255 only for USB Wifi header if plugged in.

Actually there is a USB C Gen2 connector small connector like 8 pins don’t know how many actually but small it’s connected to case outside front. It’s the one so think I had as XHC2 with 9 and 254 or XHC3 maybe that why it was 255 it’s internal in motherboard. Need to check this again. It’s not a 20 pin, it is a tiny 8 or less pin size Gen 2 USB C internal. I use a USB C to USB A converter cable onto the USB C. If you turn 180 degree will use SS01 and 180 degree again will use SS02 and when I connect USB 2 flash drive it connect connects to HS01 turn 180 connects to HS02. I verified this all 4 ports on one USB C gen 2 internal connector small
Like 8 pin that I connect case cable and USB C socket location is on case front panel.

Last question we need to remove USBX data in SSDT since we have power properties in USB kext or not?

You say XHCI is just cosmetic but really if we eliminate power properties in USBx we need in XHCI right or do we keep power properties in USBX still isn’t it redundant?
 
Last edited:
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Thanks would like to port all this over to Device Properties in OpenCore and the Internal USB 3 20 pin is being used but the Kracken Aura cPump/LED with a converter female 20 pin to male USB 9 header, not sure why it shows up as USB2 on HS14 maybe this is correct? The Lianli Case LED and BCM94362CD Bluetooth card USB is connected to NZXT expanded Hub of 9 pin male headers whic is connected to the Inateck PCIe card internal 20 pin USB 3 with a conversion female 20 pin to 9 pin male header connected to NZXT, does it make sense now?

Also would like to somehow port over this SSDT for the GPU 580/5500XT and 5700XT cards mattystonie thread AMD Radeon Performance SSDT Thread let me know I would love to port over the SSDT for the 5500XT because his SSDT won't load for me.

Link:


On Page 82 they have ported the 580 SSDT to Device Properties using the recommended flags CFG PP and Caiv. For my Card Matty didn't like doing that maybe the amount of binary data is huge let me know if you think we can port this or not, but for the life of me spending all weekend on it I could not get his RX5500XT SSDT to load.

Actually there is a USB C Gen2 connector small connector like 8 pins don’t know how many actually but small it’s connected to case outside front. It’s the one so think I had as XHC2 with 9 and 254 or XHC3 maybe that why it was 255 it’s internal in motherboard. Need to check this again. It’s not a 20 pin, it is a tiny 8 or less pin size Gen 2 USB C internal. I use a USB C to USB A converter cable onto the USB C. If you turn 180 degree will use SS01 and 180 degree again will use SS02 and when I connect USB 2 flash drive it connect connects to HS01 turn 180 connects to HS02. I verified this all 4 ports on one USB C gen 2 internal connector small
Like 8 pin that I connect case cable and USB C socket location is on case front panel.

Last question we need to remove USBX data in SSDT since we have power properties in USB kext or not?

You say XHCI is just cosmetic but really if we eliminate power properties in USBx we need in XHCI right or do we keep power properties in USBX still isn’t it redundant?

Sorry but to be more clear : only internal devices plugged on USB header (which don't have external USB ports) like Wifi Pcie Card and yes also your Kracken Aura cPump/LED with a converter female 20 pin to male USB 9 header should be usb-connector : 255.

As @Ellybz stated here 478 we are making investigation to confirm we can remove SSDT-USBX and SSDT-PLUG , also SSDT-XHCI.

Those "stuffs" have already been used here for two years with custom PP_PhmSoftPowerPlayTable see here SSDT-X299-VEGA56 , so we should help you.
 
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First and foremost, thanks for the heads up, details & directions for this new USB.Kext expansion. You Sir rock :headbang:
I did a few modifications to your guide as I did not want to use any SSDTs for XHCs or TB.( Only device properties )
I was able to rename the ports within the kext itself using the IONameMatch ( see screenshot below ).

I have now the properties from the SSDT-USBX attached to ALL my USB ports, without the SSDT. I also got rid of the SSDT-plug as I have native XCPM from my Bios. Native XCPM gives me 10 speed steps from 1.12Ghz to 5Ghz ;Idle @1.12 ( tested for over 2 weeks ).

Now, I can boot & run successfully Big Sur, Catalina & Mojave:

-SSDT-USBX is gone!!!
-SSDT-PLUG is gone !!!!
(Gigabyte x299 does not need SSDT for EC or RTC, XOSI or SBUS); so my ACPI Folder is now empty :headbang::clap::)

My custom USB kext is fully loaded with all my ports. ( Note that my XHCI has now 22 ports fully functional )

Sleep & Wake functions are still working perfectly.

Kudos to @Loloflatsix

PS: I still need to rename the ports on my Inateck Pcie Card..Will do it shortly.

TB01/02/03/04 are the ports I renamed for the Alpine ridge TB3

And to top off my Sunday..New High Score on CINEBENCH R20: above 10400 :lol:

Thanks again for all your contributions :wave:

EDIT: I will make sure to report back on this post if any bug or unstable behavior occurs.

View attachment 489771

View attachment 489775

View attachment 489780

View attachment 489825



View attachment 489776

Great, you succeeded and removed yours SSDT-XHCI , SSDT-USBX and SSDT-PLUG from EFI :thumbup:

I will do more tests on my side and after I will confirm our investigations on a guide, maybe you could help me ... :)
 
Last edited:
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@Loloflatsix

Thanks for clearing this up. Do we still need USBX portion Kusb power properties in SSDT only need EC disabler in SSDT since we are injecting power properties (Kusb) into usbport kext or we still need in USBX also?

My friend said these ASUS x299 has weird ACPI. Do you have EC0 and EC in ioreg with EC0 has AppleACPIEC but EC does not have AppleBusPowerController like in real iMac Pro under EC. Can you post your ioreg want to have a peak at it.

Thanks!
 
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@Loloflatsix

Thanks for clearing this up. Do we still need USBX portion Kusb power properties in SSDT only need EC disabler in SSDT since we are injecting power properties (Kusb) into usbport kext or we still need in USBX also?

My friend said these ASUS x299 has weird ACPI. Do you have EC0 and EC in ioreg with EC0 has AppleACPIEC but EC does not have AppleBusPowerController like in real iMac Pro under EC. Can you post your ioreg want to have a peak at it.

Thanks!
I must verify Kusb power is injected by kext ( not behind a Mac actually on my desk in my agency ).;)

Will share my IOReg later this afternoon. :)

Don't listen to your friend about ACPI on X299 ...I use two builds every day + one build for home computing + one build for testing: where are the issues, I'm still looking for them :beachball: ;)
 
Last edited:
Joined
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Asus Pro WS x299 Sage II
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I must verify Kusb power is injected by kext ( not behind a Mac actually on my desk in my agency ).;)

Will share my IOReg later this afternoon. :)

Don't listen to your friend about ACPI on X299 ...I use two builds every day + one build for home computing + one build for testing: where are the issues, I'm still looking for them :beachball: ;)

I agree the ASUS build is flawless. Let me know about my questions I had Kusb in SSDT needed or not and EC and EC0.

I have a ton of ASUS motherboards going back to LGA 775 all running Catalina.
 
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Hi @Loloflatsix,

I saw you have a couple of SSDT for TB3, which card do you use? And did you flash the firmware?
I'm planning to buy a Deluxe II which has native TB3, my guess is that it will work with your EFI but I'm not sure about TB3, could you share some insights? Thanks!

@egroys and X299 Prime Deluxe owners :

Here I share my EFI OC 6.0.1 X299 Prime Deluxe : I am still with the old BIOS.

So see post #3 for new BIOS

SSDTs / ACPI :
- must be adapted according to your system
Removed :
- MLB, Rom, Serial and SMUUID : you must GenSMBIOS and edit the config.plist

View attachment 484938
 
Joined
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Hi @Loloflatsix,

I saw you have a couple of SSDT for TB3, which card do you use? And did you flash the firmware?
I'm planning to buy a Deluxe II which has native TB3, my guess is that it will work with your EFI but I'm not sure about TB3, could you share some insights? Thanks!
In my Asus Prime Deluxe Build I have a GC Titan Ridge , but I did not flashed the firmware , see also post #3 for the procedure.
 
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