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[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

luckyal said:
Thanks for the clarification. One thing about Hackintoshes is that even minute details mater, so while your guide is informative, these are the type of questions that arise regardless. You may want to add that caveat to your post so as to prevent further questions like mine. :) And THANK YOU!
Click to expand...
Certainly...done. I've changed the procedure to make it simpler.
 
Hello. I did not manage to bottle the firmware of the Gigabyte Z390 under Windows 10 that with software programmer 1.4 it does not read the chip will try it again today via mac fläshroom do you think I have more success?

Maybe someone has an efi folder that I can use after I have finished writing the firmware that thunderbold can be found in the system settings

this is my efi who only works with catalina no thunderbold
 

Attachments

  • OC-Z390-Designare-nur-iGPU-iMac19,1(06-5-2020).zip
    18 MB · Views: 105
vicantu said:
Im so grateful for you support, thanks for you time!

I used that files with the following results rebooting NUC 10 times:

The first time, on System Information´s thunderbolt section: "Thunderbolt: No drives are loaded."

I shutdown it and restarted it for the second time: Now the tree appeared so I connected my TB3 Drive and It worked!, disconnected it and hot plugged my Core X eGpu, it mounted so I tested it with Geekbench, everything worked great, also the eject button for the eGPU appeared for the first time ever!, I disconnected it and hotplugged again my drive and it worked, I send the computer to sleep but when it waked up the drive was ejected and nothing worked again and the tree disappeared.

Form boot 3 to 7 again "Thunderbolt: No drives are loaded"

And from boot 8 to 10, the TB3 tree appears but no device can be mounted.

So, just worked (until sleep) for one time in 10 boots, is here any special thing I need to do in clover, config.plist etc?

EDIT: if I clear NVRAM in clover at boot time, everything works, except sleep issues...

EDIT2: I don't know if its related but since I started flashing and playing with my TB3 the last 3 days, my Date and Time constantly are erased, 75% of the occasions at boot time my bios said that CMOS Time and Date is wrong, I don't think is my battery, my Nuc is year and a half old and constantly connected to AC, very weird.

thanks again!
Click to expand...
weachy said:
hey vicantu,
same problem here (NUC8i5BEH).
I flashed "NUC8i7HNKpatched.bin", added "ssdt-tbolt3-rp05-port7-gc-alpine-ridge-aml" and "ssdt-dtpg-aml" to my OpenCore EFI, just changed UID and CRC-8, then it works like a charm.
tbt 100% died after wake-from-sleep.
Click to expand...
If someone is wiling to unflash their NUC (i.e. flash the original firmware back) and experiment with an SSDT-only solution, then simply post the NUC's DSDT.aml as follows:
  • Ensure Thunderbolt is enabled in BIOS.
  • Then press F4 at the Clover Boot Menu. This will save all original ACPI files in the CLOVER/ACPI/origin folder.
  • Boot into macOS and Mount EFI partition.
  • Then post the DSDT.aml from CLOVER/ACPI/origin
 
luckyal said:
@CaseySJ Looks like this didn't work. Followed the process to a T. Any ideas? I did delete the drivers64UEFI folder as instructed. My previous post has the screenshot which includes contents of both folders.
Click to expand...
This looks like a memory driver issue. If you were using OsxAptioFix2Drv-free2000.efi, then check that no other memory drivers (such as AptioMemoryFix.efi, OsxAptioFix3Drv.efi, etc) are installed in CLOVER/drivers/UEFI.
 
** Repository of Thunderbolt Bus Activation SSDTs -- Alpine Ridge Controllers Only **
EXPERIMENTAL - See "Issues"
Please do not quote this post in its entirety. Post a link instead.

if you have a working SSDT for your board and Alpine Ridge controller, please post details​


Overview:
Thunderbolt Bus can be activated on Alpine Ridge controllers (JHL 6540) either by flashing firmware or more simply by installing a properly configured SSDT along with a couple of ACPI renames in config.plist.

The SSDT must be adapted to each (a) motherboard and (b) the slot in which Alpine Ridge card is installed. If the motherboard has built-in Alpine Ridge controller, then this method may yield better results than for an add-in PCIe card.

Issues:
  • Wake from sleep may not work properly on some motherboards. The SSDTs in this guide may get updated to address such issues.
  • On Asus X99 Deluxe II and other boards, the Thunderbolt card seems to turn off when system is booted with a TB device connected, but hot plug works. On board with built-in Alpine Ridge, however, this method may yield better results.
Repository:
  • BIOS Version: 1802
  • Thunderbolt header cable must be connected to motherboard.
  • Thunderbolt and Thunderbolt Force Power must be enabled in BIOS. Thunderbolt mode must be set to Legacy.
Thunderbolt hot plug event is handled by GPE method _E10. So it is necessary to rename _E10 to XE10
  • Find: 5F453130
  • Replace: 58453130
  • Comment: Change _E10 to XE10
It is also necessary to rename BR1A --> _INI() to BR1A --> XINI():
  • Find: 42523141 085F4144 520C0000 01005B80 4D43544C 000C8801 00E00A04 5B81134D 43544C01 00034847 50450100 07000800 08140D5F 494E49
  • Replace: 42523141 085F4144 520C0000 01005B80 4D43544C 000C8801 00E00A04 5B81134D 43544C01 00034847 50450100 07000800 08140D58 494E49
  • Comment: Change BR1A --> _INI to BR1A --> XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Asus-X99.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • BIOS Version: F22g
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS. GPIO Force Power may need to be done with a grub shell by following a procedure similar to that for unlocking MSR 0xE2.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E23. So it is necessary to rename _E23 to XE23:
  • Find: 5F453233
  • Replace: 58453233
  • Comment: _E23 to XE23
It is also necessary to rename RP05 --> _INI() to RP05 --> XINI():
  • Find: 5F494E49 00704C54 52314C54 525A7050 4D4C314C 4D534C70 504E4C31 4C4E534C 704F4246 314F4246 5A140F5F 50525700 A4475052 570A690A 0414165F 50525400 A00A5049 434DA441 523038A4 50523038 5B824D39 52503036
  • Replace: 58494E49 00704C54 52314C54 525A7050 4D4C314C 4D534C70 504E4C31 4C4E534C 704F4246 314F4246 5A140F5F 50525700 A4475052 570A690A 0414165F 50525400 A00A5049 434DA441 523038A4 50523038 5B824D39 52503036
  • Comment: RP05:_INI to RP05:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPCH-GA-Z170-UD5TH.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • See this post
  • A modified BIOS is also available that include options for (a) GPIO3 Force Power, (b) CFG-Lock to unlock MSR 0xE2, and (c) ACPI Removal Object Support. See this post for details.
  • BIOS Version: ????
  • Thunderbolt header cable must be connected (or pins 3 and 5 must be jumpered to enable power)
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E2C. So it is necessary to rename _E2C to XE2C:
  • Find: 5F453243
  • Replace: 58453243
  • Comment: _E2C to XE2C
It is also necessary to rename RP05 --> _INI() to RP05 --> XINI():
  • Find: 52503035 084C5452 5A00084F 42465A00 084C4D53 4C00084C 4E534C00 142A5F49 4E49
  • Replace: 52503035 084C5452 5A00084F 42465A00 084C4D53 4C00084C 4E534C00 142A5849 4E49
  • Comment: RP05:_INI to RP05:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-ASRock-Z370-ITX-AC.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • BIOS Version: ??
  • Thunderbolt header cable must be connected (or pins 3 and 5 must be jumpered to enable power)
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E17. So it is necessary to rename _E17 to XE17:
  • Find: 5F453137
  • Replace: 58453137
  • Comment: _E17 to XE17
Because the DSDT for these boards calls PINI(), we do not need to rename the RP21 --> _INI() method. Instead, the Thunderbolt SSDT implements PINI() instead of _INI().

Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Gigabyte-Z390-AORUS.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • BIOS Version: ??
  • Thunderbolt header cable must be connected (or pins 3 and 5 must be jumpered to enable power)
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E17. So it is necessary to rename _E17 to XE17:
  • Find: 5F453137
  • Replace: 58453137
  • Comment: _E17 to XE17
Because the DSDT for these boards calls PINI(), we do not need to rename the RP05 --> _INI() method. Instead, the Thunderbolt SSDT implements PINI() instead of _INI().

Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Gigabyte-Z390-GAMING-M.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
  • BIOS Version: ??
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E40. So it is necessary to rename _E40 to XE40:
  • Find: 5F453430
  • Replace: 58453430
  • Comment: _E40 to XE40
Because the DSDT for these boards calls PINI(), we do not need to rename the RP05 --> _INI() method. Instead, the Thunderbolt SSDT implements PINI() instead of _INI().

Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Intel-NUC8.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • Pending
  • BIOS Version: ??
  • Thunderbolt header able must be connected.
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to Legacy or No Security.
Thunderbolt hot plug event is handled by GPE method _L6F. So it is necessary to rename _L6F to XL6F:
  • Find: 5F4C3646
  • Replace: 584C3646
  • Comment: _L6F to XL6F
It is also necessary to rename RP21 --> _INI() to RP21 --> XINI():
  • Find: 00142A5F494E4900704C54524C4C54525A70504D4C4C4C4D534C70504E4C4C4C4E534C704F42464C4F42465A1443045F50525700A0329293564449440C
  • Replace: 00142A58494E4900704C54524C4C54525A70504D4C4C4C4D534C70504E4C4C4C4E534C704F42464C4F42465A1443045F50525700A0329293564449440C
  • Comment: RP21:_INI to RP21:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Asus-Z370-A-Prime-II.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • BIOS Version: ??
  • Thunderbolt header able must be connected.
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to Legacy or No Security.
Thunderbolt hot plug event is handled by GPE method _L6F. So it is necessary to rename _L6F to XL6F:
  • Find: 5F4C3646
  • Replace: 584C3646
  • Comment: _L6F to XL6F
It is also necessary to rename RP21 --> _INI() to RP21 --> XINI():
  • Find: 52503231142A5F494E49
  • Replace: 52503231142A58494E49
  • Comment: RP21:_INI to RP21:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Asus-Z370-A.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • Pending
  • BIOS Version: ??
  • Thunderbolt header cable must be connected (or pins 3 and 5 must be jumpered to enable power)
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _L6F. So it is necessary to rename _L6F to XL6F:
  • Find: 5F4C3646
  • Replace: 584C3646
  • Comment: _L6F to XL6F
Because the DSDT for these boards calls PINI(), we do not need to rename the RP21 --> _INI() method. Instead, the Thunderbolt SSDT implements PINI() instead of _INI().

Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-MSI-B360m-MORTAR.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • Pending
  • BIOS Version: 81
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E20. So it is necessary to rename _E20 to XE20:
  • Find: 5F453230
  • Replace: 58453230
  • Comment: _E20 to XE20
It is also necessary to rename RP01 --> _INI() to RP01 --> XINI():
  • Find: 52503031 084C5452 5A00084F 42465A00 084C4D53 4C00084C 4E534C00 142A5F49 4E49
  • Replace: 52503031 084C5452 5A00084F 42465A00 084C4D53 4C00084C 4E534C00 142A5849 4E49
  • Comment: Replace RP01:_INI with RP01:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Intel-NUC7.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • Pending
  • BIOS Version: F15a
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS. GPIO Force Power may need to be done with a grub shell by following a procedure similar to that for unlocking MSR 0xE2.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E17. So it is necessary to rename _E17 to XE17:
  • Find: 5F453137
  • Replace: 58453137
  • Comment: _E17 to XE17
It is also necessary to rename RP21 --> _INI() to RP21 --> XINI():
  • Find: 503231084C54525A00084F42465A00084C4D534C00084C4E534C00142A5F494E49
  • Replace: 503231084C54525A00084F42465A00084C4D534C00084C4E534C00142A58494E49
  • Comment: RP21:_INI to RP05:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-GA-Z370-Gaming-5.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • BIOS Version: ??
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E23. So it is necessary to rename _E23 to XE23:
  • Find: 5F453233
  • Replace: 58453233
  • Comment: _E23 to XE23
It is also necessary to rename RP05 --> _INI() to RP05 --> XINI():
  • Find: 52503035142A5F494E49
  • Replace: 52503035142A58494E49
  • Comment: RP05:_INI to RP05:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Designare-X299-EX.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • BIOS Version: ??
  • Thunderbolt and GPIO3 Force Power must be enabled in BIOS.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E16. So it is necessary to rename _E16 to XE16:
  • Find: 5F453136
  • Replace: 58453136
  • Comment: _E16 to XE16
It is also necessary to rename BR1B --> _INI() to BR1B --> XINI():
  • Find: 42523142 085F4144 520C0100 01005B80 4D43544C 000C8881 00E00A04 5B81134D 43544C01 00034847 50450100 07000800 08140D5F 494E49
  • Replace: 42523142 085F4144 520C0100 01005B80 4D43544C 000C8881 00E00A04 5B81134D 43544C01 00034847 50450100 07000800 08140D58 494E49
  • Comment: BR1B _INI to XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPCH-Gigabyte-X99-Designare_EX-FULL.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Reference:
  • GC-Alpine Ridge add-in-card must be installed in the slot connected to RP21 (bottom long slot?)
  • BIOS Version: F7c / F7d
  • Connect Thunderbolt header cable from GC-Alpine Ridge to THB_C header on motherboard.
  • Thunderbolt Security must be set to No Security.
Thunderbolt hot plug event is handled by GPE method _E17. So it is necessary to rename _E17 to XE17:
  • Find: 5F453137
  • Replace: 58453137
  • Comment: _E17 to XE17
It is also necessary to rename RP21 --> _INI() to RP21 --> XINI():
  • Find: 52503231142A5F494E49
  • Replace: 52503231142A58494E49
  • Comment: RP21:_INI to RP21:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Designare-X299-GC-AlpineRidge.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
  • BIOS Version: ??
  • Thunderbolt Security must be set to No Security.
  • GPIO3 Force Power must be enabled.
Thunderbolt hot plug event is handled by GPE method _E4C. So it is necessary to rename _E4C to XE4C:
  • Find: 5F453443
  • Replace: 58453443
  • Comment: _E4C to XE4C
It is also necessary to rename RP05 --> _INI() to RP05 --> XINI():
  • Find: 52503035142A5F494E49
  • Replace: 52503035142A58494E49
  • Comment: RP05:_INI to RP05:XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-Asus-Prime-X299-Deluxe-II-AlpineRidge.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
  • BIOS Version: ??
  • Thunderbolt Security must be set to No Security.
  • GPIO3 Force Power must be enabled.
Thunderbolt hot plug event is handled by GPE method _E16. So it is necessary to rename _E16 to XE16:
  • Find: 5F453136
  • Replace: 58453136
  • Comment: _E16 to XE16
It is also necessary to rename BR1B._INI to BR1B.XINI:
  • Find: 42523142 085F4144 520C0100 01005B80 4D43544C 000C8881 00E00A04 5B81134D 43544C01 00034847 50450100 07000800 08140D5F 494E49
  • Replace: 42523142 085F4144 520C0100 01005B80 4D43544C 000C8881 00E00A04 5B81134D 43544C01 00034847 50450100 07000800 08140D58 494E49
  • Comment: BR1B._INI --> BR1B.XINI
Copy the following two files to the CLOVER/ACPI/patched folder or the OpenCore OC/ACPI folder. OpenCore users also need to add the two SSDTs to their config.plist.
  • SSDT-TbtOnPch-GA-X99P-SLI.aml
  • SSDT.DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
Thunderbolt hot plug event is handled by GPE method _E2C. So it is necessary to rename _E2C to XE2C:
  • Find: 5F453243
  • Replace: 58453243
  • Comment: _E2C to XE2C
It is also necessary to rename RP09._INI to RP09.XINI:
  • Find: 5F494E49
  • Replace: 58494E49
  • Skip: 11
  • Count: 1
  • Comment: Replace _INI with XINI for RP09 (skip first 11 and replace the 12th)
Copy the following two files to the OpenCore OC/ACPI folder and add references to them in the ACPI section of config.plist:
  • SSDT-TbtOnPch-ThinkPad-T480-OC.aml
  • SSDT-DTPG.aml (this might already be present in your CLOVER or OpenCore folder)
 

Attachments

  • SSDT-TbtOnPch-Asus-X99.aml
    4.9 KB · Views: 182
  • SSDT-DTPG.aml
    100 bytes · Views: 228
  • SSDT-TbtOnPch-Gigabyte-Z390-AORUS.aml
    4.9 KB · Views: 223
  • SSDT-TbtOnPch-Intel-NUC8.aml
    4.9 KB · Views: 190
  • SSDT-TbtOnPch-ASRock-Z370-ITX-AC.aml
    4.5 KB · Views: 176
  • SSDT-TbtOnPch-Asus-Z370-A-Prime-II.aml
    4.5 KB · Views: 169
  • SSDT-TbtOnPch-Asus-Z370-A.aml
    4.5 KB · Views: 172
  • SSDT-TbtOnPCH-GA-Z170-UD5TH.aml
    4.9 KB · Views: 189
  • SSDT-TbtOnPch-MSI-B360m-MORTAR.aml
    4.9 KB · Views: 142
  • SSDT-TbtOnPch-GA-Z370-Gaming-5.aml
    4.9 KB · Views: 201
  • SSDT-TbtOnPch-Designare-X299-EX.aml
    4.9 KB · Views: 205
  • SSDT-TbtOnPch-Intel-NUC7.aml
    5 KB · Views: 173
  • SSDT-TbtOnPCH-Gigabyte-X99-Designare_EX-FULL.aml
    18.2 KB · Views: 186
  • SSDT-TbtOnPch-Designare-X299-GC-AlpineRidge.aml
    4.9 KB · Views: 132
  • SSDT-TbtOnPch-Asus-Prime-X299-Deluxe-II-AlpineRidge.aml
    4.9 KB · Views: 113
  • SSDT-TbtOnPch-Gigabyte-Z390-GAMING-M.aml
    4.9 KB · Views: 127
  • SSDT-TbtOnPch-GA-X99P-SLI.aml
    5.1 KB · Views: 120
  • SSDT-TbtOnPch-ThinkPad-T480-OC.aml
    4.5 KB · Views: 167
Last edited:
@dgsga,

In order to add your ASRock Z370 to the repository above, can you answer these questions:
  • Is your hot plug event handler _E2C or _E17?
  • What is the ACPI rename (FIND/REPLACE) for changing RP05 --> _INI() to RP05 --> XINI()?
  • What version of BIOS are you running?
 
CaseySJ said:
Some questions:
  • If a TB device is connected before boot, does it remain connected after logging in?
  • Do TB devices reconnect after wake-from-sleep?
  • What is your BIOS version?
Click to expand...

GA-Z170x-UD5 TH, F22g, unmodified (but CFG-Lock and GPIO Force Power have been enabled via grub shell)

So did some more testing this morning. I've removed the IOElectrify.kext because HP is working without it. My findings seem to mirror yours: I can warm and cold boot now and the tree shows up, hotplug works. The whole controller locks up if I boot with a device plugged in. HOWEVER... wake from sleep works (but it takes two key presses to wake from sleep instead of one). I'll try more boots and see what happens...

EDIT: I haven't been using SSDT-DTPG.aml, should I be?
 
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Z490 Vision G |  i9 10900K |  Radeon Nitro+ RX 5700 XT 8GB
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