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[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

** Elias64Fr's Modified Thunderbolt Firmware on my Designare Z390 Test Bench **

It was quite an eventful day, filled with as much volatility as the stock market has experienced in recent days. Today's goal was to determine whether it might be possible to flash the on-board Titan Ridge controller in a reliable and repeatable manner. Conclusion:
  • It remains very difficult to flash the on-board Titan Ridge controller.
  • Perhaps @jb007 might find a workable procedure.
  • Perhaps we'll find a way to extend the time window from 20 seconds to 45 seconds.
Meanwhile, because I bricked my Titan Ridge controller earlier in the day, I had to scramble to find a way to recover. After 2 hours of experimentation, I managed to flash @Elias64Fr's modified firmware to my Designare Test Bench using Raspberry Pi 4 and flashrom at a frequency of 2048 KHz:

sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=2048 -w Z390ModifiedFirmware.bin

After adapting DSM2's SSDT for port RP05 and copying it to the CLOVER/ACPI/patched folder, I am happy to say that on-board Thunderbolt is now working to some degree. It's past 20:00 or 8pm so I'll conduct a battery of tests tomorrow, but for now I'll end with this:

Screen Shot 2020-03-14 at 7.25.00 PM.png
 
Last edited:
@CaseySJ

Hi Casey.

Success! I was right it needed a pull-up to VCC on the /CS pin!
Code:
pi@rp:~ $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1024 -r designare_tb3_rom_1.bin
flashrom  on Linux 4.19.97-v7+ (armv7l)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on linux_spi.
Reading flash... done.
pi@rp:~ $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1024 -r designare_tb3_rom_2.bin
flashrom  on Linux 4.19.97-v7+ (armv7l)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on linux_spi.
Reading flash... done.
pi@rp:~ $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1024 -r designare_tb3_rom_3.bin
flashrom  on Linux 4.19.97-v7+ (armv7l)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on linux_spi.
Reading flash... done.
pi@rp:~ $ sha256sum designare_tb3_rom_1.bin designare_tb3_rom_2.bin designare_tb3_rom_3.bin
a04e3ba987c66c3892aa91b0c338aa40d38cd253a21b28173915417a0d02934b  designare_tb3_rom_1.bin
a04e3ba987c66c3892aa91b0c338aa40d38cd253a21b28173915417a0d02934b  designare_tb3_rom_2.bin
a04e3ba987c66c3892aa91b0c338aa40d38cd253a21b28173915417a0d02934b  designare_tb3_rom_3.bin
pi@rp:~ $

Do you want me to post the bin image privately, or upload to this forum thread?
 
@CaseySJ

I have just make some tests and :
  1. Hotplug is functional with Thunderbolt device (EGPU here) on 2 ports
  2. Hotplug is functional with USB-C device (UGreen External disk USB 3,1 gen 2 with included SSD) on 2 ports
  3. Sleep/Wake is functional with Thunderbolt device and USB-C
  4. Cold boot is functional with both Thunderbolt device and USB-C (and without !)
  5. Warm boot is partially functional .. sometimes I have a black screen but OS is operationnal (I suspect that Lilu and/or Whatevergreen kext files attach properties and GFX0 to the eGPU... to be clarified)
  6. All without Thunderbolt SSDT add-on file !
  7. On Windows 10, only USB-C device is functional :mrgreen:... :mrgreen: :mrgreen:
That's all !! :) ...:p
  • This seems to be a much better result than the full flashed firmware.
  • Are you sure this result is accomplished only by:
    • Patching about 10 bytes.
    • Adding PCI-Thunderbolt to RP05.PXSX and setting its value to NUMBER 0x01?
 
@CaseySJ

Hi Casey.

Success! I was right it needed a pull-up to VCC on the /CS pin!
Code:
pi@rp:~ $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1024 -r designare_tb3_rom_1.bin
flashrom  on Linux 4.19.97-v7+ (armv7l)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on linux_spi.
Reading flash... done.
pi@rp:~ $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1024 -r designare_tb3_rom_2.bin
flashrom  on Linux 4.19.97-v7+ (armv7l)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on linux_spi.
Reading flash... done.
pi@rp:~ $ sudo flashrom -p linux_spi:dev=/dev/spidev0.0,spispeed=1024 -r designare_tb3_rom_3.bin
flashrom  on Linux 4.19.97-v7+ (armv7l)
flashrom is free software, get the source code at https://flashrom.org

Using clock_gettime for delay loops (clk_id: 1, resolution: 1ns).
Found Winbond flash chip "W25Q80.V" (1024 kB, SPI) on linux_spi.
Reading flash... done.
pi@rp:~ $ sha256sum designare_tb3_rom_1.bin designare_tb3_rom_2.bin designare_tb3_rom_3.bin
a04e3ba987c66c3892aa91b0c338aa40d38cd253a21b28173915417a0d02934b  designare_tb3_rom_1.bin
a04e3ba987c66c3892aa91b0c338aa40d38cd253a21b28173915417a0d02934b  designare_tb3_rom_2.bin
a04e3ba987c66c3892aa91b0c338aa40d38cd253a21b28173915417a0d02934b  designare_tb3_rom_3.bin
pi@rp:~ $

Do you want me to post the bin image privately, or upload to this forum thread?
That is a huge relief and amazing work!! Feel free to upload the image to this thread. This is the standard unmodified firmware.

For those like me who don't quite understand: What exactly was necessary to make this work? Can you describe the pull-up resistor in some detail? Can anyone do this?
 
That is a huge relief and amazing work!! Feel free to upload the image to this thread. This is the standard unmodified firmware.

For those like me who don't quite understand: What exactly was necessary to make this work? Can you describe the pull-up resistor in some detail? Can anyone do this?

Yes, sorry it took a while, I have a new logic analyzer and I'm not that familiar with it ATM. I have though captured the whole flash SPI 'transaction' and used the analyzer to decode every byte!

  • I have put a 10K resistor between VCC 3.3V (Pin 8) and the Chip Select /CS (Pin 1). This is to satisfy the requirements as per the attached PDF from Winbond, see pg 11 section 9.2.1 Write Protect Features.
    It states:
    "Upon power-up or at power-down the W25Q80/16/32 will maintain a reset condition while VCC is below the threshold value of VWI, (See Power-up Timing and Voltage Levels and Figure 29). While reset, all operations are disabled and no instructions are recognized. During power-up and after the VCC voltage exceeds VWI, all program and erase related instructions are further disabled for a time delay of tPUW. This includes the Write Enable, Page Program, Sector Erase, Block Erase, Chip Erase and the Write Status Register instructions. Note that the chip select pin (/CS) must track the VCC supply level at power-up until the VCC-min level and tVSL time delay is reached. If needed a pull-up resister on /CS can be used to accomplish this. "
  • I'm not sure if putting a resistor on these pins whilst IC is in circuit will work. It depends on what is controlling the /CS pin. You might have to try a smaller value pull-up resistor to over come what is controlling this pin on the Gigabyte side of things. I'll try and have a look and see if I can figure it out.
10K Resistor.jpg


Time for a cup of tea!
 

Attachments

  • W25Q80_datasheet.pdf
    1.8 MB · Views: 88
  • designare_tb3_rom_1.zip
    263.1 KB · Views: 88
  • This seems to be a much better result than the full flashed firmware.
  • Are you sure this result is accomplished only by:
    • Patching about 10 bytes.
    • Adding PCI-Thunderbolt to RP05.PXSX and setting its value to NUMBER 0x01?
I know Right!
 
In theory this process is doable, but timing is mission critical. I bricked my Thunderbolt controller because of a timing problem, but fortunately (after 2 hours) I managed to recover by using an external flasher.

This procedure is actually quite amazing because it does not require an external flasher. The only issue is timing. Let me explain -- because I totally attempted this a few hours ago and totally messed it up at the final step! :)
  1. First we have replace the standard Thunderbolt SSDT with an extensively modified SSDT that (partially) enables Thunderbolt Bus without the need for flashing BIOS.
  2. We need to boot with a Thunderbolt device connected in order for Thunderbolt Bus to appear.
  3. Thunderbolt devices will stop functioning after about 20 seconds.
  4. The Osy86 tbpatchtool will magically work for those first 20 seconds.
    • This is what we mean by timing is mission critical.
  5. To make full use of those 20 seconds, we can open Terminal and type sudo tbpatch list <ENTER>. An error will appear, but we can ignore it.
  6. Then we quit all applications, but we keep Terminal running.
  7. Now we shutdown. And flip power switch on PSU to OFF for 5-10 seconds. Then reboot.
    • Make sure that you choose to reopen application/Finder windows on reboot.
  8. When system boots up, go ahead and login.
  9. Now you have less than 20 seconds to go to the Terminal window, press up-arrow to retrieve the last command, and press ENTER to run it. Type your admin password and press ENTER.
  10. Now sudo tbpatch list should return valid output.
After this we repeat Steps 5-10, but with a different tbpatch command that modifies less than 10 bytes in firmware. This must also be done within 20 seconds, but if you are even 1 second late, you will brick your Thunderbolt chip. This happened to me 2 hours earlier.

It took a lot of experimentation to flash a working image back to the Designare's Thunderbolt chip. The Raspberry Pi was the only tool that could do it, but after a lot of fiddling. The CH341a did not work. The Reveltronics REVELPROG-IS did not work.

So unless we can enlarge the time window from 20 seconds to about 45-60 seconds, then I cannot recommend this procedure.

The procedure is truly amazing. I was shocked to see that it works! But timing is so very critical that failure rates are going to be very high.


This is what happens when you get the timing off by even 1 second. After this, the Titan Ridge controller was dead.
View attachment 454575
Titan Ridge controller is dead:

View attachment 454576

Is it possible to write a script that executes these stages on startup? Obviously switching off the PSU requires manual input, but some quick googling makes me think that the rest can be done, including giving it admin credentials. Then 20s is more than enough!
 
Just move the MacOS NVMe to M2P and install Windows NVMe into M2M. Then select boot order in BIOS — select macOS as first boot disk. You should be able to boot Windows from Clover Boot Menu if the Windows NVMe has an EFI partition with the Windows boot loader installed there.
So I did just that and I'm happy to let you know that it worked! Now I have Windows and macOS available in Clover menu. The strange thing is there are like 5 or 6 different Windows options (although only one Windows is installed on the SSD), which doesn't affect the functionality, but just doesn't look appealing (if unnecessary options can be hidden, please let me know).

The major issue is I can't see the third SATA SSD (WD Blue 500gb) neither in BIOS, nor in Windows, nor in macOS (I was planning to used this 3rd SSD as a shared drive between all OSs). I've tried several different cables (psu + sata) and all the possible sata ports on the motherboard and SATA ports on PSU, but with no luck. AHCI mode is selected in BIOS. Do you guys think the problem is with the SATA SSD itself (it's brand new)? Or I've missed something during the initial setup?
 
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