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[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

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Gigabyte Designare Z390
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  4. Mac Pro
Mobile Phone
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I use a Sapphire Pulse 5700XT with two DP monitors and have been running Ableton fine for a few weeks now without any apparent lag or delays, in case that helps.

Clover, iMac19,1 with iGPU enabled.
Which of the dual BIOS modes are you using?
 
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My PowerColor Red Dragon (not Red Devil) 5700 XT has been flawless. I do not do Audio/Video editing, however (though I would like to learn Final Cut!).
The card I have problems with is the the Red Devil. The card behaves flawlessly but when u run Valley and open Export window in FCPX.
Did you test it with Valley?
Do you know if Sapphire Pulse are reliable?

I also has random reboots with the Designare but they were due to the CPU Auto voltage being too soft. I selected Fixed Voltage to 1.30 and the boards doesn't reboot. Voltage are soft at low load not high load.
 

RuleBreaker01

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Please remove the build guide from your post. Note the following:
View attachment 449713

Because you're using a Samsung 970 EVO Plus, is it running the latest firmware? The firmware can be checked and updated using Samsung Magician software in Windows. Please see NOTE 5a at the top of Post #1:
View attachment 449715
Ok thank you so much...i will check the firmrware version and get back to you...also i will delete the build post
 
Joined
Aug 27, 2019
Messages
5
Motherboard
Gigabyte Z390 Designare
CPU
i7-8700K
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RX 580
Just updated

Catalina 10.15.3 today,

Some Random Black Screen happen,

Does anyone have this problem or anyone know is it have to do with the Intel UHD 630?


February 14, 2020 5:08 PM

Update, Do Clover again, it seems fine again.

Thanks

1581668117498.png
 
Last edited:
Joined
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Messages
526
Motherboard
Gigabyte Z390 Designare
CPU
i5-9600K
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RX 5700 XT
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  1. iMac
  2. MacBook Pro
  3. Mac mini
Hello @Elias64Fr,

Here's Part 1:
ACPI Debug Log showing register values at the start of ICMB and again at the end of ICMB. The value of XH00 may not be correct. I obtained it like this:

(a) Created "Case (0x09)" in MMBA:

View attachment 449724

(b) Added XHCM registers:
View attachment 449723
Code:
ICMB START — COLD BOOT

2020-02-13  ACPIDebug: { "R_18 =", 0x0, }
2020-02-13  ACPIDebug: { "R_19 =", 0x6, }
2020-02-13  ACPIDebug: { "R_1A =", 0x70, }
2020-02-13  ACPIDebug: { "R_1C =", 0xf0, }
2020-02-13  ACPIDebug: { "R_20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "R_24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "R_28 =", 0x60, }
2020-02-13  ACPIDebug: { "R_2C =", 0x60, }
2020-02-13  ACPIDebug: { "UP18 =", 0x6, }
2020-02-13  ACPIDebug: { "UP19 =", 0x7, }
2020-02-13  ACPIDebug: { "UP1A =", 0x70, }
2020-02-13  ACPIDebug: { "UP1C =", 0x1f1, }
2020-02-13  ACPIDebug: { "UP20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "UP24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "UP28 =", 0x60, }
2020-02-13  ACPIDebug: { "UP2C =", 0x60, }
2020-02-13  ACPIDebug: { "DP18 =", 0x7, }
2020-02-13  ACPIDebug: { "DP19 =", 0x8, }
2020-02-13  ACPIDebug: { "DP1A =", 0x8, }
2020-02-13  ACPIDebug: { "DP1C =", 0x1f1, }
2020-02-13  ACPIDebug: { "DP20 =", 0x82008200, }
2020-02-13  ACPIDebug: { "DP24 =", 0x1fff1, }
2020-02-13  ACPIDebug: { "DP28 =", 0x0, }
2020-02-13  ACPIDebug: { "DP2C =", 0x0, }
2020-02-13  ACPIDebug: { "D418 =", 0x7, }
2020-02-13  ACPIDebug: { "D419 =", 0x3c, }
2020-02-13  ACPIDebug: { "D41A =", 0x3c, }
2020-02-13  ACPIDebug: { "D41C =", 0x1f1, }
2020-02-13  ACPIDebug: { "D420 =", 0x6bf06bf0, }
2020-02-13  ACPIDebug: { "D424 =", 0x1fff1, }
2020-02-13  ACPIDebug: { "D428 =", 0x0, }
2020-02-13  ACPIDebug: { "D42C =", 0x0, }
2020-02-13  ACPIDebug: { "D518 =", 0x7, }
2020-02-13  ACPIDebug: { "D519 =", 0x3d, }
2020-02-13  ACPIDebug: { "D51A =", 0x70, }
2020-02-13  ACPIDebug: { "D51C =", 0x1f1, }
2020-02-13  ACPIDebug: { "D520 =", 0x81f06c00, }
2020-02-13  ACPIDebug: { "D524 =", 0x49f12001, }
2020-02-13  ACPIDebug: { "D528 =", 0x60, }
2020-02-13  ACPIDebug: { "D52C =", 0x60, }
2020-02-13  ACPIDebug: { "DVES =", 0x130004, }
2020-02-13  ACPIDebug: { "NH00- Read VID/DID =", 0x15eb8086, }
2020-02-13  ACPIDebug: { "XH00- Read VID/DID =", 0xffffffff, }
2020-02-13  ACPIDebug: { "NH10 =", 0x82000000, }
2020-02-13  ACPIDebug: { "NH14 =", 0x82040000, }


ICMB START — WARM BOOT

2020-02-13  ACPIDebug: { "R_18 =", 0x0, }
2020-02-13  ACPIDebug: { "R_19 =", 0x6, }
2020-02-13  ACPIDebug: { "R_1A =", 0x70, }
2020-02-13  ACPIDebug: { "R_1C =", 0xf0, }
2020-02-13  ACPIDebug: { "R_20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "R_24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "R_28 =", 0x60, }
2020-02-13  ACPIDebug: { "R_2C =", 0x60, }
2020-02-13  ACPIDebug: { "UP18 =", 0x6, }
2020-02-13  ACPIDebug: { "UP19 =", 0x7, }
2020-02-13  ACPIDebug: { "UP1A =", 0x70, }
2020-02-13  ACPIDebug: { "UP1C =", 0x1f1, }
2020-02-13  ACPIDebug: { "UP20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "UP24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "UP28 =", 0x60, }
2020-02-13  ACPIDebug: { "UP2C =", 0x60, }
2020-02-13  ACPIDebug: { "DP18 =", 0x7, }
2020-02-13  ACPIDebug: { "DP19 =", 0x8, }
2020-02-13  ACPIDebug: { "DP1A =", 0x8, }
2020-02-13  ACPIDebug: { "DP1C =", 0x1f1, }
2020-02-13  ACPIDebug: { "DP20 =", 0x82008200, }
2020-02-13  ACPIDebug: { "DP24 =", 0x1fff1, }
2020-02-13  ACPIDebug: { "DP28 =", 0x0, }
2020-02-13  ACPIDebug: { "DP2C =", 0x0, }
2020-02-13  ACPIDebug: { "D418 =", 0x7, }
2020-02-13  ACPIDebug: { "D419 =", 0x3c, }
2020-02-13  ACPIDebug: { "D41A =", 0x3c, }
2020-02-13  ACPIDebug: { "D41C =", 0x1f1, }
2020-02-13  ACPIDebug: { "D420 =", 0x6bf06bf0, }
2020-02-13  ACPIDebug: { "D424 =", 0x1fff1, }
2020-02-13  ACPIDebug: { "D428 =", 0x0, }
2020-02-13  ACPIDebug: { "D42C =", 0x0, }
2020-02-13  ACPIDebug: { "D518 =", 0x7, }
2020-02-13  ACPIDebug: { "D519 =", 0x3d, }
2020-02-13  ACPIDebug: { "D51A =", 0x70, }
2020-02-13  ACPIDebug: { "D51C =", 0x1f1, }
2020-02-13  ACPIDebug: { "D520 =", 0x81f06c00, }
2020-02-13  ACPIDebug: { "D524 =", 0x49f12001, }
2020-02-13  ACPIDebug: { "D528 =", 0x60, }
2020-02-13  ACPIDebug: { "D52C =", 0x60, }
2020-02-13  ACPIDebug: { "DVES =", 0x130004, }
2020-02-13  ACPIDebug: { "NH00- Read VID/DID =", 0x15eb8086, }
2020-02-13  ACPIDebug: { "XH00- Read VID/DID =", 0xffffffff, }
2020-02-13  ACPIDebug: { "NH10 =", 0x82000000, }
2020-02-13  ACPIDebug: { "NH14 =", 0x82040000, }


ICMB END

2020-02-13  ACPIDebug: { "R_18 =", 0x0, }
2020-02-13  ACPIDebug: { "R_19 =", 0x6, }
2020-02-13  ACPIDebug: { "R_1A =", 0x70, }
2020-02-13  ACPIDebug: { "R_1C =", 0xf0, }
2020-02-13  ACPIDebug: { "R_20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "R_24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "R_28 =", 0x60, }
2020-02-13  ACPIDebug: { "R_2C =", 0x60, }
2020-02-13  ACPIDebug: { "UP18 =", 0x6, }
2020-02-13  ACPIDebug: { "UP19 =", 0x7, }
2020-02-13  ACPIDebug: { "UP1A =", 0x70, }
2020-02-13  ACPIDebug: { "UP1C =", 0x1f1, }
2020-02-13  ACPIDebug: { "UP20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "UP24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "UP28 =", 0x60, }
2020-02-13  ACPIDebug: { "UP2C =", 0x60, }
2020-02-13  ACPIDebug: { "DP18 =", 0x7, }
2020-02-13  ACPIDebug: { "DP19 =", 0x8, }
2020-02-13  ACPIDebug: { "DP1A =", 0x8, }
2020-02-13  ACPIDebug: { "DP1C =", 0x1f1, }
2020-02-13  ACPIDebug: { "DP20 =", 0x82005400, }
2020-02-13  ACPIDebug: { "DP24 =", 0x49f10001, }
2020-02-13  ACPIDebug: { "DP28 =", 0x60, }
2020-02-13  ACPIDebug: { "DP2C =", 0x60, }
2020-02-13  ACPIDebug: { "D418 =", 0x7, }
2020-02-13  ACPIDebug: { "D419 =", 0x3c, }
2020-02-13  ACPIDebug: { "D41A =", 0x3c, }
2020-02-13  ACPIDebug: { "D41C =", 0x101, }
2020-02-13  ACPIDebug: { "D420 =", 0x0, }
2020-02-13  ACPIDebug: { "D424 =", 0x10001, }
2020-02-13  ACPIDebug: { "D428 =", 0x0, }
2020-02-13  ACPIDebug: { "D42C =", 0x0, }
2020-02-13  ACPIDebug: { "D518 =", 0x7, }
2020-02-13  ACPIDebug: { "D519 =", 0xa, }
2020-02-13  ACPIDebug: { "D51A =", 0xa, }
2020-02-13  ACPIDebug: { "D51C =", 0x101, }
2020-02-13  ACPIDebug: { "D520 =", 0x0, }
2020-02-13  ACPIDebug: { "D524 =", 0x10001, }
2020-02-13  ACPIDebug: { "D528 =", 0x0, }
2020-02-13  ACPIDebug: { "D52C =", 0x0, }
2020-02-13  ACPIDebug: { "DVES =", 0x0, }
2020-02-13  ACPIDebug: { "NH00- Read VID/DID =", 0x15eb8086, }
2020-02-13  ACPIDebug: { "XH00- Read VID/DID =", 0xffffffff, }
2020-02-13  ACPIDebug: { "NH10 =", 0x54000000, }
2020-02-13  ACPIDebug: { "NH14 =", 0x54040000, }
Part 2: BIOS Images
View attachment 449716 View attachment 449717 View attachment 449718 View attachment 449719 View attachment 449720 View attachment 449721 View attachment 449722
Hi @CaseySJ

Thanks for theses informations,
this suggest that NHI0 is correctly preconfigured by BIOS and visible by our SSDT (right PID/VID on NHI0).
About XHC, it doesn't matter, this is not required at first boot time to make macOS driver connexion and list all parts of ThunderboltSwitch. Devices from RP05 to NHI0 are required to make this connexion possible at boot.

That I can see on BIOS screenshot, there is pretty much setting available (nice for different kind of devices compatibility) in contrast with my Asus Maximus board (limited to one page on last firmware, probably by Asus rules).

I can see that Thunderbolt Boot support parameter is OFF, have you tried by changing to ON ?

About ASPM, I don't see any ASPM related parameters (with possible value on L0s, L1 state or both) except Power loading that is set to Auto.
 

CaseySJ

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Hi @CaseySJ

Thanks for theses informations,
this suggest that NHI0 is correctly preconfigured by BIOS and visible by our SSDT (right PID/VID on NHI0).
About XHC, it doesn't matter, this is not required at first boot time to make macOS driver connexion and list all parts of ThunderboltSwitch. Devices from RP05 to NHI0 are required to make this connexion possible at boot.

That I can see on BIOS screenshot, there is pretty much setting available (nice for different kind of devices compatibility) in contrast with my Asus Maximus board (limited to one page on last firmware, probably by Asus rules).

I can see that Thunderbolt Boot support parameter is OFF, have you tried by changing to ON ?

About ASPM, I don't see any ASPM related parameters (with possible value on L0s, L1 state or both) except Power loading that is set to Auto.
Hello @Elias64Fr,

ASPM parameters are listed under Platform Power Management. We have:
  • PEG ASMP
  • PCH ASPM
  • DMI ASPM
200214111858.jpg

I've just tried Thunderbolt Boot Support --> Boot Once, but same result as before!

200214111935.jpg
 
Joined
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Not yet, maybe after next week (holiday), but so far NDK 0.5.4 works great, so I might just stick with this for now
Same here, but I was curious and created a separate USB Boot with OC 0.5.6 (NDK and regular). I can't get the config.plist to work. Things are changing.
 
Joined
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z390 designare
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Vega 64
Hi guys,

Ok the hack is awesome, just one little thing, TB3 port:
I have power (when attach iphone)
Iphone not showing up in finder (it does when connect via USB)

I presume the TB3 port is getting power but otherwise non functional

Here's what I've done:
-reset bios from scratch with optimized defaults and ensured I have the following as per a prior post of yours, Casey:
  • BIOS --> Thunderbolt Security --> No Security
  • BIOS --> Thunderbolt --> GPIO3 Force Pwr --> Enabled
  • And these two SSDTs that belong in the CLOVER/ACPI/patched folder:
    • SSDT-Z390-DESIGNARE-TB3HP-V4.aml
    • SSDT-DTPG.aml
My system report indicates the the Titan Ridge TB3 NHI is active, along with Titan Ridge USB-C.

Any further troubleshooting? I will attach my config file.

Thanks in advance, I am still in awe that I am up and running so soon with just a minor hiccup.
 

Attachments

  • config.plist
    8.1 KB · Views: 52
Joined
Jan 1, 2020
Messages
526
Motherboard
Gigabyte Z390 Designare
CPU
i5-9600K
Graphics
RX 5700 XT
Mac
  1. iMac
  2. MacBook Pro
  3. Mac mini
Hello @Elias64Fr,

ASPM parameters are listed under Platform Power Management. We have:
  • PEG ASMP
  • PCH ASPM
  • DMI ASPM
View attachment 449745

I've just tried Thunderbolt Boot Support --> Boot Once, but same result as before!

View attachment 449746
@CaseySJ
OK ! all ASPM BIOS settings are OFF state .. then have you still, under IORegExplorer, pci-aspm-default property under RP05 to NHI0, with non-zero value ?
If still different from Zero, I should directly change this incorrect state under related register.

This should be disabled like on all rMac.
The following screenshots are about MacMini8,1 (2018 model) which include two Titan ridge controllers on PEG1 and PEG2, I highlights all probably required parameters and then are different from your LSPCI datas.

Capture d’écran 2020-02-14 à 13.23.56.png

Capture d’écran 2020-02-14 à 14.09.52.png

Capture d’écran 2020-02-14 à 14.16.54.png

Capture d’écran 2020-02-14 à 14.19.55.png
 
Last edited:
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