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[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

Very nice !

You can inject ThunderboltDROM property:
71000000 000000ED 00E04034 98016900 ED0008C0 01010881 80028000 00000882 90018000 00000883 80048001 00000884 90038001 00000585 50000005 86500000 02C70B88 20010064 00000000 00038980 058A5040 00058B50 40000B01 47494741 42595445 0011025A 33393020 44455349 474E4152 4500

It seem that port 7 is used for IOThunderboltSwitchType3 !

UPDATE:
Z390 Designare (TitanRidge):

71 >> CRC
00 00 00 00 00 00 ED 00 >> UID SwitchType3: ED000000000000
E0 >> CRC
40 34 98 01 69 00 ED 00 >> To be defined
08 C0 01 01 >> To be defined
08 81 80 02 80 00 0000 >> TBPort1 DualLinkport2 HPMAddr0
08 82 90 01 80 00 0000 >> TBPort2 DualLinkport1 HPMAddr0
08 83 80 04 80 01 0000 >> TBPort3 DualLinkport4 HPMAddr1
08 84 90 03 80 01 0000 >> TBPort4 DualLinkport3 HPMAddr1
05 85 50 00 00 >> TBPort5 DisplayPort Adapter
05 86 50 00 00 >> TBPort6 DisplayPort Adapter
02 C7 >> TBSwitch7
0B 88 20 01 00 64 00 00 00 00 00 >> TBPort8 PCI Down Adapter DSB1
03 89 80 >> TBPort9 PCI Down Adapter DSB4
05 8A 50 40 00 >> TBPortA DisplayPort Adapter
05 8B 50 40 00 >> TBPortB DisplayPort Adapter
0B 01 47 49 47 41 42 59 54 45 00 GIGABYTE
11 02 5A 33 39 30 20 44 45 53 49 47 4E 41 52 45 00 Z390 DESIGNARE

Analyzed for long time :crazy: !
I haven’t examined the ROM file any further yet (out of the house now), so some questions:
  • Are these bytes extracted from the ROM file?
  • Should Thunderbolt DROM be injected via Clover/SSDT or patched into the Winbond chip directly?
  • When you say that Port 7 is used for IOThunderboltSwitchType3, does that mean we can modify SSDT-TbtOnPch or ...? Just trying to understand the practical implications of this!
Update:
My mistake: You are simply explaining the various components of TB DROM. Decoding each byte of DROM. Very nice! I’ll inject this via Clover or SSDT this evening.
 
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I haven’t examined the ROM file any further yet (out of the house now), so some questions:
  • Are these bytes extracted from the ROM file?
  • Should Thunderbolt DROM be injected via Clover/SSDT or patched into the Winbond chip directly?
  • When you say that Port 7 is used for IOThunderboltSwitchType3, does that mean we can modify SSDT-TbtOnPch or ...? Just trying to understand the practical implications of this!
@CaseySJ,

  • Yes I just have extracted them from your file !
  • Sure ! I have done it but I noted that is not required for Full Thunderbolt Tree, I hadn't any properties on my first post as viewing on IOReg screenshot https://www.tonymacx86.com/threads/...olt-3-i7-9700k-amd-rx-580.267551/post-2053308
  • No, TBSwitch populating is done by driver after correct configuration .. maybe by CRMW written data but that's unverified and pure speculation ! Current data (Mine and Designare testing files) have been extracted from iMac SSDT-TbtOnPch and I don't know what it mean. More search on Github opensource code for Thunderbolt feature is required.
 
Last edited:
@Elias64Fr

Previously I gave you a modified DSDT for Designare Z390 instead of the original DSDT. In case it makes any difference, attached are all of the original unmodified ACPI tables (from firmware version F8).
 

Attachments

  • Designare Z390 Original ACPI Tables.zip
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@Elias64Fr

Previously I gave you a modified DSDT for Designare Z390 instead of the original DSDT. In case it makes any difference, attached are all of the original unmodified ACPI tables (from firmware version F8).
Thanks ! I had ever extracted them from Z390 Designare BIOS firmware from available on Gigabyte website ;)
 
Wouldn't it make more sense to look at the SSDT from the new Macpro7.1? @Elias64Fr
Apple has both TbtOnPch and TbtOnPci depending on the Mac model. We're specifically looking for TbtOnPch, so if either iMac19,1 or MacPro7,1 has this then we can examine and borrow from it. However, all of these SSDTs are also contained in the Apple firmware.bin files.
 
Where did you get this data from if it is not a secret?
 
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