[SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

[Elias64Fr]

Update:

• I dumped the original DSDT and changed only RP05._INI to RP05.XINI. Also changed _E17 to XE17.
• Copied TbtOnPch-Designare-Draft03 to the CLOVER/ACPI/patched folder.
• Copied ACPIDebug.kext to /Library/Extensions.
• Shutdown the system. Disconnected all Thunderbolt devices. Flipped power switch to OFF for 10 seconds.
  • This is a cold start.
• Restarted the system with no Thunderbolt devices.
• The modified DSDT and all SSDTs loaded with no problem. 16 ACPI tables successfully loaded.
• ACPIDebug log looks like this:
  View attachment 445744
• RP05 looks like this:
  View attachment 445745

GREAT !

I have similar log data :

But I don't see all data on ur log with CIOR, COIR CIOR and CRMW ..can you send me TXT boot file.

Added: and reboot one time

Seem to be a great step for Titan ridge full view !

 

[CaseySJ]

GREAT !

I have similar log data :

View attachment 445747

But I don't see all data on ur log with CIOR, COIR and CRMW ..can you send me TXT boot file.

Seem to be a great step for Titan ridge full view !

Sure, please see attached. My log does not contain "Put upstream bridge back into D0". This log is after one reboot.

 

[CaseySJ]

@Elias64Fr

Are you an ACPI or Firmware engineer? You seem to be very knowledgeable about this!

 

[pitt1717]

You guys are crazy, and this is so interesting. I wish I knew how to do all this. Can I ask a question? Does this need to be done for each new BIOS?
So, Casey, if you're on f8, and I'm on f9b, as an example, and I use your DDST/SSDT, would I be missing feature, or possibly introduce issues?

 

[digumo]

you guys are crazy and this is so interesting. wish I knew how to do all this..... can I ask a qq? Does this need to be done for each new bios?
so Casey, if your on f8 and I'm on f9b as an example and I use your ddst/ssdt would I be missing feature, or possibly introduce issues?

I'm no hardware engineer, and I also binge consume this thread more than I do a Netflix series, but, if I had to guess, hardware is hardware in terms of it's addresses, and the changes they are making is independent of BIOS since ACPI seeks to give control to the operating system. Read up about ACPI here.

But, I'm sure I'll be corrected if I'm wrong...

 

[Elias64Fr]

@Elias64Fr

Are you an ACPI or Firmware engineer? You seem to be very knowledgeable about this!

Thanks but No !

Right ! Lines from "UPSB AMPE" line to "Put upstream bridge back into D0" are missed.

Interesting log end with >> (ACPIDebug) ACPIDebug: "_PS0 UPSB""
We should have >> ACPIDebug: "PCED UPSB" and the rest just after but .. nothing, seem to be an ACPIDebug overloaded memory OR
_PS0 method call directly PCED in case of OSDW = One ! Maybe a little pb with OSDW

 

[CaseySJ]

Thanks but No !

Right ! Lines from "UPSB AMPE" line to "Put upstream bridge back into D0" are missed.

Interesting log end with >> (ACPIDebug) ACPIDebug: "_PS0 UPSB""
We should have >> ACPIDebug: "PCED UPSB" and the rest just after but .. nothing, seem to be an ACPIDebug overloaded memory OR
_PS0 method call directly PCED in case of OSDW = One ! Maybe a little pb with OSDW

Because TbtOnPch-Designare-Draft03 contains OSDW, I deleted my version of OSDW before using Draft03.

 

[CaseySJ]

... I also binge consume this thread more than I do a Netflix series...

LOL!!

 

[Elias64Fr]

Because TbtOnPch-Designare-Draft03 contains OSDW, I deleted my version of OSDW before using Draft03.

Can u try this one ! I have simplified OSDW without using OSYS variable .. Later I will remove all OSDW calls on the SSDT

 

[Elias64Fr]

You can use Hackintool for log filtering >> Logs section >> System >> Contains completed with "ACPIDebug" and finally Refresh