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[Success] AMD RX6000 Series working in macOS

@dclive
You are right, I haven't noticed the extra space before .aml, thanks.
So maybe fixing the SSDT-BRG0 name and path is enough.
My guess was also that device-id and model are the only mandatory properties.
 
Thanks, I know that your modified config.plist has fixed the issue of @Luisimpreza 6900 XTXH.
I've checked the changes that you have made and they are few, all of them in the dGPU DeviceProperties section.

Where Luis had
XML:
            <key>PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)</key>
            <dict>
                <key>device-id</key>
                <data>v3MAAA==</data>
                <key>model</key>
                <string>Radeon RX 6900 XT (XTXH)</string>
            </dict>
You propose
XML:
            <key>PciRoot(0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)</key>
            <dict>
                <key>ATY,Copyright</key>
                <string>AMD</string>
                <key>ATY,DeviceName</key>
                <string>RX 6900 XT</string>
                <key>ATY,FamilyName</key>
                <string>Radeon</string>
                <key>device-id</key>
                <data>v3MAAA==</data>
                <key>disable-agdc</key>
                <data>AQAAAA==</data>
                <key>model</key>
                <string>AMD RX 6900 XT</string>
            </dict>

It's hard to believe that adding ATY,Copyright, ATY,DeviceName and ATY,FamilyName will fix the problem. But it is indeed so, at least in this case.

Regarding the other added property, disable-agdc, I have a question: this property applies to Intel iGPUs and thanks to it some users have solved problems when having connected more than 1 monitor 4k. But in a Rocket Lake CPU like Luis's, whose iGPU is disabled in BIOS or at least not recognized by macOS, what use can it have?

Anyway, your config.plist is working fine spoofing the 6900 XTXH as XTX.
yes just noticed the disable-agdc it needs to be removed. and yes is brgo ssdt was not been seen. so for safe measure is brgo ssdt was deleted and replaced with mine which is the same and copied my device properties
glad its working
 
Hello Guys ...Help ..is needed i got a 6650 xt the sapphire model , and i have been trying to get it to work ,with no luck the process seems simple enough, i think i am doing things correctly but its stubbornly refuses to work
1.I have determined that the pci bridge path in SSDT -BRG0 should be _SB.PC00.PEG1.PEGP i i have also double checked on windows
2.placed SSDT -BRG0.aml in ACPI folder ,then i have inserted the required values in config.plist in two different ways and both failed
once i did it with proper tree -->saved -->oc snapshot
and once i dragged and dropped the SSDT -BRG0.aml from the ACPI folder to the ACPI tab in OCC and also instereted the values in DP tab
i cant see what i am doing wrong ,if anybody can help ,plesae do ,also Happy New Year !
 

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  • Screenshot 2023-01-01 at 5.06.04 PM.png
    Screenshot 2023-01-01 at 5.06.04 PM.png
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All your other AML files have an AML extension; this one doesn’t. Why is that?
 
@Nikos87
As @dclive says, you have missed the .aml extension for SSDT-BRG0.
 
It's cosmetic/a red herring!

MaciASL will not automatically add the .aml extension if you edit an SSDT's name. The SSDT-BRG0 table is still read as an ACPI Machine Language Binary.
 
The SSDT-SBG0 is set to use _SB.PC00.PEG1.PEGP

The gfxutil entry shows the RX 6650 XT as follows:

Screenshot 2023-01-01 at 20.29.25.png


Don't you need to take in to account the pci-bridge@0 section, which goes before the GFX0 part of the path to get the full path?

Corpnewt's SSDTTime has an option for discovering PCI-Bridge entries, did you try using that option to discover the full path?

You have cut off the end of the path in the IOReg screenshot, by overlaying another screen on the end of the GPU path, so we can't tell what else might be required. We can only assume it shows the same entries as gfxutil.

Screenshot 2023-01-01 at 20.30.03.png


Show us how you have the SSDT-SBG0 listed in your config.plist.
  • Your description of how you added the SSDT to the config doesn't sound correct, i.e. you saved the config before undertaking the OC Clean Snapshot.
  • I would always undertake the OC Clean Snapshot in ProperTree and then save the revised config.plist.
 
I would always undertake the OC Clean Snapshot in ProperTree and then save the revised config.plist.

hey Guys thank you all for replying! I tried doing the snapshot and then saving and also something I saw somewhere on a another post adding agdpmod=pikera -radcodec in boot args under NVRAM
I don’t know which one did it but it is now working!!
 
The agdpmod=pikera boot argument fixed the issue.

The other boot argument can be removed, as it is a fix for DVI connector problems that affected older AMD GPU’s.
 
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