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SSDT generation script (Ivybridge PM)

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@Francis,

Perfect. Thank you. And we'll soon demonstrate that anything lower than 1600 MHz for most desktop CPU's is unsupported. We're also going to show people what (package/core) C-States were used, and for how long.

@mikeymartinez,

Can you please copy the output of the script and put it in your post? Thanks!

@oswaldini,

Great idea. In fact. It's already on our todo list. Thanks!
 
Joined
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Ud5h gigabyte
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i7 3770k
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hey pike this is what i get

Last login: Tue Feb 19 11:38:53 on ttys000
localhost:~ mikey$ /Users/mikey/ssdtPRGen.command ; exit;


sdtPRGen.sh v4.1 Copyright (c) 2013 by Pike R. Alpha
----------------------------------------------------------------
Generating SSDT.dsl for a Macmini6,2 [Mac-F65AE981FFA204ED]
Ivy Bridge Core i7-3770K processor [0x0701] setup
Using a maximum TDP of 77 Watt, as specified by Intel
Number logical CPU's: 8 (Core Frequency: 3500 MHz)
Number of Turbo States: 4 (3600-3900 MHz)
Number of P-States: 24 (1600-3900 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Injected C-States for CPU1 (C1,C2,C3)


IASL not found. Downloading iasl...
Password:
% Total % Received % Xferd Average Speed Time Time Time Current
Dload Upload Total Spent Left Speed
0 1132k 0 0 0 0 0 0 --:--:-- 0:00:01 --:--:-- 0Warning: Failed to create the file /usr/local/bin/iasl: No such file or
Warning: directory
0 1132k 0 7430 0 0 6180 0 0:03:07 0:00:01 0:03:06 10830
curl: (23) Failed writing body (0 != 7430)
chmod: /usr/local/bin/iasl: No such file or directory
Done.
/Users/mikey/ssdtPRGen.command: line 1442: /usr/local/bin/iasl: No such file or directory
logout
 
Joined
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271
Motherboard
Mac mini
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i[5/7]
Graphics
HD[3/4]000
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hey pike this is what i get

sdtPRGen.sh v4.1 Copyright (c) 2013 by Pike R. Alpha
...
Can you please try the latest version of the script, because v4.1 is kind of old already. All you need to do is to remove ~/ssdtPRGen.command and run the app (the one with the icon) twice. That should give you a different kind of output. If not, we have work to do.

p.s. Do you have this folder or not: /usr/local/bin/ (do a ls -al /usr/local/bin/ in a terminal window)

Thanks!
 
Joined
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Messages
138
Motherboard
Asus P8B-WS / 2106 Patched Bios
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Xeon E3-1230V2
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  1. Mac Pro
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  1. Quadra
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And we'll soon demonstrate that anything lower than 1600 MHz for most desktop CPU's is unsupported. We're also going to show people what (package/core) C-States were used, and for how long.

I use the latest bios for my rig and even disabling EIST and C1E/C3/C6 report I get Speedstep with Macmini6,2 configuration: 16 21 27 33 35 36 37. So I am reasonably sure that the ssdt and PM is ok. :)

It seems to confirm that the Base clock for the Xeon is truly 1600 MHz: whatever settings I choose in bios, proc frequency is reported by the bios as 1600-3300, never lower.

However, if I disable turbo in bios, speedstep is only 16 21 27 33, no turbo states even if they are listed in the SSDT.
Is it normal ?
 
Joined
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Messages
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Motherboard
Ud5h gigabyte
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hd4000
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hey guys finally got the ssdt to generate get pretty good states. now tho my system is a little slow non responsive got to silent kernel panic just froze mostly when im multi tasking i was listenning to music and running geekbench and the other just browsing and music it has to do with me changing over from mac pro 3,1 to mm6 any suggestions
 
Joined
Jan 19, 2013
Messages
271
Motherboard
Mac mini
CPU
i[5/7]
Graphics
HD[3/4]000
Mac
Classic Mac
Mobile Phone
hey guys finally got the ssdt to generate get pretty good states. now tho my system is a little slow non responsive got to silent kernel panic just froze mostly when im multi tasking i was listenning to music and running geekbench and the other just browsing and music it has to do with me changing over from mac pro 3,1 to mm6 any suggestions
Let's start by adding the output (aka log) of the updated script (see my previous reply to you).



@Francis,Yes. AppleIntelCPUPowerManagement.kext checks the MSR to see if EIST and/or turbo is enabled/disabled (some processors don't support turbo so they have to check this).
 
Joined
Jan 20, 2013
Messages
33
Motherboard
Ud5h gigabyte
CPU
i7 3770k
Graphics
hd4000
Mac
Classic Mac
Mobile Phone
hey this pike thanks for your help this is the output of the code.



/*
* Intel ACPI Component Architecture
* AML Disassembler version 20130210-00 [Feb 10 2013]
* Copyright (c) 2000 - 2013 Intel Corporation
*
* Original Table Header:
* Signature "SSDT"
* Length 0x0000036A (874)
* Revision 0x01
* Checksum 0x00
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00004100 (16640)
* Compiler ID "INTL"
* Compiler Version 0x20130210 (538116624)
*/


DefinitionBlock ("SSDT_PR.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00004100)
{
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU2, DeviceObj)
External (\_PR_.CPU3, DeviceObj)
External (\_PR_.CPU4, DeviceObj)
External (\_PR_.CPU5, DeviceObj)
External (\_PR_.CPU6, DeviceObj)
External (\_PR_.CPU7, DeviceObj)


Store ("ssdtPRGen.sh v4.1", Debug)
Store ("baseFrequency : 1600", Debug)
Store ("frequency : 3500", Debug)
Store ("logicalCPUs : 8", Debug)
Store ("tdp : 77", Debug)
Store ("packageLength : 31", Debug)
Store ("turboStates : 11", Debug)
Store ("maxTurboFrequency: 4600", Debug)


Scope (\_PR.CPU0)
{
Name (APLF, 0x08)
Name (APSN, 0x0C)
Name (APSS, Package (0x28)
{
/* Workaround for Ivy Bridge PM bug */
Package (0x06) { 0x11F9, 0x012CC8, 0x0A, 0x0A, 0x2F00, 0x2F00 },
/* High Frequency Modes (turbo) */
Package (0x06) { 0x11F8, 0x012CC8, 0x0A, 0x0A, 0x2E00, 0x2E00 },
Package (0x06) { 0x1194, 0x012CC8, 0x0A, 0x0A, 0x2D00, 0x2D00 },
Package (0x06) { 0x1130, 0x012CC8, 0x0A, 0x0A, 0x2C00, 0x2C00 },
Package (0x06) { 0x10CC, 0x012CC8, 0x0A, 0x0A, 0x2B00, 0x2B00 },
Package (0x06) { 0x1068, 0x012CC8, 0x0A, 0x0A, 0x2A00, 0x2A00 },
Package (0x06) { 0x1004, 0x012CC8, 0x0A, 0x0A, 0x2900, 0x2900 },
Package (0x06) { 0x0FA0, 0x012CC8, 0x0A, 0x0A, 0x2800, 0x2800 },
Package (0x06) { 0x0F3C, 0x012CC8, 0x0A, 0x0A, 0x2700, 0x2700 },
Package (0x06) { 0x0ED8, 0x012CC8, 0x0A, 0x0A, 0x2600, 0x2600 },
Package (0x06) { 0x0E74, 0x012CC8, 0x0A, 0x0A, 0x2500, 0x2500 },
Package (0x06) { 0x0E10, 0x012CC8, 0x0A, 0x0A, 0x2400, 0x2400 },
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x0DAC, 0x012CC8, 0x0A, 0x0A, 0x2300, 0x2300 },
Package (0x06) { 0x0D48, 0x0120E0, 0x0A, 0x0A, 0x2200, 0x2200 },
Package (0x06) { 0x0CE4, 0x01152F, 0x0A, 0x0A, 0x2100, 0x2100 },
Package (0x06) { 0x0C80, 0x0109B4, 0x0A, 0x0A, 0x2000, 0x2000 },
Package (0x06) { 0x0C1C, 0x00FE6F, 0x0A, 0x0A, 0x1F00, 0x1F00 },
Package (0x06) { 0x0BB8, 0x00F35F, 0x0A, 0x0A, 0x1E00, 0x1E00 },
Package (0x06) { 0x0B54, 0x00E884, 0x0A, 0x0A, 0x1D00, 0x1D00 },
Package (0x06) { 0x0AF0, 0x00DDDD, 0x0A, 0x0A, 0x1C00, 0x1C00 },
Package (0x06) { 0x0A8C, 0x00D36A, 0x0A, 0x0A, 0x1B00, 0x1B00 },
Package (0x06) { 0x0A28, 0x00C92B, 0x0A, 0x0A, 0x1A00, 0x1A00 },
Package (0x06) { 0x09C4, 0x00BF1F, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x00B546, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x00AB9F, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x00A229, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x0098E6, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x008FD3, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x0086F1, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x007E3F, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x0075BD, 0x0A, 0x0A, 0x1100, 0x1100 },
/* Low Frequency Mode */
Package (0x06) { 0x0640, 0x006D6A, 0x0A, 0x0A, 0x1000, 0x1000 },
Package (0x06) { 0x05DC, Zero, 0x0A, 0x0A, 0x0F00, 0x0F00 },
Package (0x06) { 0x0578, Zero, 0x0A, 0x0A, 0x0E00, 0x0E00 },
Package (0x06) { 0x0514, Zero, 0x0A, 0x0A, 0x0D00, 0x0D00 },
Package (0x06) { 0x04B0, Zero, 0x0A, 0x0A, 0x0C00, 0x0C00 },
Package (0x06) { 0x044C, Zero, 0x0A, 0x0A, 0x0B00, 0x0B00 },
Package (0x06) { 0x03E8, Zero, 0x0A, 0x0A, 0x0A00, 0x0A00 },
Package (0x06) { 0x0384, Zero, 0x0A, 0x0A, 0x0900, 0x0900 },
Package (0x06) { 0x0320, Zero, 0x0A, 0x0A, 0x0800, 0x0800 }
})


Method (ACST, 0, NotSerialized)
{
Store ("CPU0 C-States : 13", Debug)


/* Low Power Modes for CPU0 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},


Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},


Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}


Method (_DSM, 4, NotSerialized)
{
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}


Return (Package (0x02)
{
"plugin-type",
One
})
}
}


Scope (\_PR.CPU1)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Store ("CPU1 C-States : 7", Debug)


/* Low Power Modes for CPU1 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},


Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},


Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}


Scope (\_PR.CPU2)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
}


Scope (\_PR.CPU3)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
}


Scope (\_PR.CPU4)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
}


Scope (\_PR.CPU5)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
}


Scope (\_PR.CPU6)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
}


Scope (\_PR.CPU7)
{
Method (APSS, 0, NotSerialized) { Return (\_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized) { Return (\_PR.CPU1.ACST ()) }
}
}
 
Joined
Apr 2, 2010
Messages
138
Motherboard
Asus P8B-WS / 2106 Patched Bios
CPU
Xeon E3-1230V2
Graphics
Sapphire Radeon HD6850
Mac
  1. Mac Pro
Classic Mac
  1. Quadra
Mobile Phone
hey this pike thanks for your help this is the output of the code.



/*
* Intel ACPI Component Architecture
* AML Disassembler version 20130210-00 [Feb 10 2013]
* Copyright (c) 2000 - 2013 Intel Corporation
*
* Original Table Header:
* Signature "SSDT"


<cut>

@mikeymartinez

I think that Pike would like you to provide the screen output when running the app or script, not the resulting SSDT.
It gives info about your proc, the board-id configured, frequency, and could point to some configuration mistakes.

For instance for my board it will output following text:

Code:
sdtPRGen.sh v4.5 Copyright (c) 2013 by Pike R. Alpha
----------------------------------------------------------------
Warning: Unexpected brandstring > "Intel(R) Xeon(R) CPU E3-1230 V2 @ 3.30GHz"
Generating SSDT_PR.dsl for a iMac13,1 [Mac-00BE6ED71E35EB86]
Ivy Bridge Core E3-1230 V2 processor [0x0704] setup
With a maximum TDP of 69 Watt, as specified by Intel
Warning: Low Frequency Mode is 0 (unknown)
Now using 1600 MHz for Server/Desktop processors
Number logical CPU's: 8 (Core Frequency: 3300 MHz)
Number of Turbo States: 4 (3400-3700 MHz)
Number of P-States: 22 (1600-3700 MHz)
Injected C-States for CPU0 (C1,C3,C6)
Injected C-States for CPU1 (C1,C2,C3)

Intel ACPI Component Architecture
ASL Optimizing Compiler version 20130117-64 [Jan 19 2013]
Copyright (c) 2000 - 2013 Intel Corporation

ASL Input:     /Users/mapomme/Desktop/SSDT_PR.dsl - 245 lines, 7724 bytes, 46 keywords
AML Output:    /Users/mapomme/Desktop/SSDT_PR.aml - 1294 bytes, 27 named objects, 19 executable opcodes

Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations

Do you want to copy /Users/mapomme/Desktop/SSDT_PR.aml to /Extra/SSDT.aml? (y/n)?
 
Joined
Jan 20, 2013
Messages
33
Motherboard
Ud5h gigabyte
CPU
i7 3770k
Graphics
hd4000
Mac
Classic Mac
Mobile Phone
Ok Francis can you direct me in the right way to where to get the ssdtPRGen.sh newest version app
 
Joined
Jan 20, 2013
Messages
33
Motherboard
Ud5h gigabyte
CPU
i7 3770k
Graphics
hd4000
Mac
Classic Mac
Mobile Phone
i keep using the 4.1 version i cant find the newest one....
 
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