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[Solved] El Capitan sleep/wake problems!

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Yes, I search in IOREG for XHC & SATA. For XHC, when I do the search, I see 14 ports defined. HS01 thru HS08 + SS01 thru SS06. Shouldn't it be fine? That's without counting the Hubs.

Though now, I don't see the attached devices anymore in my IOREG -> I used to see "Mouse" in one of the HS port / "Keyboard" in another port... Maybe that's what you mean by AAPL being injected?

I need the Nvidia Web Drivers for Skylake based on what I've been told / tried so far. Otherwise, I only get "14MB" of internal graphics RAM display and display is very slow.

Thats because you're only searching for the Controller itself. If you search for USB then you're USB devices will show. Not sure on Nvidia Web drivers never used them. You're probably going over the 15 port restrictor limit remember that USB 3 has 2 entries and USB 2 has one entries. HS Ports are USB 2 and SSP ports are USB 3.
 
Thats because you're only searching for the Controller itself. If you search for USB then you're USB devices will show. Not sure on Nvidia Web drivers never used them. You're probably going over the 15 port restrictor limit remember that USB 3 has 2 entries and USB 2 has one entries. HS Ports are USB 2 and SSP ports are USB 3.

Oh, I see (My bad for not searching USB). I didn't know that USB 3 means 2 ports/entries. So the criteria is: (Nb_of_HS + 2x (Nb_of_SS)) < 15 has to be met, right? I will look into removing more ports in my SSDT-UIAC.dsl patch then, right?

Also in IOREG when searching for USB or XHC, I have this PCI8086,15b6@0 : XHCI Hub, does it count toward the 15-port limit? This Hub seems to be related to the 2x USB3.1 ports (1x Type A + 1x Type C - Thunderbolt 3) I have on my MB. Do I have to patch them?

Thank you for explaining everything so well, this helps me a lot.
 
Oh, I see (My bad for not searching USB). I didn't know that USB 3 means 2 ports/entries. So the criteria is: (Nb_of_HS + 2x (Nb_of_SS)) < 15 has to be met, right? I will look into removing more ports in my SSDT-UIAC.dsl patch then, right?

Also in IOREG when searching for USB or XHC, I have this PCI8086,15b6@0 : XHCI Hub, does it count toward the 15-port limit? This Hub seems to be related to the 2x USB3.1 ports (1x Type A + 1x Type C - Thunderbolt 3) I have on my MB. Do I have to patch them?

Thank you for explaining everything so well, this helps me a lot.

No. SSP 2 entries, HS 1 entries you have to remove ports to be in the 15 port limit. Hence why SSDT-UIAC/USBinject-all.
 
No. SSP 2 entries, HS 1 entries you have to remove ports to be in the 15 port limit. Hence why SSDT-UIAC/USBinject-all.

Hi @VoiletDragon Thank you so much for the instructions on the USB entries # of ports calculations. Sorry I have been slow at it. I figured out how to exclude the ports down to 15 now, I think.
Attached are my latest IOREG + CLOVER files. Can you verify that IOREG USB ports are good within the 15-port limit now?
I still have that wake from sleep issue (Frozen display after wake) alas. Is there anything else you see that I could change to make it work?

Thanks so much for your patience with a noob like myself. I feel that I'm getting closer & closer to making wake from sleep work with your amazing help & knowledge. Sorry again for the delay (I didn't get the chance to work on it right away the other day).

Note: FWIW, now I can't get Intel Power Gadget to run anymore though after I ensured SSDT-LPC.aml works, with the _DSM to DSM patch in config.plist.
 

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Hi @VoiletDragon Thank you so much for the instructions on the USB entries # of ports calculations. Sorry I have been slow at it. I figured out how to exclude the ports down to 15 now, I think.
Attached are my latest IOREG + CLOVER files. Can you verify that IOREG USB ports are good within the 15-port limit now?
I still have that wake from sleep issue (Frozen display after wake) alas. Is there anything else you see that I could change to make it work?

Thanks so much for your patience with a noob like myself. I feel that I'm getting closer & closer to making wake from sleep work with your amazing help & knowledge. Sorry again for the delay (I didn't get the chance to work on it right away the other day).

Note: FWIW, now I can't get Intel Power Gadget to run anymore though after I ensured SSDT-LPC.aml works, with the _DSM to DSM patch in config.plist.

Update all SSDTs from my GitHub. Intel Power Gadget has been sorted.
 
Update all SSDTs from my GitHub. Intel Power Gadget has been sorted.

OK, I'm going to try that. Thanks.

So far, I have SSDT-LPC.aml / SSDT-SATA.aml / SSDT-SMBUS.aml / SSDT-XHC.aml / SSDT-XWAK.aml updated & patched in my ACPI folder using your github.

So I am missing SSDT-HACK.aml / SSDT-MCHC.aml and SSDT-IGPU.aml if I'm not mistaken, right? Thank you
 
OK, I'm going to try that. Thanks.

So far, I have SSDT-LPC.aml / SSDT-SATA.aml / SSDT-SMBUS.aml / SSDT-XHC.aml / SSDT-XWAK.aml updated & patched in my ACPI folder using your github.

So I am missing SSDT-HACK.aml / SSDT-MCHC.aml and SSDT-IGPU.aml if I'm not mistaken, right? Thank you

You need all SSDTs from my GitHub except for SSDT-IGPU you're using dedicated graphics so SSDT-IGPU is not needed.
 
You need all SSDTs from my GitHub except for SSDT-IGPU you're using dedicated graphics so SSDT-IGPU is not needed.

I see, thanks. I tried adding all your SSDTs from GitHub (except IGPU & USB-ALL since I already have a USBInjectAll.kext in clover/kext folder) into ACPI/patches & added the appropriate lines in config.plist but it didn't change anything for Intel Power Gadget (app doesn't open "Intel Power Gadget Quit Unexpectedly" error message).

I just saw that you changed your SSDT-LPC.aml file just 3-days ago, so I decided to use this latest one. Can you verify that my kext is running properly?
Here's my terminal info when I run kextstat

$ kextstat|grep -y applelpc

128 0 0xffffff7f82a1e000 0x3000 0x3000 com.apple.driver.AppleLPC (3.1) F51595F0-F9B1-3B85-A1C3-F984DAD4107E <78 12 5 4 3>


The last time I ran this kexstat I had this info: Seems like there is a change from "82 to 78" in the last few fields.
$ kextstat|grep -y applelpc

127 0 0xffffff7f82fe8000 0x3000 0x3000 com.apple.driver.AppleLPC (3.1) F51595F0-F9B1-3B85-A1C3-F984DAD4107E <82 12 5 4 3>
 
I see, thanks. I tried adding all your SSDTs from GitHub (except IGPU & USB-ALL since I already have a USBInjectAll.kext in clover/kext folder) into ACPI/patches & added the appropriate lines in config.plist but it didn't change anything for Intel Power Gadget (app doesn't open "Intel Power Gadget Quit Unexpectedly" error message).

I just saw that you changed your SSDT-LPC.aml file just 3-days ago, so I decided to use this latest one. Can you verify that my kext is running properly?
Here's my terminal info when I run kextstat

$ kextstat|grep -y applelpc

128 0 0xffffff7f82a1e000 0x3000 0x3000 com.apple.driver.AppleLPC (3.1) F51595F0-F9B1-3B85-A1C3-F984DAD4107E <78 12 5 4 3>


The last time I ran this kexstat I had this info: Seems like there is a change from "82 to 78" in the last few fields.
$ kextstat|grep -y applelpc

127 0 0xffffff7f82fe8000 0x3000 0x3000 com.apple.driver.AppleLPC (3.1) F51595F0-F9B1-3B85-A1C3-F984DAD4107E <82 12 5 4 3>

I have updated both SSDT-LPC and SSDT-SATA. I made a mistake but sorted. Intel Power Gadget is also sorted. Need Update those 2 SSDTs and you're set to go.
 
I have updated both SSDT-LPC and SSDT-SATA. I made a mistake but sorted. Intel Power Gadget is also sorted. Need Update those 2 SSDTs and you're set to go.

Hi @VoiletDragon Thanks so much for the info. I downloaded SSDT-SATA.aml but I can't seem to be able to open/edit it with my MaciASL application for my 100 series gigabyte board. Can I just edit it via TextEdit? I'm not sure. If not too much trouble, can you send me the 100 series compatible SSDT-SATA.aml file? Thank you so much & sorry for asking again.

I have the same problem with the SSDT-LPC.aml file that can't be opened, but I think I don't need to change anything for it, while keeping the _DSM to XDSM patch.

After that, I think I should be good with SSDT patches/kexts like you said :) hopefully.
 
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