Great!
It's purely cosmetic
I'm still confused, so what would the offset of BARX, 64 be?
OperationRegion (ECF2, EmbeddedControl, Zero, 0x0100)
Field (ECF2, ByteAcc, Lock, Preserve)
{
VCMD, 8,
VDAT, 8,
VSTA, 8,
Offset (0x06),
BARX,64,//BARL,64,
BARY,64,//BARH,64,
Offset (0x18),
SMPR, 8,
SMST, 8,
SMAD, 8,
SMCM, 8,
SMDP,256,//SMD0,256,
BCNT, 8,
SMAL, 8,
SMA0, 8,
SMA1, 8,
RPWR, 1,
, 1,
LSTE, 1,
, 4,
Offset (0x43),
ACOS, 1,
Offset (0x44),
, 5,
BFUC, 2,
Offset (0x45),
Offset (0x47),
CPUP, 16,
BPWR, 16,
PPWR, 16,
TSR1, 8,
TSR2, 8,
TSR3, 8,
TSR4, 8,
TSR5, 8,
TSI, 4,
HYST, 4,
TSHT, 8,
TSLT, 8,
TSSR, 8,
TESR, 8,
CPEC, 8,
B1FV, 16,
Offset (0x60),
B1ST, 1,
BATT, 1,
B1IC, 1,
B1FU, 1,
B1DI, 1,
B1DE, 1,
B1AN, 1,
Offset (0x61),
Offset (0x62),
ZTM0,8,ZTM1,8,
ZVT0,8,ZVT1,8,
ZCR0,8,ZCR1,8,
BAPR, 16,
ZRC0,8,ZRC1,8,
ZFC0,8,ZFC1,8,
B1CC, 16,
B1CV, 16,
Offset (0x76),
ZDC0,8,ZDC1,8,
ZDV0,8,ZDV1,8,
DCW0,8,DCW1,8,
DCL0,8,DCL1,8,
B1AR, 16,
B1MJ,64,//B1MA,64,
B1DF,64,//B1DN,64,
ZCH0,8,ZCH1,8,ZCH2,8,ZCH3,8,
Offset (0x98),
B1MO, 16,
B2MO, 16,
B1SN, 16,
B2SN, 16,
ZDT0,8,ZDT1,8,
VDT0,8,VDT1,8,
ZCY0,8,ZCY1,8,
FUSL, 8,
FUSH, 8,
BMIL, 8,
BMIH, 8,
HIDL, 8,
HIDH, 8,
FMVL, 8,
FMVH, 8,
DAVL, 8,
DAVH, 8,
, 3,
KLED, 1,
KLSP, 1,
KLST, 1,
UCGS, 1,
UCGE, 1,
KBTP, 1,
F11E, 1,
FNHK, 1,
S0IE, 1,
Offset (0xB2),
SALM, 8,
Offset (0xB4),
CTMP, 8,
Offset (0xB8),
SBMM, 8,
Offset (0xBA),
CRT0,8,CRT1,8,
Offset (0xC0),
BART,184,//BARN,184,
Offset (0xEC),
CDMB, 1,
BTSM, 1,
FCGM, 1,
MBBD, 1,
M2BD, 1,
LBT1, 1,
LBT2, 1,
BTIL, 1,
BTPF, 1,
BTCM, 1,
, 1,
BTOV, 1,
B2OV, 1,
B2PF, 1,
S12B, 1,
ADS1, 1,
ADS2, 1,
SQCG, 1,
SPMD, 1,
ADID, 1,
Offset (0xF0),
Offset (0xF2),
BDBG, 8,
PLMX, 8,
LTMP, 8,
CSFG, 8,
DCKS, 1,
CFAN, 1,
DLED, 1,
PB10, 1,
Offset (0xF7),
DOCK, 1,
EJET, 1,
, 1,
PBNS, 1,
VPWR, 1,
Offset (0xF8),
CMDR, 8,
Offset (0xFA),
PSD1, 8,
PSD2, 8,
PSCN, 8,
CUMD, 8,
Offset (0xFF),
PSDB, 8
}Thanks, now is this part correct (I don't think it is)? Because if I'm not mistaken, we're still dealing with 16 bits for like ZDC0,8,ZDC1,8)
Offset (0x76),
ZDC0,8,ZDC1,8, //0x76
ZDV0,8,ZDV1,8, //0x77
DCW0,8,DCW1,8, //0x78
DCL0,8,DCL1,8, //0x79
B1AR, 16, //0x81
B1MJ,64,//B1MA,64, //0x89
B1DF,64,//B1DN,64, //0x91
ZCH0,8,ZCH1,8,ZCH2,8,ZCH3,8, //0x92
Offset (0x98), Offset (0x76),
ZDC0,8,ZDC1,8, //0x76
ZDV0,8,ZDV1,8, //0x78
DCW0,8,DCW1,8, //0x7a
DCL0,8,DCL1,8, //0x7c
B1AR, 16, //0x7e
B1MJ,64,//B1MA,64, //0x80
B1DF,64,//B1DN,64, //0x88
ZCH0,8,ZCH1,8,ZCH2,8,ZCH3,8, //0x90
Offset (0x98),So, have you been using USB wifi so far? Which device did you use? I would definitely like to use a native (i.e. onboard) solution if possible. I think we can replace the mini-PCI-e controller, correct?
I have the same three devices. According to the I2C guide, these models are "almost fully supported". I tried installing the VoodooI2C.kext using Kext Wizard, but this did not work. I then tried removing (renaming) the Apple Lpss kexts, and rebuilt the cache. But this caused a kernel panic, so I reverted. Perhaps I need to patch the DSDT to get the trackpad to work with VoodooI2C: any thoughts?