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Installation Guide For Using Clover on the Intel Haswell NUC

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WonkeyDonkey said:
Minihack is correct about the SSDT too; the one I included in the install pack has different specifications to your CPU; you should use the SSDT generation script to produce a new SSDT based on your own CPU specification.
Click to expand...


Minihack posted on another post about Revogirls script for SSDT generation.
Looks like my NUC D34010WYK has a Max TDP of 15W.
I am not sure my NUC has a turbo frequency, am I wrong?
What is and how do I find the Max Turbo Frequency so that I can build a proper SSDT?

The i5 model you are using for this guide has a max turbo frequency of 2.6, this line is ommited from the specifications of my i3 sheet.

My best guess is to input the clock speed (1.7) as the maximum but I have little idea of the implications.

Could someone fill me in?

----

'1.7' in Ghz is not a good argument for the script, I assume then it should be input as '1700'

Code: 
/* * Intel ACPI Component Architecture
 * AML Disassembler version 20110316-64 [Mar 16 2011]
 * Copyright (c) 2000 - 2011 Intel Corporation
 * 
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x98
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00001000 (4096)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20110316 (537985814)
 */


DefinitionBlock ("ssdt-pr.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00001000)
{
    External (\_PR_.CPU0, DeviceObj)
    External (\_PR_.CPU1, DeviceObj)
    External (\_PR_.CPU2, DeviceObj)
    External (\_PR_.CPU3, DeviceObj)
    External (\_PR_.CPU4, DeviceObj)
    External (\_PR_.CPU5, DeviceObj)
    External (\_PR_.CPU6, DeviceObj)
    External (\_PR_.CPU7, DeviceObj)


    Scope (_PR.CPU0)
    {
        Name (APSN, 0x0-17)
        Name (APSS, Package (0x1B)
        {


            Package (0x06)
            {
                0x06A4,
                0x00003A98,
                0x0A,
                0x0A,
                0x1100,
                0x1100
            },


            Package (0x06)
            {
                0x0640,
                0x00003685,
                0x0A,
                0x0A,
                0x1000,
                0x1000
            }
        })


        Method (ACST, 0, NotSerialized)
        {
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },


                    One,
                    0x03,
                    0x03E8
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },


                    0x03,
                    0xCD,
                    0x01F4
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },


                    0x06,
                    0xF5,
                    0x015E
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },


                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }
    }


    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU4)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU5)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU6)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU7)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }
}


I hope I am doing well so far. I then used DSDTse app to make the generated ssdt-pr.dls into a SSDT.

I get an error saying

Code: 
"bash: /Users/harveymoon/Library/Application Support/EvOSoftware/DSDT/iasl: No such file or directory"

But this is just not true, "iasl" does exist in that location. A warning message tells me to save the file into DSDTFiles, or else. Maybe due to the error I do not get an .aml file but a .dsl file that seems the same as the input ssdt-pr.dls file.


trying ssdtPRGen now, seems like a derivative of Revogirl's script from before.

trying the command
Code: 
"/Volumes/MAK/Users/harveymoon/Documents/Hackintosh/ssdtPRGen.sh i3-4010U 1700 15"

the Usage claims TDP maxTurboFrequency

PikeRAlpha said:
ssdtPRGen has one known limitation, being the order of arguments:
~/ssdtPRGen.[sh/command] [CPU Model] [Frequency] [tdp in Watts] [Bridge Type]
Click to expand...

claims Frequency TDP

I ended up just inputting
Code: 
harveymoon$ sudo /Volumes/MAK/Users/harveymoon/Desktop/ssdtPRGen.command i3-4010U


Then out popped the AML!
great, but when I open it, I see my current system specs:....

Code: 
        /* * Intel ACPI Component Architecture
 * AML Disassembler version 20140210-00 [Feb 10 2014]
 * Copyright (c) 2000 - 2014 Intel Corporation
 * 
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x00
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00013000 (77824)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20140210 (538182160)
 */


DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013000)
{
    External (\_PR_.CPU0, DeviceObj)
    External (\_PR_.CPU1, DeviceObj)
    External (\_PR_.CPU2, DeviceObj)
    External (\_PR_.CPU3, DeviceObj)
    External (\_PR_.CPU4, DeviceObj)
    External (\_PR_.CPU5, DeviceObj)
    External (\_PR_.CPU6, DeviceObj)
    External (\_PR_.CPU7, DeviceObj)


    Scope (\_PR_.CPU0)
    {
        Method (_INI, 0, NotSerialized)
        {
            Store ("ssdtPRGen version....: 13.0 / Mac OS X 10.9.1 (13B42)", Debug)
            Store ("target processor.....: i7-3770", Debug)
            Store ("running processor....: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz", Debug)
            Store ("baseFrequency........: 1600", Debug)
            Store ("frequency............: 3400", Debug)
            Store ("busFrequency.........: 100", Debug)
            Store ("logicalCPUs..........: 8", Debug)
            Store ("maximum TDP..........: 77", Debug)
            Store ("packageLength........: 2", Debug)
            Store ("turboStates..........: 0", Debug)
            Store ("maxTurboFrequency....: 1700", Debug)
            Store ("machdep.xcpm.mode....: 0", Debug)
        }


        Name (APLF, Zero)
        Name (APSN, Zero)
        Name (APSS, Package (0x02)
        {
            Package (0x06) { 0x06A4, 0x0120A0, 0x0A, 0x0A, 0x1100, 0x1100 },
            /* Low Frequency Mode */
            Package (0x06) { 0x0640, 0x0114B0, 0x0A, 0x0A, 0x1000, 0x1000 }
        })


        Method (ACST, 0, NotSerialized)
        {
            Store ("Method CPU0.ACST Called", Debug)
            Store ("CPU0 C-States    : 13", Debug)


            /* Low Power Modes for CPU0 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    Zero,
                    0x03E8
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xCD,
                    0x01F4
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x06,
                    0xF5,
                    0x015E
                }
            })
        }


        Method (_DSM, 4, NotSerialized)
        {
            Store ("Method CPU0._DSM Called", Debug)


            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                    0x03
                })
            }


            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }


    Scope (\_PR_.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized)
        {
            Store ("Method CPU1.ACST Called", Debug)
            Store ("CPU1 C-States    : 7", Debug)


            /* Low Power Modes for CPU1 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    0x03E8,
                    0x03E8
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x02,
                    0x94,
                    0x01F4
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xA9,
                    0x15E
                }
            })
        }
    }


    Scope (\_PR_.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU2.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU3.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU4)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU4.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU5)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU5.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU6)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU6.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU7)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU7.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }
}



----------------


OK, I think I am getting the hang of this.

I was able to boot in safe mode and start up MaciASL.
This worked! I generated and exported a ssdt.
Now, I think the patching part is another story that I am not sure where to start.
 

Attachments

  • Generated SSDT.dsl
    3.2 KB · Views: 134
HarveyMoon said:
Minihack posted on another post about Revogirls script for SSDT generation.
Looks like my NUC D34010WYK has a Max TDP of 15W.
I am not sure my NUC has a turbo frequency, am I wrong?
What is and how do I find the Max Turbo Frequency so that I can build a proper SSDT?

The i5 model you are using for this guide has a max turbo frequency of 2.6, this line is ommited from the specifications of my i3 sheet.

My best guess is to input the clock speed (1.7) as the maximum but I have little idea of the implications.

Could someone fill me in?

----

'1.7' in Ghz is not a good argument for the script, I assume then it should be input as '1700'

Code: 
/* * Intel ACPI Component Architecture
 * AML Disassembler version 20110316-64 [Mar 16 2011]
 * Copyright (c) 2000 - 2011 Intel Corporation
 * 
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x98
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00001000 (4096)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20110316 (537985814)
 */


DefinitionBlock ("ssdt-pr.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00001000)
{
    External (\_PR_.CPU0, DeviceObj)
    External (\_PR_.CPU1, DeviceObj)
    External (\_PR_.CPU2, DeviceObj)
    External (\_PR_.CPU3, DeviceObj)
    External (\_PR_.CPU4, DeviceObj)
    External (\_PR_.CPU5, DeviceObj)
    External (\_PR_.CPU6, DeviceObj)
    External (\_PR_.CPU7, DeviceObj)


    Scope (_PR.CPU0)
    {
        Name (APSN, 0x0-17)
        Name (APSS, Package (0x1B)
        {


            Package (0x06)
            {
                0x06A4,
                0x00003A98,
                0x0A,
                0x0A,
                0x1100,
                0x1100
            },


            Package (0x06)
            {
                0x0640,
                0x00003685,
                0x0A,
                0x0A,
                0x1000,
                0x1000
            }
        })


        Method (ACST, 0, NotSerialized)
        {
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },


                    One,
                    0x03,
                    0x03E8
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },


                    0x03,
                    0xCD,
                    0x01F4
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },


                    0x06,
                    0xF5,
                    0x015E
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },


                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }
    }


    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU4)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU5)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU6)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }


    Scope (\_PR.CPU7)
    {
        Method (APSS, 0, NotSerialized)
        {
            Return (\_PR.CPU0.APSS)
        }
    }
}


I hope I am doing well so far. I then used DSDTse app to make the generated ssdt-pr.dls into a SSDT.

I get an error saying

Code: 
"bash: /Users/harveymoon/Library/Application Support/EvOSoftware/DSDT/iasl: No such file or directory"

But this is just not true, "iasl" does exist in that location. A warning message tells me to save the file into DSDTFiles, or else. Maybe due to the error I do not get an .aml file but a .dsl file that seems the same as the input ssdt-pr.dls file.


trying ssdtPRGen now, seems like a derivative of Revogirl's script from before.

trying the command
Code: 
"/Volumes/MAK/Users/harveymoon/Documents/Hackintosh/ssdtPRGen.sh i3-4010U 1700 15"

the Usage claims TDP maxTurboFrequency



claims Frequency TDP

I ended up just inputting
Code: 
harveymoon$ sudo /Volumes/MAK/Users/harveymoon/Desktop/ssdtPRGen.command i3-4010U


Then out popped the AML!
great, but when I open it, I see my current system specs:....

Code: 
        /* * Intel ACPI Component Architecture
 * AML Disassembler version 20140210-00 [Feb 10 2014]
 * Copyright (c) 2000 - 2014 Intel Corporation
 * 
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x00
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00013000 (77824)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20140210 (538182160)
 */


DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013000)
{
    External (\_PR_.CPU0, DeviceObj)
    External (\_PR_.CPU1, DeviceObj)
    External (\_PR_.CPU2, DeviceObj)
    External (\_PR_.CPU3, DeviceObj)
    External (\_PR_.CPU4, DeviceObj)
    External (\_PR_.CPU5, DeviceObj)
    External (\_PR_.CPU6, DeviceObj)
    External (\_PR_.CPU7, DeviceObj)


    Scope (\_PR_.CPU0)
    {
        Method (_INI, 0, NotSerialized)
        {
            Store ("ssdtPRGen version....: 13.0 / Mac OS X 10.9.1 (13B42)", Debug)
            Store ("target processor.....: i7-3770", Debug)
            Store ("running processor....: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz", Debug)
            Store ("baseFrequency........: 1600", Debug)
            Store ("frequency............: 3400", Debug)
            Store ("busFrequency.........: 100", Debug)
            Store ("logicalCPUs..........: 8", Debug)
            Store ("maximum TDP..........: 77", Debug)
            Store ("packageLength........: 2", Debug)
            Store ("turboStates..........: 0", Debug)
            Store ("maxTurboFrequency....: 1700", Debug)
            Store ("machdep.xcpm.mode....: 0", Debug)
        }


        Name (APLF, Zero)
        Name (APSN, Zero)
        Name (APSS, Package (0x02)
        {
            Package (0x06) { 0x06A4, 0x0120A0, 0x0A, 0x0A, 0x1100, 0x1100 },
            /* Low Frequency Mode */
            Package (0x06) { 0x0640, 0x0114B0, 0x0A, 0x0A, 0x1000, 0x1000 }
        })


        Method (ACST, 0, NotSerialized)
        {
            Store ("Method CPU0.ACST Called", Debug)
            Store ("CPU0 C-States    : 13", Debug)


            /* Low Power Modes for CPU0 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    Zero,
                    0x03E8
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xCD,
                    0x01F4
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x06,
                    0xF5,
                    0x015E
                }
            })
        }


        Method (_DSM, 4, NotSerialized)
        {
            Store ("Method CPU0._DSM Called", Debug)


            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                    0x03
                })
            }


            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }


    Scope (\_PR_.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized)
        {
            Store ("Method CPU1.ACST Called", Debug)
            Store ("CPU1 C-States    : 7", Debug)


            /* Low Power Modes for CPU1 */
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    0x03E8,
                    0x03E8
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x02,
                    0x94,
                    0x01F4
                },


                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xA9,
                    0x15E
                }
            })
        }
    }


    Scope (\_PR_.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU2.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU3.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU4)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU4.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU5)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU5.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU6)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU6.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }


    Scope (\_PR_.CPU7)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU7.APSS Called", Debug)


            Return (\_PR_.CPU0.APSS)
        }


        Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
    }
}



----------------


OK, I think I am getting the hang of this.

I was able to boot in safe mode and start up MaciASL.
This worked! I generated and exported a ssdt.
Now, I think the patching part is another story that I am not sure where to start.
Click to expand...

For SSDT don't use the old revogirl script (it is outdated). Her brother Pike made new scripts and you should refer to this thread: http://www.tonymacx86.com/ssdt/86906-ssdt-generation-script-ivybridge-pm.html and for the very latest look here: http://pikeralpha.wordpress.com/2014/04/11/ssdtprgen-sh-v13-1-with-long-scope-_sb-support/
 
Water Cube
Z77-ITX WiFi |  i7 3770K |  Radeon HD 7750
Mac Pro Mod
GA-Z68XP-UD3P |  i5 2500K |  GeForce GTX 660
iMac G3 Mod
H87 ITX Wifi |  i5 4430 |  HD 4600
Haswell Mac Mini
D54250WYK |  i5 4250U |  HD 4600
MDD G4 Mod
GA-P55-UD5 |  i7 860 |  GeForce GT 620
minihack said:
For SSDT don't use the old revogirl script (it is outdated). Her brother Pike made new scripts and you should refer to this thread: http://www.tonymacx86.com/ssdt/86906-ssdt-generation-script-ivybridge-pm.html and for the very latest look here: http://pikeralpha.wordpress.com/2014/04/11/ssdtprgen-sh-v13-1-with-long-scope-_sb-support/
Click to expand...


Cool,
so that worked, I ran the script on the NUC, it generated a ssdt that I patched with maciASL.
was able to boot without safe mode, then installed Clover on the boot drive, moved the files into the correct place and I AM UP!
WOOO.

seems to boot pretty quickly on it's own.

Just now I am trying to figure out how to get Ethernet to show up. Was this a patch I missed out on?
 
HarveyMoon said:
Cool,
so that worked, I ran the script on the NUC, it generated a ssdt that I patched with maciASL.
was able to boot without safe mode, then installed Clover on the boot drive, moved the files into the correct place and I AM UP!
WOOO.

seems to boot pretty quickly on it's own.

Just now I am trying to figure out how to get Ethernet to show up. Was this a patch I missed out on?
Click to expand...

To be honest I never bothered with Ethernet, but there is a kext for it in Multibeast:

Multibeast.jpg

See the Intel ethernet kext above - click on the pic for a readable view! You can download Multibeast and just select that kext for install (as I assume you already have FakeSMC etc and the theme part is not relevant for Clover).
 
Water Cube
Z77-ITX WiFi |  i7 3770K |  Radeon HD 7750
Mac Pro Mod
GA-Z68XP-UD3P |  i5 2500K |  GeForce GTX 660
iMac G3 Mod
H87 ITX Wifi |  i5 4430 |  HD 4600
Haswell Mac Mini
D54250WYK |  i5 4250U |  HD 4600
MDD G4 Mod
GA-P55-UD5 |  i7 860 |  GeForce GT 620
minihack said:
To be honest I never bothered with Ethernet, but there is a kext for it in Multibeast:

View attachment 89264

See the Intel ethernet kext above - click on the pic for a readable view! You can download Multibeast and just select that kext for install (as I assume you already have FakeSMC etc and the theme part is not relevant for Clover).
Click to expand...


PERFECT!!!

both machines are great!
The second only took me 20 minutes to get up and running once all the files are figured out.

Thank you both so much for making guides and helping out!
I really appreciate it!
 
vinz262002 said:
Out of curiosity, has this bug been fixed ? and does it prevent totally the use of iMessage on the NUC ?
TIA.
Click to expand...

I don't have this problem….or the other one!
 
Water Cube
Z77-ITX WiFi |  i7 3770K |  Radeon HD 7750
Mac Pro Mod
GA-Z68XP-UD3P |  i5 2500K |  GeForce GTX 660
iMac G3 Mod
H87 ITX Wifi |  i5 4430 |  HD 4600
Haswell Mac Mini
D54250WYK |  i5 4250U |  HD 4600
MDD G4 Mod
GA-P55-UD5 |  i7 860 |  GeForce GT 620
vinz262002 said:
Out of curiosity, has this bug been fixed ? and does it prevent totally the use of iMessage on the NUC ?
TIA.
Click to expand...

I don't have this problem….or the other one!
Click to expand...

There is something you're setting up in the conflg.plist that I have not which is giving me the issue.

vinz262002, I haven't solved it yet, but I've been very very busy these last few months so the free time to play with the NUC has been very limited :(
 
Build 1
Z87E-ITX |  Xeon E3-1240 V3 |  GT 980 FTW ACX 2.0
Hi.

I need your help.

I bought NUC 34010 and I challenge install mavericks.
But I can't setting up well.

If you can possible, your DSDT / SSDT / config.plist send me or upload please.

or post your know for NUC 34010, please.

Thank you.
Click to expand...
Do you have your Mavericks boot drive set up already?
Which hardware will you be using in the NUC?
Will you use Wi-Fi?
Bluetooth via USB or integrated in the Wi-Fi dongle?

Here's the issue. I have the D54250WYK, the i5 version. This guide will absolutely work with that version, but with yours, there is only very few you can use. Maybe some of the configurations on the config.plist and the AppleHDAIDT kext for audio patching. The rest you will need to create it.

You will need a different framebuffer patch for graphics, since the patch in the config.plist is for the HD5000 and you have HD4400.
You will need to compile your own DSDT using some of the edits in the WonkeyDonkey's thread for the D54250WYK and generate your own SSDT with the latest script.

Good thing is that HarveyMoon in this thread has the same NUC as you and he already succeeded in configuring his NUC. Maybe he can share with you the plain text files of the SSDT and DSDT so you can compile them in your NUC, and the framebuffer patch he used for the HD4400 ;)
 
Build 1
Z87E-ITX |  Xeon E3-1240 V3 |  GT 980 FTW ACX 2.0
WonkeyDonkey said:
I will put a link to this thread in my guide; if you guys wanna do the same then we have the options nicely buttoned up I think.

:thumbup:

Edit : Done!
Click to expand...

Your link has been on the first post from day one :thumbup:

- - - Updated - - -

minihack said:

A couple of notes on Clover for the NUC

Clover is intimidating at first because the documentation is not as complete.

Whether you feel more comfortable with the initial set up using Chimera or Chameleon that is fine as Clover can always be installed later.

As an additional help when it comes to boot loader installation time (or indeed if something perhaps went wrong on your own Clover install and you want to try my settings) I have made a folder called D54250WYB which I have zipped and attached to this post and can act as a quick starter for you.

Simply, after the Clover package has installed according to post #1 in this thread, and when Clover has automatically mounted your EFI partition (which it does when the Clover installation finishes) just open the EFI volume, and then open the internal folder EFI/CLOVER/OEM and drag the attached folder in there.


Because the folder name is recognised by Clover as being the name of the board you are booting it will automatically use the config.plist inside that folder, and also use the DSDT and SSDT inside the D54250WYB/ACPI/patched and the Kexts inside D54250WYB/KEXTS/10.9 - so that will give you a shortcut to a working system.

The plist in the folder already contains code for all the needed kext and kernel patching, (except for the AppleHDAIDT next which needs to be installed properly to system/library/extensions) so that on the next re-boot you should be pretty much 100% functional.

I recommend you add a MBA6,2 serial number into the section SMBIOS/SerialNumber of the plist.

I hope this helps, and does not add to any confusion for readers. Please do note that the DSDT and the SSDT in the attached folder were created and patched based on UEFI version 22, so may not work for you if you are on a later version. In any case, I certainly recommend that you "roll your own" DSDT following the indications set out in the WonkeyDonkey NUC thread.
Click to expand...

I will add your package to the first post :)
 
Build 1
Z87E-ITX |  Xeon E3-1240 V3 |  GT 980 FTW ACX 2.0
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