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How to build your own iMac Pro [Successful Build/Extended Guide]

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Once more:

Did you adopt and enable all DSDT replacement patches as well as the SSDT-X299.aml?

Can you show your PCI entries in Apple’s system report?


sorry, I had to boot the machine, here is everything you should need minus my bios settings. however the only difference from mine to your guide is I disabled onboard bluetooth/wifi/sound as I do not use any of those items. the ssdt-x299 has been edited to reflect this.
 

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Up and successfully running Skylake-X/X299 with macOS High Sierra 10.13.2 !

View attachment 297825

This originating post constitutes a new macOS 10.13 High Sierra Desktop Guide for Skylake-X/X299, which certainly can still grow and improve by your estimated user feedback. This Skylake-X/X299 10.13 High Sierra Desktop Guide bases on the ASUS Prime X299 Deluxe (although initially, tests also have been performed with the Gigabyte X299 Aorus Gaming 9, thus this latter mainboard is also partly addressed in my guide below). However, also other X299 ASUS mainboard models or X299 mainboards of other brands should be compatible with this guide by considering a few mandatory modifications detailed below. The i7-7800X (6-core) was chosen as the Skylake-X Startup Configuration Model in order to minimise the guide development costs. It has been already replaced within the goal configuration by the i9-7980XE (18 core). All other Skylake-X models compatible with this guide are detailed in the figure below.

View attachment 276347

Carefully consider, which Skylake-X model might be the correct choice for your specific needs. Also the note of the following limitations:

a.) The i7-7640X and 7740X only support two channels DDR4-2666 and only posses 16 PCI express 3.0 lanes, which are
already used up by implementing a state-of-the-art 16 lane PCIe graphics adapter. Thus, there are no further PCI express 3.0 lanes for using PCIe NVMe drives or additional PCIe adapters!
b.) The i7-7800X and i7-7820X already support four channels DDR4-2666 but however also possess only 28 PCI express
3.0 lanes! Thus by using a state-of-the-art 16 lane PCIe graphics adapter and a PCIe NVMe drive, there are nearly no PCI express 3.0 lanes remaining. When adding one or two additional PCIe adapters, one exceeds the 28 available PCI express 3.0 lanes by far! In this case, the resulting configuration might be error-prone!
c.) Thus, considering a.) and b.), I strongly recommend to start at least with the i9-7900X, which already supports four
channels DDR4-2666 and also implements 44 PCI express 3.0 lanes​

Further note, that for all Skylake-X processors, a sophisticated liquid cooling system is absolutely mandatory! For stock speeds something like the Corsair H115i might by sufficient. However, if somebody aims at OverClocking (OC) of the i9-7900X or Skylake-X Processors above, sophisticated Water Blocks for CPU and VRM of e.g. EKWB seem absolutely mandatory and unavoidable.

My Skylake-X/X299 System is up, fully stable and fully functional apart from the yet non-functional onboard WLAN (WIFI) module (chipset not natively supported by OS X). For Wifi, I therefore use the OSX WIFI PCIe Adapter instead.

SMBIOS iMAC 17,1 seems absolutely mandatory if one wants to use native Xnu CPU Power Management (XCPM) for Skylake-X based on Pike Alpha's ssdtPRgen.sh and ssdt.aml. Until recently, the latter SMBIOS definition imposed a dead end at the XHC USB side, as there was no iMac 17,1 identity neither in Apple's IOUSBHostFamily.kext nor in Apple's AppleUSBXHCIPCI.kext, which further implied the sudden dead of USBInjectAll.kext or any derivatives (e.g. X99_Injector USB 3.kext or, XHCI-200-series-injector.kext, etc.). A sophisticated XHC USB kext workaround however provided full XHC USB 2.0 and USB 3.0 functionality also with SMBIOS iMac17,1 at least for the ASUS Prime X299 Deluxe. This sophisticated XHC USB Kext workaround is still detailed in Section E.4), as it might be yet still required for other mainboards, e.g. X99, Series-9 mainboards. However, since 10.13 SU and with AppleIntelPCHPMC, Apple now natively implements IOPCIPrimaryMatchID "a2af8068" and AppleUSBXHCISPT. All external and internal XHC USB 3.0 (USB 3.1 Gen 1 Type-A) and USB 2.0 (USB 2.0 Gen 1 Type-A) ports should now natively work at expected data transfer rates (90 Mb/S (USB 3.0)and 40 MB/s (USB 2.0), respectively) for all X299 mainboards when using SMBIOS iMac17,1. The sophisticated XHC USB Kext Workaround is herewith obsolete, and my guide is now fully and directly compatible with all X299 mainboards also regarding XHC USB2.0 and USB3.0 functionality! Many thanks to @Ramalama for this important discovery! The only remaining drawback seems to consist in the current non-functionality of USB3.0 devices in USB2.0 ports. All external and internal USB 3.1 (USB 3.1 Gen 2 Type-A and Type-C) ports were natively implemented already before on different controllers than XHC and also work at data rates up to 140 MB/s. See Section E.4 of my guide.

Also the ASUS Thunderbolt EX3 Extension Card is now successfully implemented, and external Thunderbolt drives connected via Apples Thunderbolt 3 to Thunderbolt 2 Adapter work at data rates and speeds similar to those of all USB 3.1 Gen 2 Type-A and Type-C connectors, i.e. 140 MB/s and above (see Section E.5 of my guide)!

Note that opposite to my previous EFI-Folder distributions, EFI-X299-10.13.2-Release-161217.zip does not contain any default audio configuration. You have to implement the audio approach of your choice during the Post Installation process in Section E.)! You can select between three possible audio implementations detailed in section E.3): 1.) The AppleALC audio approach (section E.3.1) bases on AppleALC.kext v1.2.1 and Lilu.kext v1.2.1 and could be implemented thanks to the extensive efforts and brilliant work of @vit9696 and @apfelnico . 2.) The VoodooHDA audio approach (section E.3.2) bases on the VoodooHDA.kext v2.9.0d10 and VoodooHDA.prefPane v1.2 and provides both analogue audio output/input and HDMI/DP digital audio output. 3.) Finally, @toleda 's cloverALC audio approach (section E.3.3) bases on the realtekALC.kext v2.8 and on an additional pathing of the native vanilla AppleHDA.kext in the /S/L/E/ directory of the System Disk and has been successfully implemented thanks to the instructions and help of @Ramalama.

The ASUS Prime X299 Deluxe on-board Bluetooth is natively supported and also Bluetooth Audio works OoB, however due to the non-functionality of the ASUS Prime X299 Deluxe on-board Wifi Module, I also use the Bluetooth 4.0 module of the OSX WIFI PCIe Adapter, which in line with its natively supported Wifi-module also provides native Airdrop, native Handoff and native Continuity as well as keyboard support in BIOS/UEFI and Clover Boot Loader.

Thanks to the SmallTree-Intel-211-AT-PCIe-GBE.kext, also the Intel I211_AT Gigabit on-board LAN controller of the ASUS Prime X299 Deluxe is now correctly implemented and fully functional, in addition to the anyway natively implemented and of course also fully operational Intel I219-V Gigabyte on-board LAN controller of the Asus Prime X299 Deluxe (see Section E.8 of my guide).

By the way, excellent news for all ASUS freaks! Thanks to the ASUS specific "Sync all Cores"" BIOS-function, one apparently achieves brilliant and absolute top-end Xnu CPU Power Management (XCPM) performance, as you will see below in section E.1 of my guide. In my personal opinion, the ASUS X299 Prime Deluxe is currently definitely the better choice with respect to the overall XCPM performance, at least when compared with the Gigabyte X299 Aorus Gaming 9, which actually seems to miss the ASUS-specific "Sync All Cores" BIOS-functionality and therefore hardly competes with the smooth and well settled CPU idle and max. load frequencies achieved with the primer mainboard. I already returned the latter mainboard quite a while ago. The same drawback might apply by the way also for all other non-ASUS X299 mainboards of all other different brands than ASUS.

Like always also many thanks to @DSM2 and PMheart for their extremely helpful and fruitful collaboration with the initial setup!

Note that my Skylake-X/X299 system is up, absolutely stable and fully functional also under macOS 10.12.6 Sierra! The corresponding Skylake-X/X299 macOS 10.12 Sierra Desktop Guide can be found HERE!


A.) Hardware Overview


View attachment 294331

View attachment 294198

  • Monitor: LG 38UC99-W 38" curved 21:9 Ultra Wide QHD+ IPS Display (3840 pix x 1600 pix)
  • CPU/GPU Cooling: Water Cooling main components:

B.) BIOS Configuration

Please find below the summary of my actual Asus X299 Prime Deluxe BIOS settings and some likely already outdated Gigabyte X299 Aorus Gaming 9 BIOS settings, which I used during my initial testing period. Any user feedback that provides more actual settings for the latter mainboard is appreciated and will be immediately implemented.


B1.) ASUS BIOS Configuration

Before applying the specific settings, please provide your ASUS X299 Prime Deluxe with the actual and hopefully best working BIOS firmware.

View attachment 276484
After Updating System time and System Date, enable X.M.P for your DDR4 modules. Don't forget to enable the EZ XMP Switch previously to this step on your ASUS Mainboard! Subsequently switch form the easy to the advanced ASUS BIOS Setup mode by pressing F7.

View attachment 276341

I use all optimized BIOS settings (OoB, no OC yet) despite a few changes listed in detail below:

1.) /AI Tweaker/
a.) ASUS MultiCore Enhancement: Auto [optional "Disabled", see important notification below!]
b.) AVX Instruction Core Ratio Negative Offset: "3" [optional "Auto", see important notification below!]
c.) AVX-512 Instruction Core Ratio Negative Offset: "4" [optional "Auto", see important notification below!]
d.) CPU Core Ratio: Sync All Cores [optional "Auto", see important notification below!]
e.) CPU SVID Support: Enabled [fundamental for proper IPG CPU power consumption display]
f.) DRAM Frequency: DDR4-3200MHz
2.) /AI Tweaker/Internal CPU Power Management/
a.) Enhanced Intel Speed Step Technology: Disabled
3.) /Advanced/CPU Configuration/
a.) Hyper Threading [ALL]: Enabled
4.) /Advanced/CPU Configuration/CPU Power Management Configuration/
a.) Enhanced Intel Speed Step Technology (EIST): Enabled [fundamental for proper IPG CPU power consumption
display]
b.) Autonomous Core C-States: Enabled
c.) Enhanced Halt State (C1E): Enabled
d.) CPU C6 report: Enabled
e.) Package C-State: C6(non retention) state
f.) Intel SpeedShift Technology: Enabled (smooth CPU IDLE frequencies)
g.) MFC Mode Override: OS Native​
5.) /Advanced/Platform Misc Configuration/
a.) PCI Express Native Power Management: Disabled
b.) PCH DMI ASPM: Disabled
d.) ASPM: Disabled
e.) DMI Link ASPM Control: Disabled
f.) PEG - ASMP: Disabled
6.) /Advanced/System Agent Configuration/
a.) Intel VT for Directed I/O (VT-d): Disabled (see VT-d notification below)
7.) /Boot/
a.) Fast Boot: Disabled
b.) Above 4G Decoding: Off
c.) Set your specific Boot Option Priorities
8.) /Boot/Boot Configuration
a.) Boot Logo Display: Full Screen
b.) Boot up NumLock State: Disabled
c.) Setup Mode: Advanced
9.) /Boot/Compatibility Support Module/
a.) Launch CSM: Disabled​

10.) /Boot/Secure Boot/
a.) OS Type: Other OS
With F7 and F10 you can save the modified BIOS settings.

Important Notes:

"ASUS MultiCore Enhancement": When set to "Auto", MCE allows you to maximise the overclocking performance optimised by the ASUS core ratio settings. When disabled, MCE allows to set to default core ratio settings.

"CPU Core Ratio - Sync All Cores": Tremendous increase in CPU performance can be achieved with the CPU Core Ratio set to "Sync All Cores". In case of the i9-7980XE, the Geekbench score difference is approx. 51.000 (disabled) compared to 58.000 (enabled)! Note however, that Sync All Cores should be used only in case of the availability of an excellent and extremely sophisticated water cooling system! Otherwise, CPU Core Ratio should be set to "Auto". Further note that with CPU Core Ratio set to "Sync All Cores", the AVX Instruction Core Ratio Negative Offset must be set to "3" and the AVX-512 Instruction Core Ratio Negative Offset must be set to "5". Without the correct core ratio offsets, your system might become unstable with CPU Core Ratio set to "Sync All Cores"!

VT-d Note: For compatibility with VM or parallels, VT-d can be also ENABLED... Verify however, in this case that in your config.plist the boot flag "dart=0" is checked under Arguments in the "Boot" Section of Clover Configurator!

Intel(R) Power Gadget (IPG) CPU Power Consumption note: for the proper display of the CPU Power Consumption in e.g. the Intel(R) Power Gadget it is absolutely mandatory to enable both /AI Tweaker/CPU SVID Support/ and /Advanced/CPU Configuration/CPU Power Management Configuration/Enhanced Intel Speed Step Technology (EIST)

CPU Core Voltage Correction for ASUS X299 mainboard users: The ASUS Skylake-X BIOS microcode implementation is still somewhat buggy. With "/AI Tweaker/CPU Core Voltage/" set to "Auto", the CPU Core Voltages assigned to your Skylake-X CPU might be simply too high. This actually does not only affect the OSX but also the Windows performance in the same way!

View attachment 300826

In consequence and with certain programs like Logic Pro, CPU Core voltages can suddenly drop to minimum values and active cores can suddenly reduce to 1, very likely for the sake of system stability and security.

It is therefore strongly recommended to fix the CPU Core Voltage in the ASUS mainboard bios to a minimum value that still provides full system performance under CPU max. load conditions and still allows your system to boot without issues. With CPU max. load conditions I refer to the max. turbo frequency (e.g. 4.4 Ghz for the i9-7980XE) applied to ALL cores!

The optimal CPU Core Voltage setting can be retrieved within the following iterative approach:

Note that the iterative approach detailed below assumes the BIOS settings described in Section B1) - point 1) to 10) above, however by considering the following else optional settings:

i.) "ASUS MultiCore Enhancement" set to "Auto"
ii.) "CPU Core Ratio" set to "Sync All Cores"
iii.) "AVX Instruction Core Ratio Negative Offset" set to "3"
iv.) "AVX-512 Instruction Core Ratio Negative Offset" set to "4"​

1.) Boot into Windows and launch ASUS CPU-Z as well as Cinebench.

2.) Run Cinebench CPU benchmarks and watch the Core VID values in CPU-Z under CPU max.load conditions. These values will
usually exceed 1.2V with "/AI Tweaker/CPU Core Voltage/" set to "Auto"​


3.) To optimise the "/AI Tweaker/CPU Core Voltage/" perform the following steps:

a.) Enter the BIOS, go to "/AI Tweaker/CPU Core Voltage/" and change from "Auto" to "Manual"

b.) Enter a slightly lower CPU Core Voltage Overrride (e.g. typically 0.01 V less) than originally observed with CPU-Z
under Cinebench CPU benchmark max.load conditions in Windows, e.g. 1.190 V in the first iteration.

View attachment 300828
c.) Reboot into windows and check if the Cinebench CPU benchmark scores are still in the expected range by also controlling
the respective Core VID values during the Cinebench CPU benchmark max. load conditions
d.) Repeat b.) and c.) until either your Cinebench CPU benchmarks scores start to significantly decrease or you start facing
problems in booting your system. Given my personal experience with the i9-7980XE, a CPU Core Voltage Override of 1.120 V might be optimal in any case if one does not perform any OverClocking! In case of OC, the optimal CPU Core Voltage can certainly also exceed 1.2 V, e.g. 1.32 V with a i9-7900X @ 5 Ghz OC (perfect and delidded sample), however a sophisticated water block circuit is absolutely mandatory in this case! Therefore, always watch also your CPU temps in addition when performing this iterative CPU Core Voltage Override Value Optimisation, which should not exceed 90 deg C under CPU max. load conditions!
Warning!
Before performing the CPU Core Voltage Override Value Optimisation Approach, save your actual BIOS settings to a USB Drive. If during the iterative approach you are not able to successfully boot your system, perform a CMOS reset and restore your BIOS settings from the USB Drive, by subsequently entering the last successful CPU Core Voltage Override value!
Never but never enter CPU Core Voltage Overrride values larger than 1.xx V! Too high voltages (e.g. 2-10 V) can severely damage your CPU! Thus, never forget about the comma after the 1!!! Note if you perform this iterative CPU Core Voltage Override Value Optimisation Procedure, you perform it at your own risk!

Many thanks to @DSM2 for all his comments, valuable input, and proposed solutions.


B2.) - Initial Gigabyte BIOS Configuration

Please note once more, that my Gigabyte BIOS settings initially used and such summarised below, might not reflect the actual optimum choice for this mainboard. Any user feedback is appreciated and welcome. In any case, before applying the specific settings listed below, please provide also your Gigabyte X299 Aorus Gaming 9 with the actual and hopefully best working BIOS firmware.

View attachment 276340

1.) /M.I.T/Advanced Frequency Settings/
a.) Extreme Memory Profile: (X.M.P): Profile1
2.) /M.I.T/Advanced Frequency Settings/Advanced CPU Core Settings
a.) Active Cores Control: Manual
b.) Hyper-Threading Technology: Enabled
c.) Enhanced Multi-Core Performance: enabled/disabled (optional; individual CPU compatibility yet to be verified)
d.) CPU Enhanced Halt (C1E): Enabled
e.) C6/C7 State Support: Enabled
f.) Package C State limit: C6
g.) CPU EIST Function: Disabled
3.) /M.I.T/Advanced Memory Settings/
a.) Extreme Memory Profile (X.M.P): Profile1
4.) /BIOS/
a.) Boot Numlock State: Disabled
b.) Security option: Setup
c.) Full Screen Logo Show: Enbabled
d.) Fast Boot: Disabled
e.) CSM Support: Disabled
5.) /BIOS/Secure Boot/
a.) Secure Boot Enable: Disabled​

6.) /Peripherals/USB Configuration/
a.) XHCI Hand-off: Enabled
7.) /Chipset/
a.) VT-d: Disabled (see VT-d notification in Section ASUS BIOS settings above)​

8.) /Save& Exit/
a.) Save & Exit​


C.) Important General Note/Advice and Error Prevention

Please note the following important General Note / Advice and Error Prevention, when setting up your Skylake-X/X299 System and implementing the latest respective macOS distribution.

1.) Excellent news my friends! With Clover_v2.4k_r4233 (already implemented in EFI-X299-10.13.2-Release-161217.zip),
for the first time ever, one can directly use Clover's OsxAptioFix2Drv-64.efi in /EFI/CLOVER/drivers64UEFI/ to obtain a fully functional and fully stable system. Earlier versions of OsxAptioFix2Drv-64.efi resulted in unstable system performance and random reboots. Over the years, I therefore previously always employed the OsxAptioFix2Drv-free2000.efi workaround in /EFI/CLOVER/drivers64UEFI/, which now has become totally obsolete! The latter workaround occasionally resulted in memory allocation errors at the very initial boot step with the following error message​


while during system operation, OsxAptioFix2Drv-free2000.efi however always yielded a very stable and fully functional MacOS System. In any case, with the current removal of OsxAptioFix2Drv-free2000.efi, also the memory allocation errors at boot totally vanished. My Skylake-X/X299 System no shows a brilliant performance during both boot and system operation!​

2.) a.) All ATI Graphics Cards Users with typical rudimentary and basic Starter ATI Graphics Cards like the 2GB ATI Radeon
RX 560 should use WhateverGreen.kext v1.1.3 and Lilu.kext v1.2.1. In addition, please edit the config.plist with Clover Configurator and check "Inject ATI" in the "Graphics" Section of the Clover Configurator, as it is not checked by default. Don't forget to save the modified config.plist.

Users of ATI graphics cards different from the 2GB ATI Radeon RX 560 or natively supported by MacOS High Sierra 10.13, are advised to use an adequate kext configuration (if necessary at all) and modified conifg.plist configuration for their specific and particular ATI graphics card.

b.) All Nvidia Graphics Cards Users can now employ officially distributed Nvidia 10.13 Web Drivers for their Nvidia
Pascal and Maxwell graphics cards since the Final Release of macOS High Sierra 10.13! Nvidia Kepler Cards were anyway already natively implemented in the earlier beta distributions of macOS 10.13. It is obvious, that in consequence, the Web Driver Workaround based on the 10.12.6 Web Driver, used during the beta testing, is obsolete.

If you still use the 10.13 web driver workaround, perform all steps indicated below to uninstall the patched 10.12.6 NVIDIA Web Driver and the NVIDIA Web Driver Manager primer to the MacOS High Sierra Update!!!!

i.) Open the NVIDIA Driver Manager in the menu bar item.

ii.) Click on the padlock icon and enter your Administrator password.

iii.) Click the Open Uninstaller button.

iv.) Click Uninstall and continue with the de-installation. Reboot your system as indicated

v.) Install the native vanilla macOS High Sierra 10.13 AppleGraphicsControl.kext with the appropriate permission in
/S/L/E/ by means of Kext Utility.
If you currently use a former officially distributed Nvidia 10.13 web driver, perform all steps indicated below to uninstall this NVIDIA Web Driver and it's NVIDIA Web Driver Manager primer to the MacOS High Sierra Update!!!

To do so, just perform steps a.) to d.) above primer to the MacOS Update!
If you do not remove the former Nvidia Web Drivers primer to the MacOS Update, your System will be unbootable after the MacOS Update!!!

For further details and error prevention see Section E.2).
3.) This error prevention seems already obsolete. During former macOS 10.13 clean install/upgrade attempts one received
the following firmware verification error notification in case of connecting additional windows drives to the System:

View attachment 273336

It was therefore mandatory to unplug any Windows NVMe, SSD or HDD drives connected in case of a dual boot configuration...
4.) In the EFI-folder of EFI-X299-10.13.2-Release-161217.zip attached at the end of this originating post/guide,
one finds the EmuVariableUefi-64.efi in the /EFI/CLOVER/drivers64UEFI/-directory. Note the following very important advice and error prevention:

a.) If present in the EFI-directory of your USB Flash Drive Installer, the following error message might occur during
the macOS system installation/upgrade:

View attachment 276338

Thus, please remove the EmuVariableUefi-64.efi from the /EFI/CLOVER/drivers64UEFI/-directory of your USB Flash Drive Installer!

b.) Note however, that it is absolutely mandatory to have the EmuVariableUefi-64.efi implemented in the
/EFI/CLOVER/drivers64UEFI/-directory of the System Disk!

The reason is the following: at the end of the macOS installation/update process (icloud registration of your system) or during each boot of your system disk, you need to correctly transmit your SMBIOS credentials, like Serial Number, UUID, ROM and Board Serial Number, etc. (previously created during the SMBIOS definition process detailed below) to iCloud. On systems with iMac17,1 SMBIOS definition and X299-mobo, this crucial step only can be successfully performed by means of EmuVariableUefi-64.efi! Remember, that due to Error Prevention 4.a) above, the EmuVariableUefi-64.efi file is however omitted in the USB Flash Drive Installer's EFI partition. Thus, as once more indicated in more detail in Sections D.1/12.) and D.2/12.) below, in the last step of the MacOS Install or Update procedure one has to boot the MacOS Installer Partition on the System Disk with the EFI-partition on the System Disk, which opposite to the EFI-directory on the USB Flash Driver Installer indeed contains the EmuVariableUefi-64.efi as configured above. If in this last step of the macOS install/update procedure, the EmuVariableUefi-64.efi is missing in the respective EFI-directory at boot, one will be able to sign into iCloud but will subsequently neither be able to use iMessage nor Facetime! This fundamental problem only can be solved by signing out from iCloud by previously unchecking in Apple's Photos Application under "Preferences" the options "iCloud Photo Library", "My Photo Stream" and "iCloud Photo Sharing", and by subsequently repeating all necessary steps detailed in @P1LGRIM 's "An iDiots's Guide To iMessage" and also considering a few additional own comments and modifications detailed in D.1/4.c), D.1/4.d) and D.2/4.c) below.
5.) Avoid any MacOS assignments in KextToPatch and KernelToPatch entries implemented in the "Kernel and Kext Patches"
Section of the Clover Configurator. If subsequently in my Guide you still find MatchOS assignments in respective figures or text, just ignore all likely yet persistent MatchOS assignments. In the config.plist of the EFI-Folder contained in EFI-EFI-X299-10.13.2-Release-161217.zip, all MatchOS assignments have been definitely removed.
6.) The /EFI/Clover/kexts/Other/ directory of my previously distributed EFI-Folder contained a fully functional and
operational XHC USB Kext (KGP-ASUSPrimeX299Deluxe-USB.kext), which successfully implemented all XHC USB 2.0 and USB 3.0 ports available on the ASUS Prime X299. Already with MacOS High Sierra Supplemental Update (SU), Error prevention 6.) has become obsolete also for all non ASUS Prime X299 boarders. With AppleIntelPCHPMC, Apple now natively implements IOPCIPrimaryMatchID "a2af8068" and AppleUSBXHCISPT. All external and internal XHC USB 3.0 (USB 3.1 Gen 1 Type-A) and USB 2.0 (USB 2.0 Gen 1 Type-A) ports should now natively work at expected data transfer rates (90 Mb/S (USB 3.0)and 40 MB/s (USB 2.0), respectively) for all X299 mainboards when using SMBIOS iMac17,1. The sophisticated XHC USB Kext Workaround is herewith obsolete, and my guide is now fully and directly compatible with all X299 mainboards also regarding XHC USB2.0 and USB3.0 functionality! Many thanks to @Ramalama for this important discovery! The only remaining drawback seems to consist in the current non-functionality of USB3.0 devices in USB2.0 ports. All external and internal USB 3.1 (USB 3.1 Gen 2 Type-A and Type-C) ports were natively implemented already before on different controllers than XHC and also work at data rates up to 140 MB/s. See Section E.4 of my guide.
7.) If you have the Thunderbolt EX3 PCIe extension card already successfully connected with your ASUS Prime X299
Deluxe and properly implemented in your system, disconnect any Thunderbolt 2 drives during the macOS installation/upgrade procedure. If however the Thunderbolt EX3 PCIe extension card yet has not been properly configured and implemented in your system, remove the card for the macOS Upgrade or Clean Install procedure.
8.) Note that on some systems it might be necessary to check the KernelPM Option in the "Kernel and Kext Patches
Section" of the Clover Configurator to successfully boot the respective system. Note that in the config.plist of the EFI-Folder attached below, this option is unchecked, as it is not required in case of the ASUS Prime X299 Deluxe.
9.) Always check that you have the most actual apfs.efi in the /EFI/CLOVER/drivers64UEFI/ - directories of your USB Flash
Drive Installer and System Disk (see D.1/4.e and D.2/4.d)!

The actual apfs.efi can be obtained by following the respective guideline detailed below:

a.) Download and install Pacifist for Mac.

b.) Copy the "Install macOS High Sierra.app" to your Desktop -> right-click with your mouse on the app and select
"Show Package Contents" -> click with the mouse on "Contents" and subsequently on "Shared Support" -> right-click with the mouse on "BaseSystem.dmg" and select "Open With" -> select "pacifist.app". Pacifist is now loading the "BaseSystem.dmg" package contents.
c.) Now click with the mouse on "usr" -> "standalone" -> "i386". After a right-click on apfs.efi, select "Extract to
Custom Location...". Choose your Desktop as Destination. Answer the subsequent question "Extract apfs.efi ?" with "Extract". You now have the most actual version of apfs.efi on your Desktop.
d.) If necessary (usually the /EFI/CLOVER/drivers64UEFI/ - directory of the EFI-Folder contained in
EFI-X299-10.13.2-Release-161217.zip already contains the most actual apfs.efi version), copy the actual apfs.efi to the /EFI/CLOVER/drivers64UEFI/ - directories of your USB Flash Drive Installer and System Disk (see D.1/4.e and D.2/4.d)!
10.) To avoid boot problems and for sleep/wake functionality (not verified yet), it is absolute mandatory to
have VoodooTSCSync.kext in the /EFI/CLOVER/kexts/Other/ directory of both USB Flash Drive and System Disk.

Please note that the VoodooTSCSync.kext attached at the end of this originating post/guide is configured for a 6-core CPU (12 threads) like the i7-7800X. To adopt the kext for Skylake-X processers with more or less cores than 6 cores, apply the following approach:

a.) Download and unzip the VoodooTSCSync.kext attached at the end of this originating post/guide to your desktop.

b.) Right-click with the mouse on the VoodooTSCSync.kext file and select "Show Packet Contents".

c.) Double-click with the mouse on /contents/ . After a right-click on the "Info.plist" file, select "Open with / Other".

Select the TextEdit.app and edit the "Info.plist" file.
d.) Use the "find"-function of TextEdit.app and search for the term "IOCPUNumber"

e.) Note that the adequate IOCPUNumber for your particular Skylake-X processor is the number of its threads -1, by

always keeping in mind that the number of it's threads is always 2x the number of it's cores.

Thus in case of the 6 core i7-7800X, the IOCPUNumber is 11 (12 threads - 1).

Code:
<key>IOCPUNumber</key>
<integer>11</integer>

By following this methodology, the correct IOCPUNumber for the 10-core i9-7900X would be (20 threads -1)

Code:
<key>IOCPUNumber</key>
<integer>19</integer>

and the IOCPUNumber for the 18-core i9-7980XE would result in (36 threads -1)

Code:
<key>IOCPUNumber</key>
<integer>35</integer>
f.) After adopting the IOCPUNumber for your particular Skylake-X processor, save the info.plist file and copy the
modified VoodooTSCSync.kext to the /EFI/CLOVER/kexts/Other/ - directories of both USB Flash Drive Installer and System Disk (see D.1/4.f and D.2/4.e)!
11.) Already during the last Beta Versions of macOS 10.13 High Sierra, Apple forced the beta users to use the new Apple file
system APFS in case of a Clean Install/update of MacOS High Sierra 10.13. Also within macOS High Sierra 10.13.2 this is the case. Most APSF incompatibilities with available system related software apparently have been already removed. The actual version of Carbon Copy Cloner (CCC) now supports the direct cloning of APFS system disks and hereby enables the previously missing option for APFS system backups. Until Boot-Loader Distribution Clover_v2.4k_r4210, it was also impossible to install the Clover Boot-Loader in the EFI-Partition of an APFS System Disk by means of the Clover Boot-Loader Installer Package. However, with actual Clover Boot-Loader Distributions, the Clover Boot-Loader Installation works absolutely flawless on APFS System Disks.
Note however, that currently it seems to be still impossible to format an APFS-disk with HFS+ by means of Apple's disk utility.

If you need to do format an APFS-disk with HFS+, use one of the following workarounds:

a.) Windows work around:

i.) Install UEFI Windows as described in E.5, 1.) to 5.). Download, install and run MiniTool Partition Wizard

ii.) Delete all partitions on your APSF-Disk. Else, leave the drive unformatted.

iii.) Back to OS X, format now the unformatted disk with HFS+ [(Mac OS Extended (Journaled)] and a GUID partition
table by means of Apple's Disk Utility and you are done!
The dual boot system with windows might be also helpful for some of the other preparatory error prevention steps mentioned above, if you do not have any Mac or older Hackintosh available.​
b.) OS X approach workaround:

In the Terminal app, type:

Code:
diskutil list

In the output which you can read by scrolling back, you will find all internal disks named /dev/disk0, /dev/disk1, depending upon how many physical disks are present in your system.

Making a note of the disk identifier for the disk you intend to format (you can eliminate risk by removing all but the intended target). Subsequently, you can partition and format the entire disk as HFS+ by typing the following terminal command:

Code:
diskutil partitionDisk /dev/diskX 1 GPT jhfs+ "High Sierra" R

where /dev/diskX is the disk identifier mentioned above and High Sierra will be the label for the single partition created. The remaining 1 GPT jhfs+ and R arguments tell diskutil to create a single partition, within a GUID partition table, formatted as Journaled HFS+ and using the entire disk, respectively. Thanks to @dwhitla for respective advices and implementations.

Alternatively one can also use the following terminal command:

Code:
diskutil partitionDisk /dev/diskX GPT JHFS+ New 0b

where /dev/diskX is again the disk identifier mentioned above and NEW is again the label for the disk partition created. The GPT HFFS+ and 0b arguments again tell diskutil to create a single partition, within a GUID partition table, formatted as Journaled HFS+ and covering the entire disk, respectively.
Important additional Note:

i.) Both approaches might be also useful in successfully formatting newly implemented factory pre-formatted NVME, SSD or
HDD drives, which cannot be directly formatted by means of Apple's disk utility.
ii.) By means of the second OS X approach, brand new unformatted or not compatibly formatted system NVMe, SSD and
HDD system drives can be also directly formatted within the macOS Clean Install procedure.

When presented with the initial install screen where you are presented options to Restore From Backup or Install, select Terminal from the Utilities menu bar item;

When entering the disk util terminal command, there will be many virtual volumes in the output due to the installer having created temporary memory-resident disks. At the top of this output which you can read by scrolling back, you will see all internal disk(s) marked (internal).

Note however, that the previously unformatted system disk must contain the appropriate EFI-Folder in it's EFI partition for a successful macOS installation! In the final step of the macOS installation, you have to boot your system disk with the EFI-Folder of the latter! Thus, it is recommended to format and properly setup the system disk before and not during the macOS Installation!
iii.) The diskutil terminal approach is also able to convert a HFS+ macOS High Sierra 10.13 System Disk to APFS.

To do so enter the following terminal command:

Code:
diskutil apfs convert /dev/diskX
12.) All ASUS Prime X299 Deluxe users, who enabled the second LAN controller in the ASUS Prime X299 Deluxe BIOS, are
advised to download, unzip and copy the SmallTree-Intel-211-AT-PCIe-GBE.kext to the EFI-Folders of both USB Flash Drive Installer and 10.13 System Disk, or to disable the second LAN port in the BIOS during the MacOS Installation.
13.) Lilu and Lilu Plugin distribution remarks:

Previously, I witnessed boot kernel panics (KP) on my Skylake-X/X299 system when implementing Lilu.kext v1.2.0, AppleALC.kext v1.2.0 and NvididaGraphicsFixup.kext v1.2.0 in /EFI/CLOVER/kexts/Other/ or /L/E/ (including LiluFriend.kext in the latter directory). The KPs only could be avoided with the additional boot flag -lilulowmem

The Lilu KPs might have been caused by a borked kextcache. However, even a kextcache rebuild with the following terminal commands

Code:
sudo touch /Library/Extensions && sudo kextcache -u /

sudo touch /System/Library/Extensions && sudo kextcache -u /

did not solve the issue. KPs caused by Lilu v1.2.0 and AppleALC 1.2.0 remained...

Thanks to the actual changes by @vit9696 in the Lilu.kext v1.2.1 source distribution, Lilu.kext v1.2.1 now behaves again similar to v1.1.x and all KP issues totally vanished.

To always access, download and compile the most actual but not yet officially released Lilu and Lilu plugin distributions, follow these links:

a.) Lilu Source distribution
b.) AppleALC Source Distribution
c.) NvidiaGraphicsFixup

To successfully compile the AppleALC and NvidiaGraphicsFixup source code distributions with Xcode 9.2 under macOS High Sierra 10.13.2, download, unzip and copy the respective actual Lilu DEBUG distribution to the AppleALC and NvidiaGraphicsFixup source code distribution directories. To compile the respective Lilu, AppleALC, and NvidiaGraphicsFixup source code distributions just execute the terminal command "xcodebuild" after changing to the respective source code distribution with the "cd" terminal command. The resulting compiled kexts can be always found in the respective /build/Release/ sub-directories of the respective source code distribution directories.

Note that I also added a new KernelToPatch entry to the config.plist contained in EFI-X299-10.13.2-Release-161217.zip in the Kernel and Kext Patches Section of Clover Configurator

Code:
Find: 8A 02 84 C0 74 44  Replace: 8A 02 84 C0 EB 44    Comment: Lilu 1.2.x Debug

for Lilu 1.2.x debug reasons.

Further details to the topic can be accessed by following THIS LINK.

14.) To clearly get kernel panic images with a call trace in case of kernel panics, I implemented (checked) boot flags
"debug=0x100" and "keepsyms=1" in the config.plist of EFI-X299-10.13.2-Release-161217.zip in the "Boot" Section of Clover Configurator under "Arguments".​


D.) macOS 10.13 High Sierra System Setup

Below, one finds a detailed description for the Clean Install of macOS High Sierra 10.13 or subsequent updates of the latter operating System.


D.1) macOS High Sierra 10.13 Clean Install on Skylake-X/X299
I suggest to follow the individual steps below to successfully setup the latest version of macOS High Sierra 10.13 on a virgin test drive of your choice (NVMe or SSD or HDD).

1.) In order to perform a clean install of macOS High Sierra 10.13, prepare a USB Flash Drive (source, named USB) and a
NVMe or SDD or HDD destination drive fo your macOS installation by formatting both drives with HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility on any other Hackintosh or Mac of your choice. This will create an empty HFS+ Partition and a yet empty EFI-partition on each drive.​

2.) Download the macOS High Sierra 10.13 full package installer from the Mac App Store.

3.) Once the Installer is in the Application-directory of your system disk, connect your USB Flash Drive (named USB) and run
the following terminal command:​

Code:
sudo /Applications/Install\ macOS\ High\ Sierra.app/Contents/Resources/createinstallmedia --volume /Volumes/USB --applicationpath /Applications/Install\ macOS\ High\ Sierra.app --nointeraction

Alternatively, on can create the macOS USB Flash Drive Installer also by means of the Install Disk Creator.app
4.) Now perform the following steps detailed below.

a.) Copy the EFI directory being part of EFI-X299-10.13.2-Release-161217.zip (attached at the end of this
originating post/guide) to the empty EFI partitions of both your USB Flash Drive and your macOS Install destination drive (system disk). Remove the EmuVariableUefi-64.efi from the /EFI/CLOVER/drivers64UEFI/-directory of your USB Flash Drive Installer!

Important additional note for all newbies (implemented on user request):

The empty EFI-partitions can be mounted by means of e.g. Clover Configurator.

View attachment 282088

Just select the "Mount" menu (1.), mount any partition displayed by means of "Mount Partition" (2.) and subsequently open it's EFI-Folder with "Open Partition" (3.). The latter function opens an Apple File Manager, which allows to copy, paste, delete anything on/to or from the respective EFI Partition. Ones your manipulation of the respective EFI-Folder is finished, select "unMount Partition" (4). By means of the latter command, the EFI-Folder will be unmounted and disappear again. Don't forget that Clover Configurator is also a mighty tool for config.plist editing and configuration! We therefore will use it many times along this guide!
b.) In case that EFI directory being part of EFI-X299-10.13.2-Release-161217.zip once would not contain the most
actual clover distribution (which presently is not the case) download and install the latest clover distribution by verifying the proper Install-Location (again you have to do it twice for your USB Flash Drive and your System Disk) by customizing (don't press "Install" but "Customize" before) the following clover install-options:​
  • Install for UEFI booting only
  • Install Clover in the ESP
  • Select the Bootloader Themes you want to install
  • Enable Install RC scripts on target volume
  • For the clover installation on your USB Flash Drive, check "CsmVideoDxe-64" under "Drivers64UEFI" (to comply with error prevention C.4.a.). For the clover installation on your system disk, check "CsmVideoDxe-64" and "EmuVariableUefi-64" under "Drivers64UEFI" (to comply with error convention C.4.b). Since Clover_v2.4k_r4233, also check "OsxAptioFixDrv-64" but uncheck all other EFI-driver options under "Drivers64UEFI" for the clover installation on both drives!
  • Select Install RC scripts on target volume
  • Select Install Clover Preference Pane
c.) Open the config.plist on your system disk with the latest version of the Clover Configurator, proceed to the
"SMBIOS" Section and complete the Serial Number, Board Serial Number and SMUUID entries as detailed below in order to successfully install and run macOS High Sierra 10.13 on your Skylake-X/X299 System, free of issues or limitations with respect to iMessage and Facetime Functionality. IMPORTANT NOTE: In order to successfully run XCPM with Pike Alpha's ssdtPRGen.sh and ssdt.aml, you have to maintain the iMac17,1 SMBIOS entries already implemented in the config.plist of the EFI-Folder attached below.
i.) Press several times the "Generate New" Button next to serial number text field. Copy the serial number and
perform the serial number check on http://www.everymac.com/ultimate-mac-lookup/ by following @P1LGRIM 's related instructions in "An iDiots's Guide To iMessage".
ii.) Also perform the serial number check on https://checkcoverage.apple.com by following
@P1LGRIM 's related instructions in "An iDiots's Guide To iMessage".

If all checks have been past successfully, proceed to point iii.) below.
iii.) Note that the latest versions of Clover Configurator already correctly implements the Board Serial Number in
parallel. Thus one can skip the related description in@P1LGRIM 's "An iDiots's Guide To iMessage".
iv.) In the final step, open a terminal, enter repeatedly the command "uuidgen", and copy the output value to
the SMUUID field in the "SMBIOS" Section of the Clover Configurator.
Save the config.plist on your system disk.​
d.) Transfer the correct Serial Number, Board Serial Number and SMUUID also to the config.plist of your USB Flash Drive.

e.) Verify that you have the correct apsf.efi file in the /EFI/CLOVER/drivers64UEFI/ directories of your USB Flash Drive and
System Disk by following error prevention C/9.).
f.) Copy the appropriate VoodooTSCSync.kext, which you modified by following error prevention C/10.), to the
/EFI/CLOVER/kexts/Other/ - directories of both USB Flash Drive and System Disk!
Both drives are now ready for installation. Reboot your System.

5.) While booting, press the F8 button to enter the BIOS boot menu. Select to boot from your USB Flash Drive.

6.) Subsequently, click on the USB Flash Drive Icon in the clover boot menu to boot the respective macOS High Sierra Installer
on your USB Flash Drive.​

7.) After successful boot, pass the individual steps of the macOS high Sierra 10.13 installation menu and finally select the
destination drive of your macOS High Sierra 10.13 Installation, which should be logically the system disk you successfully configured above. In the next step, the Installer will create a macOS High Sierra 10.13 Installer Partition on the system disk and subsequently reboot your system.​

8.) During system reboot, just press again the F8 button to enter the BIOS boot menu. Select again to boot from your USB
Flash Drive. In contrary to 6.), click this time on the "Install MacOS on Drive XXX" Icon on the clover boot screen to boot the newly created macOS High Sierra 10.13 Installer Partition on your system disk.​

9.) After successful boot, you will enter now the macOS High Sierra 10.13 Installer Screen with a progress bar starting at
18 minutes. This is normally also the moment when either error 3.) or 4a.) occurs if you did not properly follow my instructions for error prevention above. In any case, if everything goes fine and there is no error message, the installer will again reboot your System just after a few couple of minutes. Don't be scared, this just seems to be part of the correct overall installation procedure!
10.) During system reboot press again the F8 button to enter the BIOS boot menu. Select again to boot from your USB
Flash Drive. Click again on the "Install MacOS on Drive XXX" Icon on the clover boot screen to boot once more the macOS High Sierra 10.13 Installer Partition on your system disk!
11.) After successful boot, you will enter once more the macOS High Sierra 10.13 Installer Screen with the progress bar
starting now at about 41 minutes of remaining installation time. This time is actually really roughly also the time the subsequent installation will require. When approaching a remaining time of 17 minutes for installation, the installer will once more reboot your System!​

12.) Now the important final step of the macOS install procedure as commented already several times before! During the last
system reboot towards the end of the MacOS installation process, press again the F8 button to enter the BIOS boot menu. However, in the BIOS boot menu select this time to boot from your system disk, with the EFI-folder that also contains the EmuVariableUefi-64.efi file (this is fundamental for a the correct registration of your system in iCloud, as the final requisite of the entire macOS installation process) and subsequently select and boot the new macOS High Sierra 10.13 Partition on your 10.13 system disk in the Clover Boot menu. By booting the final step of the macOS High Sierra Clean Install process without the EmuVariableUefi-64.efi in the EFI-Folder (remember that we omitted on purpose this efi-file in the EFI-Folder of the USB Flash Drive Installer to fulfill error prevention 4.a), your "ROM" and "Board Serial Number" SMBIOS confidential would be erroneously transmitted to iCloud because of the SMBIOS iMac17,1 definition and the fact that you use a X299 board. In case of transmitting erroneous SMBIOS information, you will be able to register your System in iCloud, like nothing would have happened or failed.. However when subsequently trying to use "iMessage" or "Facetime" on your system drive, you will not be able to perform the once more requested registration with your correct Apple-ID and Password in order to successfully run the two latter Apple Services. As already indicated under error prevention 4b.), the latter issue only can be solved by signing out from iCloud, by previously unchecking in Apple's Photos Application under "Preferences" the options "iCloud Photo Library", "My Photo Stream" and "iCloud Photo Sharing", and by subsequently repeating all necessary steps detailed in @P1LGRIM 's "An iDiots's Guide To iMessage" by considering also my additional modifications and comments detailed under D.1/4.c) and D1/4.d) above!

13.) After successfully completing the iCloud registration, you now successfully finished the macOS High Sierra Clean
Installation Process on your X299 / Skylake-X System, unless you want to still want to migrate data and programs from a system different from your current Skylake-X/X299 build.
14.) Continue with the Post Installation Process detailed in Section E.) below.


D.2) macOS High Sierra 10.13 Upgrade on Skylake-X/X299
If you already previously successfully performed a macOS High Sierra 10.13 Clean Install or Upgrade to a more advanced macOS High Sierra Distribution on your Skylake-X/X299 System and you now want to provide your System with latest version of macOS High Sierra 10.13, follow all suggestions indicated below.

1.) Backup the EFI-Folders of both previous USB Flash Drive Installer and 10.13 System Disk. Also backup your 10.13 System
Disk itself, e.g. by cloning your current 10.13 System Disk by means of Carbon Copy Cloner (CCC).​

2.) In order to perform the update of macOS High Sierra 10.13, format your former USB Flash Drive (source, named USB) with
HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility.​

3.) Download the macOS High Sierra 10.13 full package installer from the Mac App Store. Once the Installer is in the
"Application" directory of your system disk, connect your USB Flash Drive (named USB) and run the following terminal command:​

Code:
sudo /Applications/Install\ macOS\ High\ Sierra.app/Contents/Resources/createinstallmedia --volume /Volumes/USB --applicationpath /Applications/Install\ macOS\ High\ Sierra.app --nointeraction

Alternatively, on can create the macOS USB Flash Drive Installer also again by means of the Install Disk Creator.app
4.) Now perform the following steps detailed below.

a.) Replace the former EFI-directories of both USB Flash Drive Installer and 10.13 System Disk with the EFI-directory being
part of EFI-X299-10.13.2-Release-161217.zip (attached towards the end of of this originating post/guide). Remove the EmuVariableUefi-64.efi from the /EFI/CLOVER/drivers64UEFI/-directory of your USB Flash Drive Installer to comply with error prevention C/4.a)!
b.) In case that this EFI-Folder once would not contain the most actual clover distribution (which presently is not the case),
download and install the latest clover distribution on both, your USB Flash Drive and 10.13 System Disk by verifying the proper clover install location and by customizing (don't press "Install" but "Customize" before) the following clover install options:​
  • Install for UEFI booting only
  • Install Clover in the ESP
  • Select the Bootloader Themes you want to install
  • Enable Install RC scripts on target volume
  • For the clover installation on your USB Flash Drive, check "CsmVideoDxe-64" under "Drivers64UEFI" (to comply with error prevention C.4.a.). For the clover installation on your system disk, check "CsmVideoDxe-64" and "EmuVariableUefi-64" under "Drivers64UEFI" (to comply with error convention C.4.b). Since Clover_v2.4k_r4233, also check "OsxAptioFixDrv-64" but uncheck all other EFI-driver options under "Drivers64UEFI" for the clover installation on both drives!
  • Select Install RC scripts on target volume
  • Select Install Clover Preference Pane
c.) Open the config.plist on your USB Flash Drive and 10.13 System Disk, proceed to the "SMBIOS" Section and complete
the yet empty Serial Number, Board Serial Number and SMUUID entries with your particular personal values derived during the initial clean install of MacOS High Sierra 10.13 detailed in D.1/4.c).
Save the config.plists on your USB Flash Drive and 10.13 System Disk.​

d.) Verify that you have the correct apsf.efi file in the /EFI/CLOVER/drivers64UEFI/ directories of your USB Flash Drive and
System Disk by following error prevention C/9.).
e.) Copy the appropriate VoodooTSCSync.kext, which you modified by following error prevention C/10.), to the
/EFI/CLOVER/kexts/Other/ - directories of both USB Flash Drive and System Disk!​

Both drives are now ready for MacOS upgrade. Reboot your System.

5.) While booting, press the F8 button to enter the BIOS boot menu. Select to boot from your USB Flash Drive.

6.) Subsequently, click on the USB Flash Drive Icon in the clover boot menu to boot the respective macOS High Sierra Installer
on your USB Flash Drive.​

7.) After successful boot, pass the individual steps of the macOS high Sierra 10.13 installation menu and finally select the
destination drive of your macOS High Sierra 10.13 Update, which should be logically your 10.13 System Disk. In the next step, the Installer will create a macOS High Sierra 10.13 Installer Partition on your 10.13 System Disk and subsequently reboot your system.​

8.) During system reboot, just press again the F8 button to enter the BIOS boot menu. Select again to boot from your USB
Flash Drive. In contrary to 6.), click this time on the "Install MacOS on Drive XXX" Icon on the clover boot screen to boot the newly created macOS High Sierra 10.13 Installer Partition on your 10.13 System Disk.​

9.) After successful boot, you will enter now the macOS High Sierra 10.13 Installer Screen with a progress bar starting at
18 minutes. This is normally also the moment when either error C/3.) or C/4.a) occurs if you did not properly follow my instructions for error prevention in C/3.) and C/4.a). In any case, if everything goes fine and there is no error message, the installer will again reboot your System just after a few couple of minutes. Don't be scared, this just seems to be part of the correct overall installation procedure!
10.) During system reboot press again the F8 button to enter the BIOS boot menu. Select again to boot from your USB
Flash Drive. Click again on the "Install MacOS on Drive XXX" Icon on the clover boot screen to boot once more the macOS High Sierra 10.13 Installer Partition on your 10.13 System Disk.
11.) After successful boot, you will enter once more the macOS High Sierra 10.13 Installer Screen with the progress bar
starting now at about 34 minutes of remaining installation time. This time is actually really roughly also the time the subsequent installation will require. When approaching a remaining time of 17 minutes for installation, the installer will once more reboot your System!​

12.) Now the important final step of the macOS update procedure as commented already several times before! During the last
system reboot towards the end of the MacOS update process, press again the F8 button to enter the BIOS boot menu. However, in the BIOS boot menu select this time to boot from your system disk, with the EFI-folder that also contains the EmuVariableUefi-64.efi file (this is fundamental for a the correct registration of your system in iCloud, as the final requisite of the entire macOS installation process) and subsequently select and boot the macOS High Sierra 10.13 Partition on your 10.13 system disk in the Clover Boot menu. By booting the final step of the macOS High Sierra Upgrade process without the EmuVariableUefi-64.efi in the EFI-Folder (remember that we omitted on purpose this efi-file in the EFI-Folder of the USB Flash Drive Installer to fulfill error prevention 4.a), your "ROM" and "Board Serial Number" SMBIOS confidential would be erroneously transmitted to iCloud because of the SMBIOS iMac17,1 definition and the fact that you use a X299 board. In case of transmitting erroneous SMBIOS information, you will be able to register your System in iCloud, like nothing would have happened or failed.. However when subsequently trying to use "iMessage" or "Facetime" on your system drive, you will not be able to perform the once more requested registration with your correct Apple-ID and Password in order to successfully run the two latter Apple Services. As already indicated under error prevention 4b.), the latter issue only can be solved by signing out from iCloud, by previously unchecking in Apple's Photos Application under "Preferences" the options "iCloud Photo Library", "My Photo Stream" and "iCloud Photo Sharing", and by subsequently repeating all necessary steps detailed in @P1LGRIM 's "An iDiots's Guide To iMessage" by considering also my additional modifications and comments detailed under D.1/4.c) above!

13.) After successfully completing the iCloud registration, you now successfully finished the macOS High Sierra Update Process
on your X299 / Skylake-X System.
14.) All Nvidia Graphics Cards Users will have to install the update the Web Driver as detailed in Section E.) below.

D.3) macOS High Sierra 10.13 Upgrade from macOS Sierra 10.12.6 on Skylake-X/X299


If you previously installed macOS Sierra 10.12.6 on your Skylake-X/X299 System by means of my Skylake-X/X299 macOS Sierra 10.12 Desktop Guide, the subsequent update to macOS High Sierra 10.13 is quite straight and easy, once the mandatory 10.13 EFI-Folder has been derived by following D.1.4.a) to D.1.4.f)!

1.) Prepare a USB Flash Drive (source, named USB) and a NVMe or SDD or HDD clone drive by formatting both drives with
HFS+ [(Mac OS Extended (Journaled)] and a GUID partition table by means of Apple's Disk Utility on your 10.12.6 Skylake-X/X299 Hackintosh or Mac of your choice. This will create an empty HFS+ Partition and a yet empty EFI-partition on each drive.​

2.) Clone your current macOS 10.12.6 System Disk by means of Carbon Copy Cloner (CCC) to the NVMe or SDD or HDD clone
drive which we will term hereafter 10.13 System Disk.​

3.) Download the macOS High Sierra 10.13 full package installer from the Mac App Store.

4.) Once the Installer is in the Application-directory of your system disk, connect your USB Flash Drive (named USB) and run
the following terminal command:​

Code:
sudo /Applications/Install\ macOS\ High\ Sierra.app/Contents/Resources/createinstallmedia --volume /Volumes/USB --applicationpath /Applications/Install\ macOS\ High\ Sierra.app --nointeraction

5.) Now create the 10.13 EFI-Folder on your USB macOS Flash Drive Installer and 10.13 System Disk (former 10.12.6 System
Disk Clone Drive) by following steps D.1.4.a) to D.1.4.f)! During this procedure you can also certainly merge already existing config.plist details with the config.plist contained in the EFI-Folder of EFI-X299-10.13.2-Release-161217.zip and skip all related steps in this part of the guide [e.g. D.1.4.c.), i.e. Board Serial Number, Serial Number and SmUUID, if already available from the previous 10.12.6 installation].

Both drives are now ready for the MacOS upgrade. Reboot your System.
6.) Now perform the MacOS High Sierra Upgrade by following point 5.) to 13.) of section D.2) [macOS High Sierra 10.13 Clean
Install]​

7.) Subsequently, perform all necessary steps of section E.) "Post Installation Process" detailed below!


E.) Post Installation Process


E1.) Xnu CPU Power Management (XCPM) Configuration

View attachment 272852

The EFI folder of EFI-X299-10.13.2-Release-161217.zip attached towards the end of this originating post/guide, already contains a fully functional XCPM configuration for all Skylake-X processors! And the excellent news are that XCPM is performing nearly native on Skylake-X/X299 systems. One just has to perform one single step to successfully run XCPM on the freshly installed Skylake-X/X299 system. Remember the necessity of the correct BIOS settings for each board detailed at the beginning of this guide.

When inspecting the config.plist in the EFI-folder of EFI-X299-10.13.2-Release-161217.zip (attached at the end of this originating post/guide) with the Clover Configurator, one immediately realises that there are just a view necessary patches to improve the overall XCPM performance or to properly display the Skylake-X properties in Apple's System Overview.

a.) The "Type" entry in the "CPU" section of the clover configurator

b.) The "FakeCPUID entry" in the Kernel and Kext Patches Section of the clover configurator.

View attachment 272829

a.) and b.) are just cosmetic entries to correctly show the CPU properties in Apple's System Overview. Else these patches are not essential for the fully functional and stable Skylake-X/X299 System.
c.) Note that the only XCPM KernelToPatch entry not disabled in the "Kernel and Kext Patches Section of the Clover
Conifgurator" is xcpm_core_scope_msrs, which is not mandatory for XCPM functionality but definitely improves the all-over XCPM performance... All other KernelToPatch entries are already natively supported!​


How to finalize the Skylake-X/X299 XCPM configuration:

1.) Verify with the terminal command "sysctl machdep.xcpm.mode" if the XCPM mode is active. If so,
"sysctl machdep.xcpm.mode" should return "1".​

2.) Download the latest Piker-Alpha's ssdtPRGen.sh distribution from Github.

3.) Drop ssdtPRGen.sh into a terminal and add the -turbo flag in case of OC (e.g. 4200 (Mhz), in case the turbo stock speed of
your Skylake-X processor is 4400 MHz, like in case of the i9-7980XE.​

Code:
./ssdtPRGen.sh  -turbo 4200

Result:

Code:
ssdtPRGen.sh v0.9  Copyright (c) 2011-2012 by † RevoGirl
[INDENT][INDENT][INDENT]     v6.6  Copyright (c) 2013 by † Jeroe[/INDENT]
     v21.5 Copyright (c) 2013-2017 by Pike R. Alpha[/INDENT][/INDENT][/INDENT]
-----------------------------------------------------------

Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <

System information: Mac OS X 10.13 (17A405)
Brandstring: "Intel(R) Core(TM) i9-7980XE CPU @ 2.60GHz"

Override value: (-turbo) maximum (turbo) frequency, now using: 4400 MHz!

Version: models.cfg v171 / Skylake.cfg v195

Generating ssdt.dsl for a 'iMac17,1' with board-id [Mac-B809C3757DA9BB8D]
Skylake Core i9-7980XE processor [0x50654] setup [0x0a05]
With a maximum TDP of 165 Watt, as specified by Intel
Number logical CPU's: 36 (Core Frequency: 2600 MHz)
Number of Turbo States: 18 (2700-4400 MHz)
Number of P-States: 37 (800-4400 MHz)
Injected C-States for CP00 (C1,C3,C6,C7,C8,C9,C10)
Injected C-States for CP01 (C1,C2,C3,C6,C7)
Warning: 'cpu-type' may be set improperly (0x0a05 instead of 0x0905)
[INDENT][INDENT]    - Clover users should read https://clover-wiki.zetam.org/Configuration/CPU#cpu_type[/INDENT][/INDENT]
Compiling: ssdt_pr.dsl
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20140926-64 [Nov  6 2014]
Copyright (c) 2000 - 2014 Intel Corporation

ASL Input:     /Users/kgp/Library/ssdtPRGen/ssdt.dsl - 729 lines, 20718 bytes, 240 keywords
AML Output:    /Users/kgp/Library/ssdtPRGen/ssdt.aml - 5700 bytes, 112 named objects, 128 executable opcodes

Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to open ssdt.dsl (y/n)? n
4.) Copy the SSDT.aml from ~/Library/ssdtPRGen/ to the /EFI/CLOVER/ACPI/patched/ directory of your system disk and
reboot​

5.) a.) Verify that in the ioRegistryExplorer you have now under CP00@0 the following entry:

Code:
Property:         Type:         Value:
plugin-type       Number        0x1

b.) Verify with the terminal command

Code:
kextstat|grep -y x86plat

that the "X86PlatformPlugin.kext" is now loaded. If the command returns something like

Code:
112    1 0xffffff7f822bc000 0x17000    0x17000    com.apple.driver.X86PlatformPlugin (1.0.0) FD88AF70-3E2C-3935-99E4-C48669EC274B <111 19 18 13 11 7 6 5 4 3 1>
146    1 0xffffff7f822d3000 0x7000     0x7000     com.apple.driver.X86PlatformShim (1.0.0) DCEA94A4-3547-3129-A888-E9D5C77B275E <112 111 13 7 4 3>

your are fine.​

c.) Verify with the terminal command

Code:
kextstat|grep -y appleintelcpu

that the Apple Intel CPU power management is not loaded. If the result is empty you are fine.​

d.) Verify with the following terminal command:

Code:
sysctl -n machdep.xcpm.vectors_loaded_count

that the Frequency-Vectors for the iMac17,1 are loaded. If the result is "1" you are fine. Note that there is no necessity for the addition injection of a Frequency-Vector fin case of SMBIOS iMac17,1, as the related plist file already has the Frequency-Vectors defined.​

6.) To deeply investigate your final XCPM functionality, download Piker Alpha’s AppleIntelInfo.kext from Github. To compile
the source code, you need to primarily install Xcode (Appstore) and Xcode Command Line Tools! This guideline might be helpful for the successfully installation of the latter. Important Note: AppleIntelInfo.kext is not yet compatible with the i9-7980XE! Executing the terminal command "sudo kextload AppleIntelInfo.kext" will result in an immediate reboot of your i9-7980XE/X299 System!

Now enter the following terminal commands:

Code:
cd ~/Downloads/AppleIntelInfo-master
xcodebuild
cd build/Release
chmod -R 755 AppleIntelInfo.kext
sudo chown -R root:wheel AppleIntelInfo.kext

Load the AppleIntelInfo.kext with "kextload" and "cat" the info-results with the following terminal commands:

Code:
sudo kextload AppleIntelInfo.kext

Code:
sudo cat /tmp/AppleIntelInfo.dat

The cat command should reveal something like the following result (note that due to the incompatibility of AppleIntelInfo.kext with the i9-7980XE, the implemented results still refer to the i7-7800X, which I used within my starter configuration):

Code:
AppleIntelInfo.kext v2.6 Copyright © 2012-2017 Pike R. Alpha. All rights reserved.
enableHWP................................: 0

Settings:
------------------------------------------
logMSRs..................................: 1
logIGPU..................................: 0
logCStates...............................: 1
logIPGStyle..............................: 1
InitialTSC...............................: 0x1eae01d2e134 (963 MHz)
MWAIT C-States...........................: 8224

Processor Brandstring....................: Intel(R) Core(TM) i7-7800X CPU @ 3.50GHz

Processor Signature..................... : 0x50654
------------------------------------------
- Family............................... : 6
- Stepping............................. : 4
- Model................................ : 0x55 (85)

Model Specific Registers (MSRs)
------------------------------------------

MSR_CORE_THREAD_COUNT............(0x35)  : 0x0
------------------------------------------
- Core Count........................... : 6
- Thread Count......................... : 12

MSR_PLATFORM_INFO................(0xCE)  : 0x70C2CF3012300
------------------------------------------
- Maximum Non-Turbo Ratio.............. : 0x23 (3500 MHz)
- Ratio Limit for Turbo Mode........... : 1 (programmable)
- TDP Limit for Turbo Mode............. : 1 (programmable)
- Low Power Mode Support............... : 0 (LMP not supported)
- Number of ConfigTDP Levels........... : 2 (additional TDP level(s) available)
- Maximum Efficiency Ratio............. : 12
- Minimum Operating Ratio.............. : 7

MSR_PMG_CST_CONFIG_CONTROL.......(0xE2)  : 0x403
------------------------------------------
- I/O MWAIT Redirection Enable......... : 1 (enabled, IO read of MSR(0xE4) mapped to MWAIT)
- CFG Lock............................. : 0 (MSR not locked)
- C3 State Auto Demotion............... : 0 (disabled/unsupported)
- C1 State Auto Demotion............... : 0 (disabled/unsupported)
- C3 State Undemotion.................. : 0 (disabled/unsupported)
- C1 State Undemotion.................. : 0 (disabled/unsupported)
- Package C-State Auto Demotion........ : 0 (disabled/unsupported)
- Package C-State Undemotion........... : 0 (disabled/unsupported)

MSR_PMG_IO_CAPTURE_BASE..........(0xE4)  : 0x11814
------------------------------------------
- LVL_2 Base Address................... : 0x1814
- C-state Range........................ : 1 (C6 is the max C-State to include)

IA32_MPERF.......................(0xE7)  : 0x33ABB963EAE
IA32_APERF.......................(0xE8)  : 0x3334D372818

MSR_FLEX_RATIO...................(0x194) : 0xE0000
------------------------------------------

MSR_IA32_PERF_STATUS.............(0x198) : 0x226D00002800
------------------------------------------
- Current Performance State Value...... : 0x2800 (4000 MHz)

MSR_IA32_PERF_CONTROL............(0x199) : 0x2800
------------------------------------------
- Target performance State Value....... : 0x2800 (4000 MHz)
- Intel Dynamic Acceleration........... : 0 (IDA engaged)

IA32_CLOCK_MODULATION............(0x19A) : 0x0

IA32_THERM_INTERRUPT.............(0x19B) : 0x0

IA32_THERM_STATUS................(0x19C) : 0x88460000
------------------------------------------
- Thermal Status....................... : 0
- Thermal Log.......................... : 0
- PROCHOT # or FORCEPR# event.......... : 0
- PROCHOT # or FORCEPR# log............ : 0
- Critical Temperature Status.......... : 0
- Critical Temperature log............. : 0
- Thermal Threshold #1 Status.......... : 0
- Thermal Threshold #1 log............. : 0
- Thermal Threshold #2 Status.......... : 0
- Thermal Threshold #2 log............. : 0
- Power Limitation Status.............. : 0
- Power Limitation log................. : 0
- Current Limit Status................. : 0
- Current Limit log.................... : 0
- Cross Domain Limit Status............ : 0
- Cross Domain Limit log............... : 0
- Digital Readout...................... : 70
- Resolution in Degrees Celsius........ : 1
- Reading Valid........................ : 1 (valid)

MSR_THERM2_CTL...................(0x19D) : 0x0

IA32_MISC_ENABLES................(0x1A0) : 0x850089
------------------------------------------
- Fast-Strings......................... : 1 (enabled)
- FOPCODE compatibility mode Enable.... : 0
- Automatic Thermal Control Circuit.... : 1 (enabled)
- Split-lock Disable................... : 0
- Performance Monitoring............... : 1 (available)
- Bus Lock On Cache Line Splits Disable : 0
- Hardware prefetch Disable............ : 0
- Processor Event Based Sampling....... : 0 (PEBS supported)
- GV1/2 legacy Enable.................. : 0
- Enhanced Intel SpeedStep Technology.. : 1 (enabled)
- MONITOR FSM.......................... : 1 (MONITOR/MWAIT supported)
- Adjacent sector prefetch Disable..... : 0
- CFG Lock............................. : 0 (MSR not locked)
- xTPR Message Disable................. : 1 (disabled)

MSR_TEMPERATURE_TARGET...........(0x1A2) : 0x640A00
------------------------------------------
- Turbo Attenuation Units.............. : 0
- Temperature Target................... : 100
- TCC Activation Offset................ : 0

MSR_MISC_PWR_MGMT................(0x1AA) : 0x401040
------------------------------------------
- EIST Hardware Coordination........... : 0 (hardware coordination enabled)
- Energy/Performance Bias support...... : 1
- Energy/Performance Bias.............. : 0 (disabled/MSR not visible to software)
- Thermal Interrupt Coordination Enable : 1 (thermal interrupt routed to all cores)

MSR_TURBO_RATIO_LIMIT............(0x1AD) : 0x2828282828282828
------------------------------------------
- Maximum Ratio Limit for C01.......... : 28 (4000 MHz)
- Maximum Ratio Limit for C02.......... : 28 (4000 MHz)
- Maximum Ratio Limit for C03.......... : 28 (4000 MHz)
- Maximum Ratio Limit for C04.......... : 28 (4000 MHz)
- Maximum Ratio Limit for C05.......... : 28 (4000 MHz)
- Maximum Ratio Limit for C06.......... : 28 (4000 MHz)

IA32_ENERGY_PERF_BIAS............(0x1B0) : 0x1
------------------------------------------
- Power Policy Preference...............: 1 (highest performance)

MSR_POWER_CTL....................(0x1FC) : 0x213C005B
------------------------------------------
- Bi-Directional Processor Hot..........: 1 (enabled)
- C1E Enable............................: 1 (enabled)

MSR_RAPL_POWER_UNIT..............(0x606) : 0xA0E03
------------------------------------------
- Power Units.......................... : 3 (1/8 Watt)
- Energy Status Units.................. : 14 (61 micro-Joules)
- Time Units .......................... : 10 (976.6 micro-Seconds)

MSR_PKG_POWER_LIMIT..............(0x610) : 0x43FFD0001AEA82
------------------------------------------
- Package Power Limit #1............... : 3408 Watt
- Enable Power Limit #1................ : 1 (enabled)
- Package Clamping Limitation #1....... : 0 (disabled)
- Time Window for Power Limit #1....... : 13 (20480 milli-Seconds)
- Package Power Limit #2............... : 4090 Watt
- Enable Power Limit #2................ : 1 (enabled)
- Package Clamping Limitation #2....... : 1 (allow going below OS-requested P/T state setting Time Window for Power Limit #2)
- Time Window for Power Limit #2....... : 33 (10 milli-Seconds)
- Lock................................. : 0 (MSR not locked)

MSR_PKG_ENERGY_STATUS............(0x611) : 0xE664AA71
------------------------------------------
- Total Energy Consumed................ : 235922 Joules (Watt = Joules / seconds)

MSR_CONFIG_TDP_NOMINAL...........(0x648) : 0x23
MSR_CONFIG_TDP_LEVEL1............(0x649) : 0xB40000001E0460
MSR_CONFIG_TDP_LEVEL2............(0x64a) : 0xB40000001E0460
MSR_CONFIG_TDP_CONTROL...........(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.......(0x64c) : 0x0
MSR_PKGC3_IRTL...................(0x60a) : 0x0
MSR_PKGC6_IRTL...................(0x60b) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x4043E4940C6
MSR_PKG_C3_RESIDENCY.............(0x3f8) : 0x0
MSR_PKG_C2_RESIDENCY.............(0x60d) : 0x4043E4940C6
MSR_PKG_C6_RESIDENCY.............(0x3f9) : 0xCD5F78C41D5

IA32_TSC_DEADLINE................(0x6E0) : 0x1EAE05465E43

IA32_PM_ENABLE...................(0x770) : 0x0 (HWP Supported but not, yet, enabled)

CPU Ratio Info:
------------------------------------------
Base Clock Frequency (BLCK)............. : 100 MHz
Maximum Efficiency Ratio/Frequency.......: 12 (1200 MHz)
Maximum non-Turbo Ratio/Frequency........: 35 (3500 MHz)
Maximum Turbo Ratio/Frequency............: 40 (4000 MHz)
P-State ratio * 100 = Frequency in MHz
------------------------------------------
CPU P-States [ (12) 31 40 ]
CPU C6-Cores [ 0 2 4 7 9 10 ]
CPU P-States [ 12 31 (35) 40 ]
CPU C6-Cores [ 0 2 3 4 6 7 8 9 10 ]
CPU P-States [ (12) 17 31 35 40 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 ]
CPU P-States [ (12) 17 22 31 35 40 ]
CPU P-States [ (12) 17 19 22 31 35 40 ]
CPU P-States [ (12) 17 19 22 23 31 35 40 ]
CPU P-States [ (12) 17 19 22 23 25 31 35 40 ]
CPU P-States [ 12 17 19 22 23 25 31 34 35 (40) ]
CPU P-States [ 12 17 19 22 23 25 31 32 34 35 (40) ]
CPU P-States [ (12) 16 17 19 22 23 25 31 32 34 35 40 ]
CPU P-States [ (12) 16 17 19 20 22 23 25 31 32 34 35 40 ]
CPU C6-Cores [ 0 1 2 3 4 5 6 7 8 9 10 11 ]
CPU P-States [ 12 16 17 19 20 22 23 25 29 31 32 34 (35) 40 ]
CPU P-States [ (12) 16 17 19 20 22 23 25 28 29 31 32 34 35 40 ]
CPU P-States [ (12) 16 17 19 20 21 22 23 25 28 29 31 32 34 35 40 ]
CPU P-States [ (12) 16 17 19 20 21 22 23 24 25 28 29 31 32 34 35 40 ]
CPU P-States [ 12 16 17 19 20 21 22 23 24 25 28 29 31 32 33 34 (35) 40 ]
CPU P-States [ (12) 15 16 17 19 20 21 22 23 24 25 28 29 31 32 33 34 35 40 ]
CPU P-States [ (12) 15 16 17 19 20 21 22 23 24 25 26 28 29 31 32 33 34 35 40 ]
CPU P-States [ (12) 14 15 16 17 19 20 21 22 23 24 25 26 28 29 31 32 33 34 35 40 ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 31 32 33 34 35 40 ]
CPU P-States [ 12 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 31 32 33 34 (35) 37 40 ]
CPU P-States [ 12 14 15 16 17 18 19 20 21 22 23 24 25 26 28 29 30 31 32 33 34 (35) 37 40 ]
CPU P-States [ (12) 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 37 40 ]

To unload the AppleIntelInfo.kext, enter the terminal command:

Code:
sudo kextunload AppleIntelInfo.kext


Disentangling Skylake-X XCPM performance differences on the ASUS X299 Prime Deluxe and the Gigabyte X299 Aorus Gaming 9 Mobos

Below I depict Intel Power Gadget (IPG) results, revealing the Skylake-X XCPM performance under macOS High Sierra 10.13, with the CPU employed on either the ASUS X299 Prime Deluxe or the Gigabyte X299 Aorus Gaming 9 mobo.

ASUS Prime X299 Deluxe:

View attachment 276864

One immediately realizes the extraordinary brilliant and extremely clean idle and max. load Skylake-X CPU performance in combination with the ASUS Prime X299 Deluxe mobo. This is not EIST and this is not PMDrvr.kext! This is excellent and native XCPM performance topping anything I have seen before.

Gigabyte X299 Aorus Gaming 9


View attachment 272867

Much noisier and distorted idle and max. load Skylake-X CPU performance in combination with the Gigabyte X299 Aorus Gaming 9! It seems that the "Sync All Cores" BIOS option so far exclusively implemented on ASUS mobos clearly makes it also this time! The significantly worse XCPM in combination with the Gigabyte X299 Aorus Gaming 9 is not only reflected when comparing the two graphics above, but also leaves its fingerprints in the Benchmark Scores which are lower when using the latter board.


E.2) Graphics Configuration:

View attachment 272891

Simples ATI graphics cards startup solutions like the Gigabyte Radeon RX 560 just require two basic kexts in the /EFI/Clover/kexts/Other/ directory of the EFI folders on both USB Flash Drive Installer and 10.13 System Disk , i.e. namely the WhateverGreen.kext v1.1.3 and the Lilu.kext v1.2.1.

ATI Radeon Vega users should have anyway native support under macOS High Sierra 10.13.

Also Nvidia Kepler Cards are natively implemented.

Since the final release of macOS 10.13, there is now also official Nvidia Web Driver Support for Nvidia Pascal and Maxwell graphics cards also under macOS High Sierra 10.13!

To install the new officially distributed Nvidida 10.13 Web Driver Package, follow the instructions detailed below.

Error prevention advice:

a.) Enable Remote Management and Remote Login in "Preferences" -> "Sharing", before starting with the Web driver
Installation and Nvidia Black Screen prevention. This will allow you to access your system from any other system in case of a persistent Black Screen failure.​

b.) Clone your current 10.13 System Disk by means of Carbon Copy Cloner (CCC) and create a bootable backup drive by
also implementing the actual EFI-Folder on your 10.13 System Disk in the empty EFI-Partition of the cloned backup drive. In case of failures during or after the Web Driver Installation, you have now a perfect fall-back option to the original status of your system before the web driver installation. Just boot your system with the Backup Drive and Clone back the latter onto your former System Drive.​

c.) Note that instead of the fallback option with the Backup Drive, you can revert your system back to the original state in
case of a failure during the Web driver Installation by booting your system in recovery mode and by manually removing all web driver related GeForce* and nvda* files from the S/L/E and L/E/ directories of your system disk by using the following terminal commands:

Code:
sudo rm -rf NVDA*

Code:
sudo rm -rf GeForce*

after changing primarily to the respective directories.

Also perform if possible:


Code:
sudo touch /System/Library/Extensions/

Code:
sudo touch /Library/Extensions/


Nvidia Web Driver Installation and Black Screen Prevention:

As we do use SMBIOS iMac17,1, we MUST implement some way of subverting AppleMobileFileIntegrity banning the driver before performing the Nvidida Web Driver Installation!

Black Screen Prevention - NvidiaGraphicsFixup.kext v1.2.1 + Lilu.kext v1.2.1

Important Note: if you ever tried before a Black Screen Prevention by means of the NVWebDriverLibValFix.kext v1.0.0 in /EFI/CLOVER/kexts/Other/, remove the latter file from the latter directory! Note that NVWebDriverLibValFix.kext is now already implemented in NvidiaGraphicsFixup.kext v1.2.1! If you apply the content of the primer kext twice, you will end up in a boot loop!

a.) Copy NvidiaGraphicsFixup.kext v1.2.1 and Lilu.kext v1.2.1 to the /EFI/CLOVER/kexts/Other/ directory in the EFI-
Partition of your System Disk.
b.) Install now the actual Nvidia 10.13 Web Driver Package.
c.) Now reboot as requested by the Nvidia Web Driver Installer

d.) Now you should have a working Nvidia 10.13 Web Driver without any Black Screen Issue!
Note that even with the correct black screen prevention and after a successful Web Driver installation, your system boot might falter at "gIOScreenLockState, 3".. If latter is really the case, your Web Driver is not automatically injected. This latter issue can be solved by manually injecting the Nvidia Web Driver with your config.plist during system boot by primarily checking "NvidiaWeb" in the "System Parameters" Section of Clover Configurator.

After successful Nvidia 10.13 Web Driver Installation and Black Screen Prevention, you should have a fully working 10.13 Nvidia Web Driver, including OpenGL and Metal support!

View attachment 284836

Please report back any successful approach different from above. I will consider your estimated feedback in the future updates of this guide for all other users.

Nvidia 10.12.6 Web Driver Workaround:

Please note that you have to exactly apply all individual steps below, exactly in the given order!

1.) Backup the original 10.13 AppleGraphicsControl.kext (Apple Graphics Policy kext-file) from S/L/E to your Desktop (you may
need it once an official 10.13 Nvidia Web Driver is finally released).
Note that the next step 2.) is only required after a clean install of MacOS High Sierra 10.13 or after an update from an earlier version of MacOS High Sierra 10.13, where the workaround has not been applied yet. Else continue to point 3.) below!

2.) a.) Download and unzip the 10.12.6 WebDriver Package WebDriver-378.05.05.25f01.pkg (attached towards the end of this
b.) Open a terminal and change to your Desktop
originating post/guide) to your Desktop.
Code:
cd Desktop
c.) Enter the following terminal command to unpack the Web Driver package into a "webdriver" folder on your Desktop.

Code:
pkgutil --expand WebDriver-378.05.05.25f01.pkg webdriver
d.) Double-click with your mouse on the "webdriver" folder -> right-click with your mouse on "Distribution" and open the
file with TextEdit.app.

Now delete the line "if (!validateSoftware()) return false;" to bypass the OS version check during the Web Driver Installation and save the modified "Distribution" file.
e.) Now repackage the Web Driver Package with the following terminal command:

Code:
pkgutil --flatten webdriver WebDriver-378.05.05.25f01.XXX.pkg

where XXX is a place holder for e.g. your user name
f.) Now double click on the modified and renamed Web Driver package and perform the installation of the 10.12.6 Nvidia
Web Driver under macOS 10.13.

Subsequently reboot as requested. Note that before applying points 3.) to 5.) below, the system will continue in using the default Apple Web Driver.
3.) Now run the Nvidia Web Driver Updater v1.5 and patch the "NVDAStartupWeb.kext" to "17A365" (10.13 Final Release)
4.) Download, unzip and install the 10.12.6 AppleGraphicsControl.kext attached towards the end of this originating post/guide
in S/L/E/ with the accurate permissions using Kext Utility or any other kext utility of your choice.
5.) Reboot

Now..... you should have a limited but working web driver! Many thanks to @dwhitla for his constructive help and contributions!
If not and you mistook any of the above points or their exact order... you will have to start from the beginning with the 10.12.6 Web Driver Workaround.

However, if you succeed, Apple's System Report should reveal something like the following:

Don't expect miracles! Note that the 10.12.6 Webdriver under macOS 10.13 neither provides OpenGL nor Metal support for Nvidia Pascal and Maxwell cards, thus users have to be content with proper screen resolution and basic video acceleration... the overall performance of the latter graphics cards is still somewhat laggy, with e.g. occasional glitches when opening or moving windows etc.
E.3) Audio Configuration:

View attachment 272904

Note that opposite to my previous EFI-Folder distributions, EFI-X299-10.13.2-Release-161217.zip does not contain any default audio configuration. You have to implement the audio approach of your choice during the Post Installation process! Please select between one out of three possible audio implementations detailed below:

E.3.1.) AppleALC Audio Implementation


The actual AppleALC audio implementation traces back to the extensive efforts and brilliant work @vit9696 and @apfelnico . This new AppleALC audio approach bases on the AppleALC.kext v1.2.1, which further requires the Lilu.kext v1.2.1 in the /EFI/CLOVER/kexts/Other/ directory of your System Disk.

Provided that you use the EFI-Folder contained in EFI-X299-10.13.2-Release-161217.zip, you need to open the config.plist in the /EFI/CLOVER/ directory of your System Disk with the Clover Configurator and enable the CAVS -> HDEF DSDT replacement patch
in Clover Configurator Section "ACPI" under "DSDT Patches".

Code:
Comment:          Find*[Hex]     Replace [Hex]
CAVS -> HDEF      43415653       48444546

Note that opposite to the alternative VoodooHDA and CLoverALC approach detailed below, the AppleALC audio implementation requires an Audio ID in injection of "7" instead of "1". Implement the latter Audio ID in the config.plist of your System Disk under "Audio" and "Injection" in the Section "Devices" of the Clover Configurator.

HDMI/DP digital Audio Output is fully implemented by means of Whatevergreen.kext v1.1.3 or NvidiaGraphicsFixup.kext v1.2.1 .

The correct audio PCI device implementation will be performed and detailed in Section E.9).

To remove the AppleALC Audio Approach Implementation perform the following steps:

1.) Remove AppleALC.kext v1.2.1 from the /EFI/CLOVER/kexts/Other/ directory of your System Disk.
2.) Disable in the config. plist the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under
"DSDT Patches".
3.) Adopt the Audio ID Injection in your respective config.plist in Clover Configurator Section "Devices" for the
alternative audio approach you intent to use.
4.) Reboot

E.3.2) VoodooHDA Audio Implementation

1.) Provided that you use the EFI-Folder contained in EFI-X299-10.13.2-Release-161217.zip, you need to open the config.plist in
the /EFI/CLOVER/ directory of your System Disk with the Clover Configurator and enable the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under "DSDT Patches".

Code:
Comment                         Find*[HEX]      Replace*[HEX]
Rename CAVS to HDEF      43415653        48444546
2.) Download, unzip the VoodooHDA.kext v2.9.0d10 attached at the end of this originating post/guide to your Desktop.
Mouse Right-Click on VoodooHDA.kext -> select "Show Package Contents" -> click on "Contents" -> Right-Click on
"Info.plist" -> "Open With" -> "Other" -> select "TextEdit.app"

3.) a.) In the TextEdit.app select in the menu "Edit" -> "Find" -> "Find..." -> search for "IOPCIClassMatch" and

replace

Code:
<key>IOPCIClassMatch</key>
<string>0x04020000&amp;0xfffe0000</string>

with

Code:
<key>IOPCIPrimaryMatch</key>
<string>0x43831002</string>
b.) Download, unzip and run the IORegistryExplorer.app v2.1 attached at the end of this originating post/guide.

Search for HDEF and write down the "IOName"-entry under e.g. PC00@0/AppleACPIPCI/HDEF@1F,3 which can slightly deviate on mainboards different from the ASUS Prime X299 Deluxe.

View attachment 278293

The HDEF-IOName on the ASUS Prime X299 Deluxe is "pci8086,a2f0"

Concert the IOName as shown below in case of the HDEF-IOName of the ASUS Prime X299 Deluxe:

"0xa2f08086"
c.) Now replace in the "Info.plist" of "VoodooHDA.kext"

"0x43831002"

by

"0xa2f08086"

and save the "Info.plist".
d.) Copy the modified "VoodooHDA.kext" to the /EFI/Clover/kexts/Other/ - directory of your System Disk.​

4.) Download, unzip and copy the
VoodooHDA.prefPane v1.2 attached below to ~/Library/PreferencePanes/

5.) Note that the VoodooHDA audio approach requires an Audio ID in injection of "1". The corresponding modification of the
config.plist has to be implemented by means of the Clover Configurator by modifying the respective entry in Section "Devices".
6.) Reboot

To remove the VoodooHDA audio implementation, perform the following steps:
1.) Disable in the config. plist the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under
"DSDT Patches".
2.) Remove VoodooHDA.kext from the /EFI/CLOVER/kexts/Other/ directory of your System Disk.
3.) Remove VoodooHDA.prefPane from ~/Library/PreferencePanes/
4.) Adopt the Audio ID Injection in your config.plist in Section "Devices" of the Clover Configurator for the alternative audio
approach you intent to use
5.) Reboot

E.3.3) cloverALC Audio Implementation

@toleda 's cloverALC audio approach has been implemented thanks to the respective advices and help of user @Ramalama. Note that in contrary to the AppleALC and VoodooHDA approaches, the cloverALC audio approach detailed below will patch the native vanilla AppleHDA.kext in the /S/L/E directory of your System Disk! This before implementing the cloverALC audio approach, backup your native vanilla AppleHDA.kext from the /S/L/E directory on your System Disk! You will have to reinstall the native vanilla AppleHDA.kext from the /S/L/E directory on your System Disk with the appropriate permissions during a removal of the cloverALC Audio Implementation! Thus you need a backup of the latter native vanilla kext in any case!

CloverALC audio approach installation:

1.) Provided that you use the EFI-Folder contained in EFI-X299-10.13.2-Release-161217.zip, you need to open the config.plist in
the /EFI/CLOVER/ directory of your System Disk with the Clover Configurator and enable the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under "DSDT Patches".

Code:
Comment                  Find*[Hex]    Replace[Hex]
Rename CAVS to HDEF      43415653      48444546
2.) Change the Audio ID Injection in the config.plist on your System Disk in Section "Devices" under "Audio" and "Inject" to
"1"
3.) Add the following cloverALC related KextToPatch entries to your config.plist on your System Disk in section "Kernel and
Kext Patches" of Clover Configurator in the "KextsToPatch" listing:

Code:
Name*         Find*[Hex]         Replace* [Hex]    Comment
AppleHDA      8a19d411           00000000          t1-10.12-AppleHDA/Realtek ALC...
AppleHDA      8b19d411           2012ec10          t1-10.12-AppleHDA/RealtekALC1220
AppleHDA      786d6c2e 7a6c      7a6d6c2e 7a6c     t1-AppleHDA/Resources/xml>zml
4.) Download, unzip and copy the realtekALC.kext v2.8 to the /EFI/CLOVER/kexts/Other/ directory on your System Disk

5.) Download and execute audio_cloverALC-130.sh, which will patch the native vanilla AppleHDA.kext in the /S/L/E directory
of your System Disk
6.) Reboot

To remove the cloverALC audio implementation, perform the following steps:

1.) Remove realtekALC.kext from the /EFI/CLOVER/kexts/Other/ directory on your System Disk

2.) Remove all cloverALC related KextToPatch entries from the config.plist on your System Disk in the "Kernel and
Kext Patches" section of Clover Configurator.
3.) Disable in the config. plist the CAVS -> HDEF DSDT Replacement Patch in Clover Configurator Section "ACPI" under
"DSDT Patches".
4.) Delete the patched AppleHDA.kext in the /S/L/E/ Directory on your System Disk

5.) Reinstall the original vanilla AppleHDA.kext with the appropriate permission in the /S/L/E/ directory on your
System Disk using Kext Utility
6.) Adopt the Audio ID Injection in your config.plist in Section "Devices" of the Clover Configurator for the alternative audio
approach you intent to use
7.) Reboot


E.4) USB Configuration:

As mentioned already in the introduction, SMBIOS iMac17,1 is absolutely mandatory if one wants to use native Xnu CPU Power Management (XCPM) for Skylake-X under macOS 10.13 High Sierra) based on Piker Alpha's ssdtPRGen.sh and ssdt.aml.

Until recently, the latter SMBIOS definition imposed a dead end at the XHC USB side, as there was no iMac 17,1 identity neither in Apple's IOUSBHostFamily.kext nor in Apple's AppleUSBXHCIPCI.kext, which further implied the sudden dead of USBInjectAll.kext or any derivatives (e.g. X99_Injector USB 3.kext or, XHCI-200-series-injector.kext, etc.). A sophisticated XHC USB kext workaround however can provide full XHC USB 2.0 and USB 3.0 functionality also with SMBIOS iMac17,1 at least for the ASUS Prime X299 Deluxe.

The sophisticated XHC USB Kext workaround and kext creation guide line is still detailed below, as it is still required under macOS Sierra 10.12.6 on Skylake-X/X299 Systems and because it can be also successfully for other mainboards, e.g. X99, Series-9 mainboards.

Note however, that since macOS High Sierra 10.13 SU and with AppleIntelPCHPMC, Apple natively implements IOPCIPrimaryMatchID "a2af8068" and AppleUSBXHCISPT.

All external and internal XHC USB 3.0 (USB 3.1 Gen 1 Type-A) and USB 2.0 (USB 2.0 Gen 1 Type-A) ports should now natively work at expected data transfer rates (90 Mb/S (USB 3.0)and 40 MB/s (USB 2.0), respectively) for all X299 mainboards when using SMBIOS iMac17,1.

Since macOS High Sierra 10.13 SU, the sophisticated XHC USB Kext Workaround is obsolete and my guide is now fully compatible with all X299 mainboards also concerning XHC USB2.0 and USB3.0 functionality! Many thanks to @Ramalama for this important discovery! The only remaining drawback seems to consist in the current non-functionality of USB3.0 devices in USB2.0 ports.

Note, that independent of the former XHC USB2.0 and USB3.0 issue, all external and internal USB 3.1 (USB 3.1 Gen 2 Type-A and Type-C) ports have been always natively implemented by OS X on different controllers than XHC in any case and also work at data rates up to 140 MB/s. See Section E.4 of my guide.



USB Kext Creation Guideline

The very clever and sophisticated "kext as kext can or USB 3.0 without USBInjectAll.kext" approach developed by Brumbaer (see his extended guideline for all the tiny details) for the ASUS Strix Z270i Gaming allows the correct implementation of not natively implemented XHC USB 2.0 and USB 3.0 ports.

So far we have already an existing XHC USB Kext Library for the following mainboards:

1.) KGP-ASUSPrimeX299Deluxe-USB.kext (@kgp) - ASUS Prime X299 Deluxe

2.) RAMALAMA_ASUS_R6E_USB.kext (@Ramalama) - ASUS Rampage X299 Extreme

3.) MHS-ASRockFatal1tyX299GamingK6-USB.kext - AsRockFatal1ty X299 Gaming K6

4.) DSM2-ASUS-X99-A-II-USB-kext (@DMS2) - ASUS X99-A II und ASUS X99 Deluxe II

The respective XHC USB Kexts can be provided on user request.


For the board-specific XHC USB KEXT creation one just needs to follow my detailed guideline below. Of course anybody is also free to directly follow
Brumbear's originating extended guideline for the Strix Z270i Gaming, which however unfortunately is German only....

Don't be afraid! It is not that difficult as it looks like a t the beginning! I really do explain stepwise and in all detail by means of the already successfully implemented XHC USB Kext Creation Approach for the ASUS Prime X299 Deluxe, how one is able to derive with minimum effort a board-specific XHC USB kext not only for any mainboard, e.g. also X99 and Series-9 mainboards.

1.) Ingredients:

a.) IORegistry Explorer v2.1 attached at the end of this post (guide)

b.) Installed Apple Xcode distribution

c.) KGP-Dummy-USB.kext attached at the end of this post (guide)
2.) Download and unzip KGP-Dummy-USB.kext. Rename the file to "User-Board-USB.kext". "User" and "Board" are place
holders for your Initials and mainboard, repectively.
For the sake of simplicity, I will continue my description based on the nomenclature "KGP-Dummy-USB.kext" here...


a.) Open a Finder window and select the KGP-Dummy-USB.kext with your mouse. A right-click with the mouse and
"ShowPackage Contents"


View attachment 274692

will show the content of the kext, which is basically the Info.plist.

b.) Now double click to Info.plist or open the Info.plist with Xcode with Right Mouse Click and "Xcode"

View attachment 274694

c.) Now edit the Info.plist as follows:

View attachment 274700

Replace "Dummy" by your mainboard nomenclature and "KGP" by your own personal initials. Note that the "Bundle identifier" nomenclature cannot contain blanks! Usually it shout start with the initials of your country, followed by your personal initials, USB and mainboard nomenclature, everything simply separated by dots.

d.) Now click on the triangle next to IOKit-Personalities and you will see that the Triangle symbol changes and the Xcode editor shows further content. Subsequently click on the triangles of "iMac17,1-XHC", "IOProviderMergeProperties" and "ports" and you will see the following structure:
View attachment 274701

e.) Now click on each triangle next to HS01 to HS14 and SSP1 to SSP6 and you will see the following structure:

View attachment 274704

f.) Subsequently with a right click on one of the "port" and "data" entries, select "Show Raw Keys/Values". Now we have everything ready to start with the actual work:

View attachment 274709

Note that there are 14 HSxx and six SSPx port entries in the XHC USB Dummy Kext, where "HS" stands for "High Speed" Port, "SSP" for "Super Speed Port" and "xx" or "x" for the port number. HS ports start with hexadecimal port counter "<01000000>", which corresponds to decimal "1". The last hexadecimal HS port counter is "<0e000000>", which corresponds to decimal "14". The SSP boards start with the hexadecimal port counter "<11000000>", which corresponds to decimal "17". The last hexadecimal port counter is "<16000000>", which corresponds to decimal "22". Thus we can see, that the HS counter goes from 1-14 (14 ports) and the SSP port counters from 17-22 (6 ports). One might ask what about port counter 15 and 16? These two port counters are reserved for two dummy ports, apparent in the IOReg under IOACPIPlane implemented as USR1 and USR2. These dummy ports however, are of no interest for us.

The "USB Connector" entry defines the connector type:

0 stands for standard USB2.0 Type-A and is a HS only property
3 stands for standard USB Gen 1 Type-A (USB 3.0) and can be a HS- and always is a SSP property
9 would stay for USB Gen 2 Type-A or Type-C, however such ports are usually connected to separate controllers, thus this connector type is not of importance here​

3.) Preconditions for point 4.) below:

I.) You must have all internal USB 2.0 and USB 3.0 connectors connected with respective USB front panel plugs!

This is really a very important precondition! You should have in mind that you want to establish a COMPLETE XHC USB KEXT for your specific mainboard. Thus it is therefore not sufficient just to implement the external USB 2.0 and USB 3.0 on-board connectors! Your XHC USB KEXT must really consider all connectors available on your particular mainboard, especially as you will subsequently distribute your board-specific XHC USB Kext to the community. It therefore has to be applicable for the most general case, which indeed ist the usage of all internal and external USB 2.0 and USB 3.0 ports available on your particular mainboard!
II.) All external mainboard back-panel USB 2.0 and USB 3.0 plugs have to be fully accessible and have to be
considered entirely for the subsequents XHC USB KEXT creation.
III.) Once more, it is really fundamental to consider, use and implement all available external and internal USB 2.0 and
USB 3.0 connectors on your particular mainboard in order to derive a really complete XHC USB board definition in your board-specific XHC USB kext.
IV.) Use the correct USB port limitation KextToPatch entry, usually correctly implemented in the EFI-Folder of
EFI-X299-10.13.2-Release-161217.zip attached at the end of this originating post/guide.
V.) You cannot have any USB related USB-kexts in your EFI-folder (also not the ones attached to this guide or already
implemented in the distributed EFI directory!). This will force OS X on boot to load the emergency USB system driver configuration which is of crucial and particular interest for the subsequent XHC USB creation detailed below.
4.) Download, unzip and start the IORegistry Explorer. The IOService (plane) provides a listing of all installed services.
Scroll down until you see your specific XHC controller entry.

View attachment 274714

For the ASUS Prime X299 Deluxe it is XHCI as we will see in 4b.) below . There are two entries. The PCIDevice Driver "XHCI@14" and the XHCI driver "XHCI@14000000".

a.) By clicking on XHCI@14 you find the "class-code" entry (in case of the ASUS Prime X299 Deluxe "30 03 0c
00"), the "device-id" entry (in case of the ASUS Prime X299 Deluxe "af a2 00 00") and the "vendor-id" (in case of the ASUS Prime X299 Deluxe "86 80 00 00"). This are raw data from the control registers, thus the values are slightly flipped around. In reality "0X8068" stands for Intel and "0xa2af" is the device-ID of the ASUS Prime X299 Deluxe on-board XHC Controller CHIP. Thus the "IOPCIPrimaryMatch"-ID of the ASUS Prime X299 Deluxe Mainbaord on-board XHC Controller is "0xa2af8086".

Important note: In case your on-board XHC Controller's "IOPCIPrimaryMatch"-ID is different from "0xa2af8086", all steps subsequent to 5b.) below will fail.

The Info.plist of KGP-ASUSPrimeX299Deluxe-USB.kext and KGP-Dummy-USB.kext (attached at the end of this originating post/guide) contains an additional kext with respective AppleUSBXHCIPCI-Driver entries specific for the ASUS Prime X299 Deluxe on-board XHC Controller with the "IOPCIPrimaryMatch"-ID "0xa2af8086", namely "AppleUSBXHCISPT". This AppleUSBXHCIPCI-Driver driver is loaded and implemented during each boot process and communicates with the ASUS Prime X299 Deluxe specific on-board XHC-Contoller. The name of the additional kext in the Info-plist of KGP-ASUSPrimeX299Deluxe-USB.kext and KGP-Dummy-USB.kext is "AppleUSBXHCISPTB iMac17,1", in correspondence to the chosen AppleUSBXHCIPCI-Driver and SMBIOS Configuration.

Note that in any case the KGP-Dummy-USB.kext should be the master kext for developing your own board-specific XHC USB KEXT! Thus, download in any case KGP-Dummy-USB.kext attached at the end of this originating post/guide!

View attachment 274742

Thus, in case that the "IOPCIPrimaryMatch"-ID of your board-specific on-board XHC-Controller is different from "0xa2af8086", you have to find the correct AppleUSBXHCIPCI-Driver different from AppleUSBXHCISPT within the driver entries of "AppleUSBXHCIPCI" ! To do so perform the following steps:

i.) In the Finder Window go to the /S/L/E directory of your system disk and copy the IOUSBHostFamily.kext to your desktop.

ii.) Right-click on the IOUSBHostFamily.kext and select "Show Package Contents". Double click on "Contents" and "Plugins" and you will see the following list of kexts:

View attachment 275676

Right-click on AppleUSBXHCIPCI.kext and once more select "Show Package Contents". Double-click on "Contents" and subsequently double-click on "Info.plist" to open the Info.plist of the AppleUSBXHCIPCI.kext with Xcode. You will find the following content:

View attachment 275679

Click on the triangle in front of "IOKitPersonalities" to unfold its content.

View attachment 275680

You will find a list of AppleUSBXHCIPCI-Driver entries marked by the red rectangle.

Now click on the triangle of each driver entry to show the content. The first entry important for us is the "IOPCIPrimaryMatch"-ID of each specific driver. The appropriate driver for your board-specific on-board XHC controller should be the one with the "IOPCIPrimaryMatch"-ID closest to the "IOPCIPrimaryMatch"-ID off your
XHC on-baord controller. Remember that you already derived above the "IOPCIPrimaryMatch"-ID off your
XHC on-baord controller by means of the IORegExplorer "Vendor-ID" and "Device-ID" entries under "XHC@14"! In case of the ASUS Prime X299 Deluxe the correct choice was the AppleUSBXHCIPCI-Driver "
AppleUSBXHCISPTB" with the "IOPCIPrimaryMatch"-ID "0xa12f8086", likely already used for the previous version of the ASUS PRIME X299 Deluxe on-baord HXC USB Chipset and controller.

Let me describe by means of another example for the ASUS X99-A II, how to properly adopt and modify the the additional kext entries implemented in the Info.plist of KGP-Dummy-USB.kext for your board-specific XHC Usb Controller Chipset.

The "IOPCIPrimaryMatch"-ID of the ASUS X99-A II on-board XHC controller is "0x8d318086", the respective driver with the closest "IOPCIPrimaryMatch"-ID appears to be AppleUSBXHCIPLTH with a IOPCIPrimaryMatch-ID of "0x8c318086".

View attachment 275684

Always keep in mind that the entire approach is a kind of blind guess approach, as you might not be able to find the exact IOPCIPrimaryMatch-ID match between the respective AppleUSBXHCIPCI-Driver and your XHC on-board controller. For the ASUS X99-A II on-board XHC controller with IOPCIPrimaryMatch-ID "0x8d318086" we choose AppleUSBXHCIPLTH with a IOPCIPrimaryMatch-ID of "0x8c318086", which again might be the AppleUSBXHCIPCI-Driver for the previous version of the ASUS X99-A II on-board XHC controller chipset.

iii.) Now in case of the ASUS X99-A II, one would open the Info.plist contained in KGP-Dummy-USB.kext
(attached at the end of this originating post/guide) with Xcode and change the following ASUS Prime X299 Deluxe specific additional kext entries, in concordance with the match results for the ASUS X99-A II mobo's onboard XHC-controller:
View attachment 275697
Thus the final correct additional kext entries for the ASUS X99-A II finally would look like this:
View attachment 275698

Don't forget to save the modified Info.plist of KGP-Dummy-USB.kext with the new now hopefully correct additional kext entries for the AppleUSBXHCIPCI-Driver and your specific XHC on-board controller!

iv.) If your somewhat blind guess driver-match choice was correct or not will be revealed at point 5 c.) below, where your USB 3.0 ports already should be fully functional, of course by always supposing that you also successfully and entirely implemented and completed points 5 a.) and 5 b.) before! If 5 c.) fails, you have to continue with the search for the appropriate driver with the closest IOPCIPrimaryMatch-ID to your XHC onboard controller, possibly to modify the additional kext entries described above and to repeat 5c.) until your USB 3.0 ports are fully functional. The repetition of 5a.) and 5 b.) would not be necessary if successfully and entirely implemented and completed once!
Finally it should be noted that for the ASUS Prime X299 Deluxe USB kext development there was no need to change the AppleUSBXHCIPCI-Driver originally meant for the Strix Z270i Gaming! The IOPCIPrimaryMatch-ID of the XHC Controller used on both boards was absolutely identical! Thus, there might also be no need for changing the AppleUSBXHCIPCI-Driver for other ASUS X299 mainboard models, or X299 mainboard models of different brands. Unfortunately, I already returned the Gigabyte AORUS X299 Gaming 9, thus I could not check the latter board for AppleUSBXHCIPCI-Driver compatibility.​
b.) By clicking on XHCI@14000000, one finds in the "IOClass" and "CFBundleIdentifier" entries the active USB
driver, which is "AppleUSBXHCIPCI". Under "name" entry one finds the name of the XHC controller, which is "XHCI" in case of the ASUS Prime X299 Deluxe.

View attachment 274715
As you can see else, one finds in the IOReg the same HS and SS port entries already discussed with respect to the kext structure above. The controller numerates the individual ports. Port 0 (XHCI@14000000) is the Hub. Ports with plugged devices are indicated by triangles and can be unfolded by clicking on the triangles to see the content information for the connected device. The SS-Ports are non-functional yet.​

5.) Well lets start now with the mainboard specific XHC USB port assignment and configuration.


a.) Take a USB 2.0 Device (note that USB 3.0 Devices will be non-functional during the XHC emergency driver
configuration and will not be recognised by the different USB-Ports!) and connect it with the first USB Front Panel Connector. In my case, it is a USB 3.0 Connector connected with the internal on-board USB 3.0 connector. As you will see, the device immediately shows up in the IORegistry Eplorer..

View attachment 274724

If you remove the USB 2.0 Stick, the related information will turn red...

View attachment 274725

Very important information!! Now you know that the first USB 3.0 front panel connector is linked with port HS03!! Write down the HS03 port number and the USB Type (3) for your first front-panel USB 3.0 Connector!!
Now repeat the procedure for all Front-Panel and Mainboard Back-Panel USB 2.0 and USB 3.0 connectors, and carefully write down the port number and connector type for each USB 2.0 or USB 3.0 connector connected with your mainboard!! Remember that the Connector Type for USB 2.0 is "0" and the Connector Type for USB 3.0 is "3"!! You will quickly notice after the entire procedure that your USB 2.0 and USB 3.0 connectors do not use all available HS ports. Write down which HS-ports remained unconnected after completing 5a.) !


You will not know at this point which SS-Ports are assigned to the individual USB 3.0 and HS-ports, as the SS-Ports as already mentioned are non-functional in Apple's emergency USB System Driver configuration (remember that you did not load any USB related kext when booting, thus USB 3.0 runs in its native non-functional configuration).
b.) After gathering the HS port configuration for all USB 2.0 and USB 3.0 connectors, you know open the KGP-
Dummy-USB.kext with Xcode as described above and start to update the connector type information for all known HS ports !! I present one example for HS03 below (note that HS03 already has been also discussed and illustrated in 5.a).

View attachment 274728

Do it for all known HS-ports in use and save the KGP-Dummy-USB.kext subsequently. Now you copy the KGP-Dummy-USB.kext to the EFI-directory of your System-Disk and reboot!!!
c.) As SS-ports are always of connector type 3 by definition, your USB 3.0 connectors now will already be fully
functional!
If this is not the case, remember that you might have chosen the wrong AppleUSBXHCIPCI-Driver for your particular on-baord XHC USB Controller Chipset, and you might have to repeat steps 4 ii.) and iii.). Double check also before if you properly and entirely performed and implemented points 5a.) and 5b.) above.

However, if your USB 3.0 connectors are already fully functional, repeat now 5a.), with the difference that this time you investigate and write down which SS-Ports are connect with which respective USB 3.0 connectors and HS-ports, by investigating at wich SS and HS-ports an USB 3.0 Device pops up when connected to each specific USB 3.0 connector. Again you will see that not all SS-Ports are associated with HS-ports and used by your USB 3.0 connectors. Write carefully down the entire information and which SS-Ports remained unused!
d.) Finally investigate your notes which HS and SS ports have not been used by your system during your careful
investigation! Below one finds the summary of my notes taken during the investigation of the ASUS Prime X299 Deluxe USB XHC USB Kext creation.

Code:
  Internal Connectors - Frontpanel: 3x USB 3.0

     2x USB 3.1 Gen1

left                                     right

U31G1-12                            U31G1-34

HS03@14300000                HS04@14400000

SS3@15100000                  SS4@15200000

+++++++

Internal Connectors -  Frontpanel: 2x USB 2.0

                  USB78

HS08@14800000  HS07@14700000

+++++++

       Back-Panel, 1st row at the top: 2x USB 3.0

                USB 3.1 Gen 1
 
port E2_5                                         port  E2_5

HS06@14600000                      HS06@14600000

SS6@15400000                        SS6@15400000
+++++++

       Back-Panel, 2nd row from top: 2x USB 3.0

                USB 3.1 Gen 1
 
port E34                                         port E34

H05@14500000                     H06@14600000

SS5@15300000                     S6@15400000

+++++++

       Back-Panel, 3rd row from top:  4x USB 2.0  ports 9-12

port 9                          port10                          port11                        port12

HS12@14c000000     HS11@14b00000       HS10@14a00000      HS09@14900000
+++++++

In case of the ASUS Prime X299 Deluxe one clearly sees that HS01, HS02, SS01 and SS02 have not been used by any USB 2.0 or USB 3.0 connector as there are no triangles in front of these ports . The same states for HS13 and HS14.
e.) Now open again the KGP-Dummy-USB.kext and delete all port entries which have not been used by your system!
The USB port number limit will be defined by the way by the port number of the highest SSP-port in use in your particular USB configuration As stated above, for the ASUS Prime X299 Deluxe, I deleted all entries for HS01, HS02, HS13, HS14, SSP1 and SSP2 and therefore the final kext looks like this:

View attachment 274733

Now save your USB.kext and copy the the final kext to the EFI Folder of your system disk. Reboot!
f.) If the kext is successfully loads during boot, the XHCI@14000000 entry in the IOREG will provide something like the
following information:

View attachment 274734
Now benchmark the different USB 2.0 and USB 3.0 ports by means of e.g. Black Magic Speed Test. Note that the benchmark scores always will depend on the USB device used for the Benchmark!


USB 2.0 and USB 3.0 Benchmark Results

View attachment 284895


USB 3.1 Type-A and Type-C Benchmark Results

For the individual USB 3.1 Type-A and Type-C Connectors Benchmark, I used the external Lacie Rugged Thunderbolt / USB Type-A and Type-C HDD.

View attachment 276390
E.5) ASUS Prime X299 Deluxe Thunderbolt EX3 PCIe Add-On Implementation

View attachment 276330

For the successful implementation of the Thunderbolt EX3 PCIe Add-On Adapter, a fully working Dual Boot System with an UEFI Windows Implementation is unfortunately absolutely mandatory. You will not be able to configure your Thunderbolt EX3 PCIe Add-On Adapter in the mainboard BIOS, until the Adapter has been successfully recognised and initialised by the UEFI Windows System. Fortunately legal and official License Keys for the actual Windows 10 Pro distribution can be purchased with a little bit of temporal effort on Google for an actual price of 20 $ or even below! Thus, the installation of a dual boot system with Windows will require some additional temporal user effort but will not noticeably further affect the users's budget.

Please note that I especially emphasize the term UEFI, when speaking about the parallel Windows implementation. Don't use or perform a Legacy Implementation of Windows! In order to properly implement your Windows partition later-on in the Clover Bootloader and to comply with the actual Mainbaord-BIOS settings requirements, it is absolutely mandatory to run or perform an UEFI Windows implementation!

So if not already implemented, how to achieve a fully working UEFI Windows Implementation and Dual boot System with Windows?

1.) Important Note! For the implementation of the UEFI Windows Distribution disconnect all usually plugged macOS Drives
from your rig! The Windows installer will implement a Windows Boot Loader! If you have any macOS Drive connected during installation, the latter Windows Boot Loader might overwrite and destroy your current Clover Boot Loader. This is the last thing you want! Thus for the windows installation just connect the destination drive for the installation and the Windows USB Flash Drive Installer your will create in the subsequent step below!
2.) This Tutorial explains in all necessary detail how to download an actual Windows 10 Creator distribution, and how to
subsequently create a bootable USB Flash Drive Installer for a subsequent UEFI Windows 10 installation by means RUFUS! Don't put emphasis on alternative optional methods and always take care that you just follow the instructions for a successful subsequent UEFI Windows Installation!

View attachment 275751
3.) This Tutorial explains in all necessary detail how to properly perform the actual Windows 10 Pro Creator UEFI
Installation, subsequent to the a bootable Windows USB Flash Drive Installer realisation detailed in 2.) above

View attachment 276317
4.) This Tutorial explains in all necessary detail, how to migrate/clone/backup your Windows 10 UEFI System Disk after
installation for future maintenance and safety

View attachment 276319
5.) After successfully performing the UEFI Windows 10 Pro Creator Implementation, you can reconnect your macOS drive
to your rig. The newly created UEFI Windows 10 Pro Creator Partition will automatically appear as a further boot option in both BIOS Boot Option Menu (F8) and Clover Boot Menu! No additional or further actions or measurements have to be taken!

View attachment 276321
6.) Once your Windows 10 Pro Creator Partition is fully operational, install all drivers and programs implemented on the
ASUS Prime X299 Series DVD attached to your mainboard. This will further allow you to properly adjust the desired AURA Mainboard Settings and offer many other mainboard configuration options.

View attachment 276324
7.) Now switch of your rig and start with the installation of the Thunderbolt EX3 PCIe Add-On Adapter

a.) I recommend to install the adapter in third PCIe Slot from the bottom which is PCIEX_3

b.) Don't forget also connect the attached TB-Cable with both connector on the Thunderbolt EX3 PCIe Add-On Adapter
and the TB-Header on the ASUS Prime X299 Deluxe mainboard.
8.) Reboot into windows and install the ASUS ThunderboltEX 3 DVD accompanying your ASUS Prime X299 Deluxe
9.) Reboot and enter the Mainboard BIOS (F2)

a.) Go to /Advanced/ Thunderbolt(TM) Configuration/ and apply the following BIOS Settings detailed below:

/Advanced/ Thunderbolt(TM) Configuration/


Code:
TBT Root por Selector                               PCIE16_3
Thunderbolt USB Support                             Enabled
Thunderbolt Boot Support                            Enabled
Wake From Thunderbolt(TM Devices)                   Off
Thunderbolt(TM) PCIe Cache-line Size                128
GPIO3 Force Pwr                                     On
Wait time in ms after applying Force Pwr            200
Skip PCI OptionRom                                  Enabled
Security Level                                      SL1-No Security
Reserve mem per phy slot                            32
Reserve P mem per phy slot                          32
Reserve IO per phy slot                             20
Delay before SX Exit                                300
GPIO Filter                                         Enabled
Enable CLK REQ                                      Disabled
Enable ASPM                                         Disabled
Enable LTR                                          Disabled
Extra Bus Reserved                                  65
Reserved Memory                                     386
Memory Alignment                                    26
Reserved PMemory                                    960
PMemory Alignment                                   28
Reserved I/O                                        0
Alpine Ridge XHCI WA                                Disabled
b.) Verify in /Boot/ that Above 4G Decoding is On

/Boot/

Code:
Above 4G Decoding              On
10.) Shut down your rig, connect the Thunderbolt Device with the Thunderbolt EX3 Adaptor and boot

11.) You are done! Your Thunderbolt EX3 PCIe Adapter and connected devices should be now fully implemented and
functional.
12.) Finally note that there is no Hot Plug Support with the current configuration. Thus related Thunderbolt Devices must
be connected before System Boot and cannot be unplugged or replugged during system operation!

Thunderbolt Benchmark

For the sake fo completeness and for testing the overall Thunderbolt Functionality and Performance, I benchmarked the the data rates of an external Thunderbolt Drive connected via Apple's Thunderbolt-3 to Thunderbolt-2 Adapter. As External Thunderbolt Drive, I once more used the Lacie Rugged Thunderbolt / USB Type-A and Type-C HDD.

View attachment 276391


E.6) NVMe conifguration
View attachment 276327

In contrary to macOS Sierra 10.12, in macOS High Sierra 10.13 there is native support of non-4Kn NVMe SSDs, like my Samsung EVO 960 M.2 NVME. All patches applied under macOS Sierra 10.12 are therefore obsolete. The native support of non-4Kn NVMe SSDs enables the unique opportunity to directly perform a clean-install of macOS High Sierra 10.13 on M.2 NVMEs like the Samsung EVO 960.

Even the tiny bug of an external drive implementation of NVMEs apparently has been fixed by Apple already within the macOS High Sierra 10.13 Supplemental Update (SU). Thus, the patches to circumvent the NVMe External Drive Implementation detailed below are now obsolete.

1.) The NVMe External issue, was previously circumvented by adding an External NVME Icon KextToPatch
entry to the config.plist within Clover Configurator.

Code:
Name*            Find* [HEX]           Replace* [HEX]        Comment                      MatchOS[/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S][/S]
[S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S][S]IONVMeFamily     4885c074 07808b20     4885c090 90808b20     External NVME Icon Patch     10.13.x

View attachment 274137

Note however, that already previously this patch did not seem to work anymore. Thus, there was another workaround, detailed in 2.)
2.) The second NVMe External Fix detailed below worked in 100%, although was a bit more tricky...

a.) Disable the not working External NVME Icon KextToPatch entry.

b.) Open the IORegistryExplorer, in the upright search field type nvme and take note of values in the left column, i.e.
indicated as v.1, v.2 and v.3 and marked by red rectangles in the figure below. As you can see by following these entries, your nvme device shows up in PC00@0 > RP09@1D > PXSX@0
View attachment 274141


Download and unzip the SSDT-NVMe-extern-icon-patch.aml.zip, and open the SSDT-NVMe-extern-icon-patch.aml
with
MaciASL-DSDT.app, both attached towards the end of this guide. For deviating system configurations, replace the values highlighted in blue color in the figure below with those of your IOreg, marked by red rectangles and indicated by v.1, v.2 and v.3 in the figure of my IOReg above.

View attachment 274145
c.) Save and copy the modified SSDT-NVMe-extern-icon-patch.aml to the /EFI/CLOVER/ACPI/patched/ folder of your
system drive.
3.) Reboot

Your NVMe drive should show up correctly as internal.

View attachment 274147

View attachment 274150


E.7.) SSD TRIM Support:

Macs only enable TRIM for Apple-provided solid-state drives they come with. If you upgrade a Mac with an aftermarket SSD, the Mac won’t use TRIM with it. The same applies for SSD's used by a Hackintosh. When an operating system uses TRIM with a solid-state drive, it sends a signal to the SSD every time you delete a file. The SSD knows that the file is deleted and it can erase the file’s data from its flash storage. With flash memory, it’s faster to write to empty memory — to write to full memory, the memory must first be erased and then written to. This causes your SSD to slow down over time unless TRIM is enabled. TRIM ensures the physical NAND memory locations containing deleted files are erased before you need to write to them. The SSD can then manage its available storage more intelligently.

Note that the config.plist in the EFI-folder of EFI-X299-10.13.2-Release-161217.zip attached towards the end of this guide, contains an SSD "TRIM Enabler" KextsToPatch entry, which can be found in the " Kernel and Kext Patches" Section of the Clover Configurator.

View attachment 274131

Code:
Name*                   Find*[HEX]                  Replace*[HEX]               Comment           MatchOS
IOAHCIBlockStorage      4150504c 45205353 4400      00000000 00000000 0000      Trim Enabler      10.12.x,10.13.x

With this KextToPatch entry, SSD TRIM should be fully enabled on your 10.13 System, see Apple's System Report below.

View attachment 274132

NVMe and SSD Benchmark

For the sake of completeness please find below the Benchmark of connected NVMe and SDD Drives.

View attachment 276392


E.8) ASUS Prime X299 Deluxe on-board Ethernet-Functionality

View attachment 276393

Thanks to the SmallTree-Intel-211-AT-PCIe-GBE.kext, also the Intel I211_AT Gigabit on-board LAN controller of the ASUS Prime X299 Deluxe will be correctly implemented and fully functional, in addition to the anyway natively implemented Intel I219-V Gigabyte on-board LAN controller of the ASUS Prime X299 Deluxe. Thus, both ethernet ports on the ASUS Prime X299 Deluxe should now be fully operational..

Just download , unzip and copy the SmallTree-Intel-211-AT-PCIe-GBE.kex attached below to the /EFI/Clover/kexts/Other/, reboot and you should be done.


E.9) ASUS Prime X299 PCI Device Implementation - Sleep/Wake functionality

In order to properly implement all PCI devices available on your system and build, one needs an adequate ACPI DSDT Replacement Patch Table and a sophisticated SSDT-X299.aml. Both requirements have been successfully implemented for the ASUS Prime X299 Deluxe by our gorgeous @apfelnico with partial contributions of @TheOfficialGypsy . Many thanks for the extensive efforts and extremely fruitful and brilliant work!

Note however that both ACPI DSDT Replacement Patch Table and SSDT-X299.aml are build specific and have to be verified and likely adopted or modified for all mainboards different from the ASUS Prime X299 Deluxe and builds different from the one that constitutes the baseline of this guide. The verification and likely adaptation/modification can be performed by the help of IORegistryExplorer v1.2. Also note that the ACPI DSDT Replacement Patch Table and SSDT-X299.aml implementation detailed below requires SMBIOS iMac17,1.


E.9.1) ACPI DSDT Replacement Patching Table Implementation

Note that all required ACPI DSDT Patches are already implemented in the config.plist in the /EFI/CLOVER/ directory of the EFI-Folder contained in EFI-X299-10.13.2-Release-161217.zip. However, by default they are disabled, thus we will now open the config.plist in the /EFI/CLOVER/ directory of your 10.13 System Disk EFI-Folder with Clover Configurator and stepwise adopt (if necessary) and enable the different required DSDT replacement patches in Clover Configurator Section "ACPI" under "DSDT patches", by also discussing their respective function and impact.

a.) The CAVS -> HDEF DSDT replacement patch is audio related and has the aim to achieve the SMBIOS iMac17,1 specific HDEF
onboard audio controller implementation.

If not already enabled in Section E.3), please enable this DSDT replacement patch now independent from your mainboard.

Code:
Comment:          Find*[Hex]     Replace [Hex]
CAVS -> HDEF      43415653       48444546

b.) The six PC0x -> PCIx DSDT replacement patches are PCIe-slot specific with the main aim to achieve a SMBIOS iMac17,1
specific PCIx PCIe-slot implementation. Note that the related DSDT replacement patches are mainboard specific and have to be adopted for each mainboard separately.

On the ASUS Prime X299 Deluxe, we have six PCIe slots available:

View attachment 286154

Thus we have to enable the six PC0x -> PCIx DSDT replacement patches.

Code:
Comment:            Find*[Hex]     Replace [Hex]
PC00 -> PCI0        50433030       50434930
PC01 -> PCI1        50433031       50434931
PC02 -> PCI2        50433032       50434932
PC03 -> PCI3        50433033       50434933
PC04 -> PCI4        50433034       50434934
PC05 -> PCI5        50433035       50434935

Users of mainboards different from the ASUS Prime X299 Deluxe have to adopt the amount of replacements with respect to the number of available PCIe slots on their respective mainboard and verify and likely adopt and modify the replacement entries with the help of the IORegistryExplorer. If your system does not have a 'PC0x' PCIe slot nomenclature, but e.g. 'PZ0x' instead, please replace all 'PC0x' by "PCZ0x" entires in the respective DSDT Patches of the ACPI Table. As you will see in Section E.9.2) below, you might also have to adopt the SSDT-X299.aml in concordance, if necessary.​

c.) SL05 -> GFX0 is a graphics related DSDT replacement patch to achieve consistency with the SMBIOS iMac 17,1 variable
naming, which has discreet graphics GFX0 and integrated graphics iGPU (our X299 platform does not implement the latter). Please enable this DSDT replacement patch for all graphics cards independent of the brand! Further note that the DSDT replacement patch is not mainboard specific and should be also enabled independent from the employed mainboard.

Code:
Comment:            Find*[Hex]      Replace [Hex]
SL05 -> GFX0        534c3035        47465830

There are however several mainboard, PCIe-slot population and graphics card specific dependencies in the SSDT-X299.aml, which we will address in detail in Section E.9.2) below.
d.) OSI -> XOSI, EC0_ -> EC__ and H_EC -> EC__ are once more DSDT replacement patches to achieve consistency with the
SMBIOS iMac 17,1 variable naming.​

i.) XOSI functionality is required as explained by @RehabMan (just follow this LINK for further
details).
The ACPI code can use the_OSI method (implemented by the ACPI host) to check which Windows version is running. Most DSDT implementations will vary the USB configuration depending on the active Windows version. When running OS X, none of the DSDT _OSI("Windows <version>") checks will return "true" as there is only response from "Darwin". This issue can be solved by implementing the "OS Check Fix" family of DSDT patches in the SSDT-X299.aml. By DSDT patching we can simulate a certain version of Windows although running Darwin and we can obtain a system behaviour similar to a windows version specific environment. The respective SSDT-X299.aml implementations will be discussed in Section E.10.2) below. Note that in addition to the OSI -> XOSI DSDT Replacement Patch, one needs to add the
SSDT-XOSI.aml in the /EFI/Clover/ACPI/pathed directory of the System Disk EFI-Folder.
ii.) On the Asus X299 Prime Deluxe and most likely on all other X299 mobos we have the EC0 and H_EC controllers, which
have to be renamed to 'EC' for proper USB power management. Thus once more investigate your mainboard specific IOREG entry and enable both EC0_ -> EC__ or and H_EC -> EC__ DSDT Replacement Patches.
Code:
Comment:             Find*[Hex]      Replace [Hex]
OSI -> XOSI          5f4f5349        584f5349
EC0_ -> EC__         4543305f        45435f5f
H_EC  -> EC__        485f4543        45435f5f
e.) GBE1 -> ETH0 and D0A4 -> ETH1 are ASUS Prime X299 Deluxe specific LAN related DSDT replacement patches
to achieve consistency with the SMBIOS iMac 17,1 variable naming. All ASUS Prime X299 users can now enable the respective DSDT replacement patches. Note that ETH0 and ETH1 implementation in the SSDT-X299.aml addressed in Section E.9.2.) are of cosmetic nature. All users of mainboards different from the ASUS Prime X299 Deluxe have to find their mainboard-specific LAN-entries in the IOREG and replace the "GBE1" and "D0A4" DSDT Replacement Patches and SSDT-X299.aml implementations depending on the mainboard in use. Alternatively, the GBE1 -> ETH0 and D0A4 -> ETH1 DSDT replacement patches can als maintain disabled.

Code:
Comment:             Find*[Hex]       Replace [Hex]
GBE1 -> ETH0         47424531         45544830
D0A4  -> ETH1        44304134         45544831

f.) The HEC1 -> IMEI and IDER->MEID DSDT Replacement patches are Intel Management Engine Interface related and are vital
as MacOS requires the variable names "IMEI" and "MEID" to load the 'AppleIntelMEIDriver'. The latter functionality solves the 'iTunes/Apple Store Content Access Problem' which is discussed here.​

Please enable now both DSDT Replacement patches independent from your mainboard.

Code:
Comment:             Find*[Hex]       Replace [Hex]
HEC1 -> IMEI         48454331         494d4549
IDER->MEID          49444552         4d454944

g.) The PMC1 -> PMCR DSDT patch replacement is Power Management Controller (PMC) related and applied for consistency with
the PMC naming on real Macs.

Please enable now this DSDT replacement patch independent from your mainboard.​

Code:
Comment:             Find*[Hex]        Replace [Hex]
PMC1 -> PMCR         504d4331          504d4352
h.) The LPC0 -> LPCB DSDT Replacement Patch is AppleLPC and SMBus related and is applied for consistency with the variable
naming on a real Mac. Note that LPCB injects AppleLPC, which however is not required in the X299 environment. X299 Systems seem to have sleep problems with the SMBus properties injected. Thus, the LPCB functionality will be disabled within the SSDT-X299.aml.​

Please enable now this DSDT replacement patch independent from your mainboard.​

Code:
Comment:             Find*[Hex]         Replace [Hex]
LPC0 -> LPCB         4c504330           4c504342

i.) FPU_->MATH, TMR_->TIMR, PIC_->IPIC are all DSDT Replacement Patches for consistency with the variable naming
on a real Mac. The variables are however functionless on either our X299 boards or real Macs.​

Please enable now all three DSDT Replacement Patches independent from your mainboard.

Code:
Comment:             Find*[Hex]        Replace [Hex]
FPU_ -> MATH         4650555f          4d415448
TMR_ -> TIMR         544d525f          54494d52
PIC_ -> IPIC         5049435f          49504943

j.) The DSM -> XDSM DSDT replacement patch is vital for loading the SSDT-X299.aml, as all DSM methods used in the original
DSDT do have a not compatible structure totally different from the real Mac environment. Without any fix, all DSM methods would be simply ignored. Note that one single device can have only one DSM method, which can assign additional properties to the respective device.​

Thus please enable the latter DSDT replacement patch completely independent from your mainboard!

Code:
Comment:             Find*[Hex]         Replace [Hex]
_DSM -> XDSM         5f44534d            5844534d

k.) I additionally introduced the Airport related SLOC -> ARPT DSDT replacement patch for consistency with the variable naming
on a real Mac when using an OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 PCIe Adapter on the ASUS Prime X299 Deluxe. The respective SSDT-X299.aml implementations will be dressed in Section E.9.2).

All OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 PCIe Adapter users in the ASUS Prime X299 Deluxe can now enable the respective DSDT Replacement patch. All OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 PCIe Adapter users of different mainboard than the ASUS Prime X299 Deluxe have to primarily verify and likely adopt/modify the SLOC -> ARPT in concordance with the IOREG entries for their specific mainboard and build.​

Code:
Comment:             Find*[Hex]         Replace [Hex]
SLOC -> ARPT         534c3043           41525054

E.9.2) SSDT-X299.aml PCI Implementation

View attachment 295899

For the proper PCI device implementation (detailed in the Figure above), which is mostly of cosmetic nature and not directly related to device functionality, we now have to revise and likely adopt or modify the attached SSDT-X299.aml to our specific build and system configuration with the help of the IORegistryExplorer. The entire section can also be simply skipped by unexperienced users, who also prefer to skip the implementation of the SSDT-X299.aml and respective PCI Device implementation.

Note that for each device, the SSDT-X299.aml contains a DefinitionBlock entry and the underlying PCI device implementation. In case of necessary modifications/adaptations, don't forget to also modify/adapt the respective DefinitionBlock entries in concordance with your IOREG entries. The entire SSDT structure is module like. Each module can be independently added, changed or removed in dependence of your specific build, needs and requirements. A stepwise implementation of the individual PCI devices is recommended!

E.9.2.1) - HDEF - onboard PCI Audio Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.HDEF, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.HDEF)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x16)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "model",
                    Buffer (0x1B)
                    {
                        "Intel X299 Series HD Audio"
                    },

                    "name",
                    Buffer (0x24)
                    {
                        "Realtek ALC S1220A Audio Controller"
                    },

                    "hda-gfx",
                    Buffer (0x0A)
                    {
                        "onboard-1"
                    },

                    "device_type",
                    Buffer (0x14)
                    {
                        "HD-Audio-Controller"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xF0, 0xA2, 0x00, 0x00    
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,0C0C"
                    },

                    "MaximumBootBeepVolume",
                    Buffer (One)
                    {
                         0xEE                      
                    },

                    "MaximumBootBeepVolumeAlt",
                    Buffer (One)
                    {
                         0xEE                      
                    },

                    "layout-id",
                    Buffer (0x04)
                    {
                         0x07, 0x00, 0x00, 0x00    
                    },

                    "PinConfigurations",
                    Buffer (Zero) {}
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The HDEF PCI device implementation is valid for the ASUS Prime X299 Deluxe and likely for all other mainboards with the Realtek ALC S1220A Audio Controller chipset. It is a build in device and does not have any slot specific dependency. In any case verify device path "PCI0.HDEF" and PCI device implementations by means of IOREG.


E.9.2.2) - GFX0, HDAU - Nvidia Graphics Card and HDMI/DP Audio PCI implementation

DefintionBlock entry:

Code:
    External (_SB_.PCI2.BR2A, DeviceObj)    // (from opcode)
    External (_SB_.PCI2.BR2A.GFX0, DeviceObj)    // (from opcode)
External (GFX0, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (_SB.PCI2.BR2A)
    {
        Scope (GFX0)
        {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x14)
                    {
                        "built-in",
                        Buffer (One)
                        {
                             0x00                      
                        },

                        "device-id",
                        Buffer (0x04)
                        {
                             0x06, 0x1B, 0x00, 0x00    
                        },

                        "hda-gfx",
                        Buffer (0x0A)
                        {
                            "onboard-2"
                        },

                        "AAPL,slot-name",
                        Buffer (0x07)
                        {
                            "Slot-1"
                        },

                        "@0,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00    
                        },

                        "@1,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00    
                        },

                        "@2,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00    
                        },

                        "@3,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00    
                        },

                        "@4,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00    
                        },

                        "@5,connector-type",
                        Buffer (0x04)
                        {
                             0x00, 0x08, 0x00, 0x00    
                        }
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }

        Device (HDAU)
        {
            Name (_ADR, One)  // _ADR: Address
            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x0C)
                    {
                        "built-in",
                        Buffer (One)
                        {
                             0x00                      
                        },

                        "device-id",
                        Buffer (0x04)
                        {
                             0xEF, 0x10, 0x00, 0x00    
                        },

                        "AAPL,slot-name",
                        Buffer (0x07)
                        {
                            "Slot-1"
                        },

                        "device_type",
                        Buffer (0x16)
                        {
                            "Multimedia Controller"
                        },

                        "name",
                        Buffer (0x1D)
                        {
                            "NVIDIA High Definition Audio"
                        },

                        "hda-gfx",
                        Buffer (0x0A)
                        {
                            "onboard-2"
                        }
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

The actual GFX0 and HDAU PCI device implementation should be valid for SMBIOS iMac17,1 (GFX0), the ASUS Prime X299 Deluxe and any Nvidia Graphics Card implemented in PCIe Slot 1.

It is a build and PCIe slot population dependent device implementation. Nvidia Graphics Card users with more than one graphics card, or with an Nvidia graphics card in a PCIe slot different from PCIe Slot 1, will have to adopt the respective device path entries PCI2.BR2A, PCIe Slot definitions and PCI device properties following their respective IOREG entries.

Below one finds an example of @apfelnico for a GFX and HDAU PCI implementation of 2x Radeon Vega 64 in PCIe Slot 1 and 4. Note that for such implementation also requires an additional DSDT Replacement patch, namely:

Code:
SL01->GFX1     534c3031      47465831

DefintionBlock entry:

Code:
    External (_SB_.PCI2.BR2A, DeviceObj)    // (from opcode)
    External (_SB_.PCI2.BR2A.SL05, DeviceObj)    // (from opcode)
    External (_SB_.PCI1.BR1A, DeviceObj)    // (from opcode)
    External (_SB_.PCI1.BR1A.SL01, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
    Scope (\_SB.PCI2.BR2A.GFX0)
    {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Device (GFXA)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Device (GFX0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                OperationRegion (PCIB, PCI_Config, Zero, 0x0100)
                Field (PCIB, AnyAcc, NoLock, Preserve)
                {
                    Offset (0x10),
                    BAR0,   32,
                    BAR1,   32,
                    BAR2,   64,
                    BAR4,   32,
                    BAR5,   32
                }

                Method (_INI, 0, NotSerialized)  // _INI: Initialize
                {
                    If (LEqual (BAR5, Zero))
                    {
                        Store (BAR2, Local0)
                    }
                    Else
                    {
                        Store (BAR5, Local0)
                    }

                    OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFF0), 0x8000)
                    Field (GREG, AnyAcc, NoLock, Preserve)
                    {
                        Offset (0x6800),
                        GENA,   32,
                        GCTL,   32,
                        LTBC,   32,
                        Offset (0x6810),
                        PSBL,   32,
                        SSBL,   32,
                        PTCH,   32,
                        PSBH,   32,
                        SSBH,   32,
                        Offset (0x6848),
                        FCTL,   32,
                        Offset (0x6EF8),
                        MUMD,   32
                    }

                    Store (Zero, FCTL)
                    Store (Zero, PSBH)
                    Store (Zero, SSBH)
                    Store (Zero, LTBC)
                    Store (One, GENA)
                    Store (Zero, MUMD)
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x16)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-1"
                            },

                            "CFG,CFG_USE_AGDC",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "PP,PP_DisableAutoWattman",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "ATY,Part#",
                            Buffer (0x0C)
                            {
                                "113-3E366DU"
                            },

                            "@0,AAPL,boot-display",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "@0,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@1,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@2,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@3,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "model",
                            Buffer (0x13)
                            {
                                "AMD Radeon Vega 64"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (HDAU)
            {
                Name (_ADR, One)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0C)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-1"
                            },

                            "layout-id",
                            Buffer (0x04)
                            {
                                 0x01, 0x00, 0x00, 0x00       
                            },

                            "name",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "model",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    }

    Scope (\_SB.PCI1.BR1A.GFX1)
    {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Device (GFXB)
        {
            Name (_ADR, Zero)  // _ADR: Address
            Device (GFX1)
            {
                Name (_ADR, Zero)  // _ADR: Address
                OperationRegion (PCIB, PCI_Config, Zero, 0x0100)
                Field (PCIB, AnyAcc, NoLock, Preserve)
                {
                    Offset (0x10),
                    BAR0,   32,
                    BAR1,   32,
                    BAR2,   64,
                    BAR4,   32,
                    BAR5,   32
                }

                Method (_INI, 0, NotSerialized)  // _INI: Initialize
                {
                    If (LEqual (BAR5, Zero))
                    {
                        Store (BAR2, Local0)
                    }
                    Else
                    {
                        Store (BAR5, Local0)
                    }

                    OperationRegion (GREG, SystemMemory, And (Local0, 0xFFFFFFF0), 0x8000)
                    Field (GREG, AnyAcc, NoLock, Preserve)
                    {
                        Offset (0x6800),
                        GENA,   32,
                        GCTL,   32,
                        LTBC,   32,
                        Offset (0x6810),
                        PSBL,   32,
                        SSBL,   32,
                        PTCH,   32,
                        PSBH,   32,
                        SSBH,   32,
                        Offset (0x6848),
                        FCTL,   32,
                        Offset (0x6EF8),
                        MUMD,   32
                    }

                    Store (Zero, FCTL)
                    Store (Zero, PSBH)
                    Store (Zero, SSBH)
                    Store (Zero, LTBC)
                    Store (One, GENA)
                    Store (Zero, MUMD)
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x16)
                        {
                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-4"
                            },

                            "CFG,CFG_USE_AGDC",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "PP,PP_DisableAutoWattman",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "ATY,Part#",
                            Buffer (0x0C)
                            {
                                "113-3E366DU"
                            },

                            "@0,AAPL,boot-display",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "@0,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@1,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@2,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "@3,name",
                            Buffer (0x0D)
                            {
                                "ATY,Kamarang"
                            },

                            "model",
                            Buffer (0x13)
                            {
                                "AMD Radeon Vega 64"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (HDAU)
            {
                Name (_ADR, One)  // _ADR: Address
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0C)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                         
                            },

                            "AAPL,slot-name",
                            Buffer (0x07)
                            {
                                "Slot-3"
                            },

                            "layout-id",
                            Buffer (0x04)
                            {
                                 0x01, 0x00, 0x00, 0x00       
                            },

                            "name",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "model",
                            Buffer (0x0D)
                            {
                                "AMD HD-Audio"
                            },

                            "hda-gfx",
                            Buffer (0x0A)
                            {
                                "onboard-2"
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }
    }


E.9.2.3) - SBUS - onboard System Management Bus (SMBUS) Controller Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.SBUS, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.SBUS)
    {
        OperationRegion (GPIO, SystemIO, 0x0500, 0x3C)
        Field (GPIO, ByteAcc, NoLock, Preserve)
        {
            Offset (0x0C),
            GL00,   8,
            Offset (0x2C),
                ,   1,
            GI01,   1,
                ,   1,
            GI06,   1,
            Offset (0x2D),
            GL04,   8
        }

        Device (BUS0)
        {
            Name (_CID, "smbus")  // _CID: Compatible ID
            Name (_ADR, Zero)  // _ADR: Address
            Device (MKY0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Name (_CID, "mikey")  // _CID: Compatible ID
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    If (LEqual (Arg2, Zero))
                    {
                        Return (Buffer (One)
                        {
                             0x03                          
                        })
                    }

                    Return (Package (0x07)
                    {
                        "refnum",
                        Zero,
                        "address",
                        0x39,
                        "device-id",
                        0x0CCB,
                        Buffer (One)
                        {
                             0x00                          
                        }
                    })
                }

                Method (H1EN, 1, Serialized)
                {
                    If (LLessEqual (Arg0, One))
                    {
                        If (LEqual (Arg0, One))
                        {
                            Or (GL04, 0x04, GL04)
                        }
                        Else
                        {
                            And (GL04, 0xFB, GL04)
                        }
                    }
                }

                Method (H1IL, 0, Serialized)
                {
                    ShiftRight (And (GL00, 0x02), One, Local0)
                    Return (Local0)
                }

                Method (H1IP, 1, Serialized)
                {
                    If (LLessEqual (Arg0, One))
                    {
                        Not (Arg0, Arg0)
                        Store (Arg0, GI01)
                    }
                }

                Name (H1IN, 0x11)
                Scope (\_GPE)
                {
                    Method (_L11, 0, NotSerialized)  // _Lxx: Level-Triggered GPE
                    {
                        Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80)
                    }
                }

                Method (P1IL, 0, Serialized)
                {
                    ShiftRight (And (GL00, 0x40), 0x06, Local0)
                    Return (Local0)
                }

                Method (P1IP, 1, Serialized)
                {
                    If (LLessEqual (Arg0, One))
                    {
                        Not (Arg0, Arg0)
                        Store (Arg0, GI06)
                    }
                }

                Name (P1IN, 0x16)
                Scope (\_GPE)
                {
                    Method (_L16, 0, NotSerialized)  // _Lxx: Level-Triggered GPE
                    {
                        Notify (\_SB.PCI0.SBUS.BUS0.MKY0, 0x80)
                    }
                }
            }

            Device (DVL0)
            {
                Name (_ADR, 0x57)  // _ADR: Address
                Name (_CID, "diagsvault")  // _CID: Compatible ID
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x03)
                        {
                            "address",
                            0x57,
                            Buffer (One)
                            {
                                 0x00                          
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (BLC0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Name (_CID, "smbus-blc")  // _CID: Compatible ID
                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x0E)
                        {
                            "refnum",
                            Zero,
                            "version",
                            0x02,
                            "fault-off",
                            0x03,
                            "fault-len",
                            0x04,
                            "skey",
                            0x4C445342,
                            "type",
                            0x49324300,
                            "smask",
                            0xFF
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0C)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                          
                    },

                    "model",
                    Buffer (0x18)
                    {
                        "Intel X299 Series SMBus"
                    },

                    "name",
                    Buffer (0x21)
                    {
                        "System Management Bus Controller"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xA3, 0xA2, 0x00, 0x00        
                    },

                    "device_type",
                    Buffer (0x0F)
                    {
                        "SMB Controller"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The SBUS PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.SBUS" and PCI device implementations by means of IOREG.


E.9.2.4) - LPCB - onboard Printed Circuit Board Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.LPCB, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.LPCB)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x06)
                {
                    "device-id",
                    Buffer (0x04)
                    {
                         0xD2, 0xA2, 0x00, 0x00    
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,1d41"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The LPBC PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.HDEF" and PCI device implementations by means of IOREG.


E.9.2.5) - IMEI - onboard Intel Management Engine Interface (IMEI) Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.IMEI, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.IMEI)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0E)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "model",
                    Buffer (0x16)
                    {
                        "Intel X299 Series MEI"
                    },

                    "name",
                    Buffer (0x22)
                    {
                        "Intel Management Engine Interface"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x3A, 0x1E, 0x00, 0x00    
                    },

                    "device_type",
                    Buffer (0x10)
                    {
                        "IMEI-Controller"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,1e3a"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The IMEI PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.IMEI" and PCI device implementations by means of IOREG.

E.9.2.6) - PMCR - onboard Power Management Controller (PMC) PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.PMCR, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.PMCR)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0E)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "model",
                    Buffer (0x16)
                    {
                        "Intel X299 Series PMC"
                    },

                    "name",
                    Buffer (0x0A)
                    {
                        "Intel PMC"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xA1, 0xA2, 0x00, 0x00    
                    },

                    "device_type",
                    Buffer (0x0F)
                    {
                        "PMC-Controller"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci8086,a121"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The PMCR PCI device implementation should be valid for all X299 mainboards and should not require any build specific adaptation/modification. In any case verify device path "PCI0.PMCR" and PCI device implementations by means of IOREG.

E.9.2.7) - XHCI - onboard Extended Host Controller Interface (XHCI) PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.XHCI, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.XHCI)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xAF, 0xA2, 0x00, 0x00    
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel XHCI Controller"
                    },

                    "model",
                    Buffer (0x1A)
                    {
                        "Intel X299 Series USB 3.0"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01                      
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00                      
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The XHCI USB3.0 PCI device implementation is valid for the ASUS Prime X299 Deluxe and for all other X299 mainboards with the same XHCI controller chipset. Verify and adopt/modify if necessary device path "PCI0.XHCI" and PCI device implementations by means of IOREG.

E.9.2.8) - PXSX - ASMedia ASM3142 USB 3.1 Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.RP01.PXSX, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP05.PXSX, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP07.PXSX, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.RP01.PXSX)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x42, 0x21, 0x00, 0x00    
                    },

                    "name",
                    Buffer (0x17)
                    {
                        "ASMedia XHC Controller"
                    },

                    "model",
                    Buffer (0x1B)
                    {
                        "ASMedia ASM3142 USB 3.1 #1"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01                      
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00                      
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Scope (\_SB.PCI0.RP05.PXSX)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x42, 0x21, 0x00, 0x00    
                    },

                    "name",
                    Buffer (0x17)
                    {
                        "ASMedia XHC Controller"
                    },

                    "model",
                    Buffer (0x1B)
                    {
                        "ASMedia ASM3142 USB 3.1 #2"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01                      
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00                      
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Scope (\_SB.PCI0.RP07.PXSX)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x1B)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x42, 0x21, 0x00, 0x00    
                    },

                    "name",
                    Buffer (0x17)
                    {
                        "ASMedia XHC Controller"
                    },

                    "model",
                    Buffer (0x1B)
                    {
                        "ASMedia ASM3142 USB 3.1 #3"
                    },

                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0A8C,
                    "AAPL,current-in-sleep",
                    0x0A8C,
                    "AAPL,max-port-current-in-sleep",
                    0x0834,
                    "AAPL,device-internal",
                    Zero,
                    "AAPL,clock-id",
                    Buffer (One)
                    {
                         0x01                      
                    },

                    "AAPL,root-hub-depth",
                    0x1A,
                    "AAPL,XHC-clock-id",
                    One,
                    Buffer (One)
                    {
                         0x00                      
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The PXSX ASMedia ASM3142 USB 3.1 onboard Intel AHCI SATA controller PCI device implementation is valid for the ASUS Prime X299 Deluxe and for all other X299 mainboards with the same XHC USB3.1 controller ASMedia ASM3142 chipset configuration. Verify and adopt/modify if necessary device paths "PCI0.RP01.PXSX", "PCI0.RP05.PXSX", "PCI0.RP07.PXSX" and PCI device implementations by means of IOREG.

E.9.2.9) - PXSX - NVMe Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.RP09.PXSX, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.RP09.PXSX)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x08)
                {
                    "AAPL,slot-name",
                    Buffer (0x04)
                    {
                        "M.2"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "name",
                    Buffer (0x11)
                    {
                        "Samsung NVMe SSD"
                    },

                    "model",
                    Buffer (0x11)
                    {
                        "Samsung NVMe SSD"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The current PXSX NVMe Controller PCI implementation is purely cosmetic nature and is valid for the ASUS Prime X299 Deluxe and the Samsung EVO 960 1TB. Verify and adopt/modify if necessary device paths "PCI0.RP09.PXSX" and the respective PCI device implementations by means of IOREG.


E.9.2.10) - SAT1 - Intel AHCI SATA Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.SAT1, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.SAT1)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0C)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel AHCI Controller"
                    },

                    "model",
                    Buffer (0x17)
                    {
                        "Intel X299 Series SATA"
                    },

                    "device_type",
                    Buffer (0x15)
                    {
                        "AHCI SATA Controller"
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x82, 0xA2, 0x00, 0x00    
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The SAT1 onboard Intel AHCI SATA controller PCI device implementation is valid for the ASUS Prime X299 Deluxe and for all other X299 mainboards with the same AHCI SATA controller chipset. Verify and adopt/modify if necessary device path "PCI0.SAT1" and PCI device implementations by means of IOREG.


E.9.2.11) - ETH0/ETH1 - onboard LAN Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI0.ETH0, DeviceObj)    // (from opcode)
External (_SB_.PCI0.RP02.ETH1, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (\_SB.PCI0.ETH0)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x10)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel I219V2 Ethernet"
                    },

                    "model",
                    Buffer (0x2A)
                    {
                        "Intel I219V2 PCI Express Gigabit Ethernet"
                    },

                    "location",
                    Buffer (0x02)
                    {
                        "1"
                    },

                    "subsystem-id",
                    Buffer (0x04)
                    {
                         0x72, 0x86, 0x00, 0x00    
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xB8, 0x15, 0x00, 0x00    
                    },

                    "subsystem-vendor-id",
                    Buffer (0x04)
                    {
                         0x43, 0x10, 0x00, 0x00    
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

    Scope (\_SB.PCI0.RP02.ETH1)
    {
        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x10)
                {
                    "AAPL,slot-name",
                    Buffer (0x09)
                    {
                        "Built In"
                    },

                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "name",
                    Buffer (0x16)
                    {
                        "Intel I211VA Ethernet"
                    },

                    "model",
                    Buffer (0x2A)
                    {
                        "Intel I211VA PCI Express Gigabit Ethernet"
                    },

                    "location",
                    Buffer (0x02)
                    {
                        "2"
                    },

                    "subsystem-id",
                    Buffer (0x04)
                    {
                         0xF0, 0x85, 0x00, 0x00    
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0x39, 0x15, 0x00, 0x00    
                    },

                    "subsystem-vendor-id",
                    Buffer (0x04)
                    {
                         0x43, 0x10, 0x00, 0x00    
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

Note that the ETH0/ETH1 Intel I219V2 PCI Express Gigabit Ethernet and Intel I211VA PCI Express Gigabit Ethernet onboard LAN controller PCI implementation is of pure cosmetic nature and only valid for ASUS Prime X299 Deluxe or X299 mainboards with the same LAN Controller configuration. Owners of different X299 mainboards have to verify and adopt/modify if necessary the device path "PCI0.SAT1" and the PCI device implementations by means of IOREG.

E.9.2.12) - ARPT - OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI3.BR3D.ARPT, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (_SB.PCI3.BR3D.ARPT)
    {
        OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
        Field (PCIS, AnyAcc, NoLock, Preserve)
        {
            PVID,   16,
            PDID,   16
        }

        Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
        {
            Return (GPRW (0x69, 0x04))
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store (Package (0x0E)
                {
                    "built-in",
                    Buffer (One)
                    {
                         0x00                      
                    },

                    "device-id",
                    Buffer (0x04)
                    {
                         0xA0, 0x43, 0x00, 0x00    
                    },

                    "AAPL,slot-name",
                    Buffer (0x07)
                    {
                        "Slot-3"
                    },

                    "device_type",
                    Buffer (0x13)
                    {
                        "AirPort Controller"
                    },

                    "model",
                    Buffer (0x4A)
                    {
                        "OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 Controller"
                    },

                    "compatible",
                    Buffer (0x0D)
                    {
                        "pci14e4,43a0"
                    },

                    "name",
                    Buffer (0x10)
                    {
                        "AirPort Extreme"
                    }
                }, Local0)
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }

The ARPT OSX WIFI Broadcom BCM94360CD 802.11 a/b/g/n/ac + Bluetooth 4.0 AirPort Controller PCI device implementation is of pure cosmetic nature and only valid for users of the latter WIFI/Bluetooth PCIe Adapter in PCIe Slot 3. Users of this PCIe Adapter within a PCIe slot population different from PCIe Slot 3 have to adapt/modify the respective device path "PCI3.BR3D.ARPT" and likely also the respective ACPI DSDT Replacement Patch. Users of the Asus Prime X299 Deluxe onboard Bluetooth chipset controller or with a completely different WIFI/Bluetooth configuration have to either adopt the entire Airport PCI implementation by means of IOREG or can also skip the entire part.

E.9.2.13) - ThunderboltEX 3 Controller PCI Implementation:

DefintionBlock entry:

Code:
External (_SB_.PCI1.BR1A, DeviceObj)    // (from opcode)
External (_SB_.PCI1.BR1A.SL01, DeviceObj)    // (from opcode)
External (SL01, DeviceObj)    // (from opcode)

PCI Device Implementation:

Code:
Scope (_SB.PCI1.BR1A)
    {
        Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
        {
            Return (Zero)
        }

        Scope (SL01)
        {
            OperationRegion (PCIS, PCI_Config, Zero, 0x0100)
            Field (PCIS, AnyAcc, NoLock, Preserve)
            {
                PVID,   16,
                PDID,   16
            }
            Method (_PRW, 0, NotSerialized)  // _PRW: Power Resources for Wake
            {
                Return (GPRW (0x69, 0x04))
            }
            Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
            {
                Return (Zero)
            }

            Device (DSB0)
            {
                Name (_ADR, Zero)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (NHI0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Name (_STR, Unicode ("Thunderbolt"))  // _STR: Description String
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }

                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        Store (Package (0x0B)
                            {
                                "built-in",
                                Buffer (One)
                                {
                                     0x00                      
                                },

                                "device_type",
                                Buffer (0x18)
                                {
                                    "Thunderbolt3 Controller"
                                },

                                "model",
                                Buffer (0x20)
                                {
                                    "Intel DSL6540 Thunderbolt 3 NHI"
                                },

                                "name",
                                Buffer (0x25)
                                {
                                    "Intel DSL6540 Thunderbolt Controller"
                                },

                                "power-save",
                                One,
                                Buffer (One)
                                {
                                     0x00                      
                                }
                            }, Local0)
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                      
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (DSB1)
            {
                Name (_ADR, 0x00010000)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS3)
                {
                    Name (_ADR, 0x00030000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS5)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS6)
                {
                    Name (_ADR, 0x00060000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                      
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (DSB2)
            {
                Name (_ADR, 0x00020000)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }

                    Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                    {
                        If (LEqual (Arg2, Zero))
                        {
                            Return (Buffer (One)
                            {
                                 0x03                      
                            })
                        }

                        Return (Package (0x17)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                      
                            },

                            "model",
                            Buffer (0x16)
                            {
                                "Intel DSL6540 USB 3.1"
                            },

                            "name",
                            Buffer (0x1D)
                            {
                                "Intel DSL6540 XHC Controller"
                            },

                            "AAPL,current-available",
                            0x0834,
                            "AAPL,current-extra",
                            0x0A8C,
                            "AAPL,current-in-sleep",
                            0x0A8C,
                            "AAPL,max-port-current-in-sleep",
                            0x0834,
                            "AAPL,device-internal",
                            Zero,
                            "AAPL,clock-id",
                            Buffer (One)
                            {
                                 0x01                      
                            },

                            "AAPL,root-hub-depth",
                            0x1A,
                            "AAPL,XHC-clock-id",
                            One,
                            Buffer (One)
                            {
                                 0x00                      
                            }
                        })
                    }
                }

                Device (UPS1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS3)
                {
                    Name (_ADR, 0x00030000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS5)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS6)
                {
                    Name (_ADR, 0x00060000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                      
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Device (DSB3)
            {
                Name (_ADR, 0x00040000)  // _ADR: Address
                Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                {
                    Return (Zero)
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS1)
                {
                    Name (_ADR, 0x00010000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS2)
                {
                    Name (_ADR, 0x00020000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS3)
                {
                    Name (_ADR, 0x00030000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS4)
                {
                    Name (_ADR, 0x00040000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS5)
                {
                    Name (_ADR, 0x00050000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Device (UPS6)
                {
                    Name (_ADR, 0x00060000)  // _ADR: Address
                    Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
                    {
                        Return (Zero)
                    }
                }

                Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
                {
                    Store (Package (0x04)
                        {
                            "built-in",
                            Buffer (One)
                            {
                                 0x00                      
                            },

                            "name",
                            "pci-bridge"
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

            Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
            {
                Store (Package (0x02)
                    {
                        "PCI-Thunderbolt",
                        One
                    }, Local0)
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

The ThunderboltEX 3 PCI device implementation (in my personal opinion by far the most sophisticated and most beautiful PCI device implementation performed by @afpelnico) is of pure cosmetic nature and only valid for users of the latter TB PCIe Adapter in PCIe Slot 4. Users of this PCIe Adapter within a PCIe slot population different from PCIe Slot 3 have to adapt/modify the respective path entires "PCI1", "BR1A" and "SL01". Users of TB PCIe Adapters different from the ASUS TBEX 3 or users without any TB PCIe Adapter, have to either adopt the entire TB PCI implementation by means of IOREG or can simply skip the entire part.

E.9.2.13) - DTGP Method:

Code:
Method (DTGP, 5, NotSerialized)
    {
        If (LEqual (Arg0, ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b")))
        {
            If (LEqual (Arg1, One))
            {
                If (LEqual (Arg2, Zero))
                {
                    Store (Buffer (One)
                        {
                             0x03                      
                        }, Arg4)
                    Return (One)
                }

                If (LEqual (Arg2, One))
                {
                    Return (One)
                }
            }
        }

        Store (Buffer (One)
            {
                 0x00                      
            }, Arg4)
        Return (Zero)
    }
}

The DTG Method Implementation is required for SSDT functionality and has not to be modified or adopted in any case.

After successfully implementing the ACPI DSDT Replacement Patch Table, SSDT-X299.aml and SSDT-XOSI.aml, my System now possesses full sleep/wake functionality even with the ThunderboltEX 3 PCIe Adapter implementation. Absolutely amazing!

Note that in addition I added the "darkwake=1" and "nv_spanmodepolicy=1" boot flags to my config.plist by means of Clover Configurator, Section "Boot", "Arguments". "nv_spanmodepolicy=1" can be unchecked by all AMD graphics card users.


E.10) System Overview CPU Cosmetics

As our Skylake-X CPU at present will not be properly recognised by OS X, Apple's System Overview ("About This Mac") reveals incomplete or simply wrong CPU details. Many times CPU's like the i9-7980XE are implemented as "unknown"...

View attachment 286632

I recently discovered on InsanelyMac a sophisticated fix of pure cosmetic nature developed by Shaneee (also thanks to fabiosun for pointing me to this direction), which allows to implement those CPU details you want to be implemented. For the sake of simplicity, I summarise below the necessary steps.

1.) Open a terminal and use the following commands:

Code:
cp /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings ~/Desktop/

Code:
sudo mv /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings-Backup
2.) Open "AppleSystemInfo.strings" on your Desktop with TextWrangler and change

Code:
<key>UnknownCPUKind</key>
<string>Unknown</string>

to what ever you want. In my case I choose:

Code:
<key>UnknownCPUKind</key>
<string>4,4 GHz 18-core 36-thread Skylake-X i9-7980XE</string>

Save "AppleSystemInfo.strings"
3.) Run the following terminal commands:

Code:
sudo codesign -f -s - ~/Desktop/AppleSystemInfo.strings

Code:
sudo cp ~/Desktop/AppleSystemInfo.strings /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/

and reboot your system.
4.) Open your config.plist with Clover Configurator and in Section "CPU" set "Type" to "Unknown". Save the config.plist and
reboot.
5.) Apple's System Overview now will reveal the following details:

As fall back option enter the following terminal commands:

Code:
sudo rm /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings

Code:
sudo mv /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.strings-Backup /System/Library/PrivateFrameworks/AppleSystemInfo.framework/Versions/A/Resources/English.lproj/AppleSystemInfo.string

and reboot.

F.) Benchmarking

View attachment 294976

F.1) Sylake-X Intel I9-7980XE CPU Benchmarking

View attachment 294709

View attachment 301307

View attachment 295136


F.1) Gigabyte AORUS GTX 1080 Ti Waterforce EB 11GB Extreme Edition Benchmarking

View attachment 294977

View attachment 294958


G.) Summary and Conclusion:

Already during the individual macOS High Sierra 10.13 beta releases, Syklake-X/X299 systems reached full functionality together with flawless stability. Since the Final Release of macOS High Sierra 10.13 it might be the right moment to follow my Desktop Guide to unfold the unbelievable Skylake-X/X299 potential together with macOS High Sierra 10.13!

I am quite optimistic that high-end builds based on extremely novel Skylake-X/X299 technology will find manifold application, not only in science and research at universities or research institutions, engineering facilities, or medical labs, etc... Skylake-X processors with up to 18 cores (36 threads) and turbo frequencies up to 4.5 GHz will make make X299 to a "relatively cheap" but really serious alternative to the yet to be released iMac Pro's and Mac Pro's. The principal intention of this desktop guide was to demonstrate, that we are able to build and configure fully functional and relatively "low-cost" high-end systems nowadays, which go far beyond of what Apple is able to offer at present or will be ever able to offer for some reasonable pricing. A Skylake-X/X299-System, that allows the use of all software-packages developed for MacOS, Unix, Linux or even Windows at the same time (e.g. think on Vine, Parallels, or a dual boot system configuration). The flexibility between different mainboards (Asus, Gigabyte, ASRock, MSI, etc.), different Skylake-X processors, and different RAM memory configurations (16-128GB) should make such system affordable for anybody (also home office, audio and video editing/production, etc.) and allow its perfect adaptation for the specific purpose, requirements and available budgets. It might not be necessary to outline, that current Skylake-X/X299 Systems perform absolutely stable on a 24/7/365 basis.

I am a scientist, expert in solar physics, space weather forecast and related telescope/instrument/space-mission development. In the frame of my scientific research, I developed parallelized image reconstruction, spectral line inversion and numerical modeling algorithms/applications, which require tremendous parallelized calculation power, RAM memory and storage capacities to reduce, analyze and interpret extensive and pioneering scientific ground-based or space-born observational data sets. This basically was also the professional motivation for my innovative Customac-Pro build iSPOR-S, the imaging Spectropolarimetric Parallel Organized Reconstruction Server running iSPOR-DP, the Imaging Spectropolarimetric Parallel Organized Reconstruction Data Pipeline software package for the GREGOR Fabry-Pérot Interferometer, located at the 1.5m GREGOR Solar Telescope (Europe's largest solar telescope) on Tenerife, Canary Islands, Spain. Anybody interested can find more details on my personal webpage.

View attachment 272069
 
I've installed Windows but it has overwritten the Clover on my NVMe. I'm able to login to OSX again using USB without any problem. I followed some guides I found that specified to mount the EFI, delete (or rename) the Microsoft/Boot/bootmgfw.efi file and put CLOVERX64.efi in that directory which I did.
Now the bios is refusing to boot from the NVMe (doesn't even show Clover, nor Windows). What am I missing?

Hi:

Windows does not play well with other bootmanagers. I don't know about the suggestion to replace Microsoft/Boot/bootmgfw.efi, doesn't look like a good idea to me. My experience with Windows is that any little thing you do on its Microsoft/Boot/ folder might make it unbootable.

My suggestion is to boot into macOS using the USB, then re-install Clover. Do this every time Windows messes Clover up, which happens sometimes.

But I also suspect your replacement of Microsoft/Boot/bootmgfw.efi might have made Windows unbootable, even with Clover working. If that is the case, you can try to follow the instructions below. My system is triple booting from the same disk (Win, macOS, Linux) and sometimes a bit of help is necessary:
  1. Make sure you can boot your system using a USB with Clover.
  2. Make sure you disable CSM, so that you always boot in UEFI and never in legacy BIOS mode.
  3. Boot Windows in rescue mode with a cmd.exe window.
  4. Mount the ESP using diskpart and assign letter.
  5. diskpart
    select disk 0
    select part 1
    assign letter=<ESP> (eg, b)
  6. bootrec /RebuildBcd (in ESP\EFI\Microsoft\Boot)
  7. bcdboot c:\Windows /s <ESP>:

In addition, there is bcdedit, which edits the BCD store (this is what the UEFI shows as bootable). Examples:
bcdedit /set {bootmgr} device partition=Z:
bcdedit.exe /enum firmware (to view)
bcedit /enum {default}
bcedit /enum {bootmgr}

If bootrec doesn't work (often it fails to find a windows installation)
  1. Delete or rename the existing BCD from
    ESP\EFI\Microsoft\Boot
  2. Restart without BCD
  3. Create a new one with:
    bootrec /RebuildBcd
    (<ESP> does not need to be mounted)
With this steps, your Windows installation should be bootable -- I'm trying to help you recover from the fact you deleted Microsoft/Boot/bootmgfw.efi

Finally, boot into macOS using Clover from the installation USB and install Clover. Everything should be good now.
 
I've installed Windows but it has overwritten the Clover on my NVMe. I'm able to login to OSX again using USB without any problem. I followed some guides I found that specified to mount the EFI, delete (or rename) the Microsoft/Boot/bootmgfw.efi file and put CLOVERX64.efi in that directory which I did.
Now the bios is refusing to boot from the NVMe (doesn't even show Clover, nor Windows). What am I missing?

What you apparently miss is to carefully read my guide.

I clearly state that one has to disconnect all drives except the destination drive for the windows installation when performing the Windows installation. You did not follow this important advice! Now windows has reformatted the EFI-Partition on your 10.13 System Disk.

Great :thumbup:

Reformat your System Disk with HFS+ and GPT, copy the EFI-Folder to the new EFI-partition, and reinstall macOS High Sierra.

Further bad news! ;)

Windows installed its boot loader in a windows boot partition on your 10.13 system disk.

Thus after reformatting your 10.13 system disk with HFS+ and GPT, your Windows will not be bootable.

You therefore will also have to reinstall windows, by now hopefully considerng my advise and instructions!

Have fun and enjoy :thumbup:

KGP
 
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I've installed Windows but it has overwritten the Clover on my NVMe. I'm able to login to OSX again using USB without any problem. I followed some guides I found that specified to mount the EFI, delete (or rename) the Microsoft/Boot/bootmgfw.efi file and put CLOVERX64.efi in that directory which I did.
Now the bios is refusing to boot from the NVMe (doesn't even show Clover, nor Windows). What am I missing?
The problem is Windows either overwrites /efi/boot/bootx64.efi or the firmware stops using it - on internal disks this file is supposed to be for booting when, for whatever reason there are no entries in the NVRAM boot menu - you can call it the 'fallback path' if you like.

You install windows, it adds it's NVRAM 'Windows Boot Manager' entry, according to the UEFI spec under these conditions /efi/boot/bootx64.efi should no longer be used for booting. In fact you shouldn't have been using it anyway. The solution: add Clover to the NVRAM boot menu. See the docs folder that comes with Clover for how to do this. Rooting about in the Microsoft folder will only bring more grief.
 
sorry, I had to boot the machine, here is everything you should need minus my bios settings. however the only difference from mine to your guide is I disabled onboard bluetooth/wifi/sound as I do not use any of those items. the ssdt-x299 has been edited to reflect this.

Everything looks fine except one thing. Do you really need NvidiaWeb checked?

Do you still have problems with your 3 monitors and your Maxwell GPU on Skylake-X/X299? If so, maybe also the other issues might be really related with the web driver, as you suggest.

However this would mean that the web driver does not properly work with your Maxwell GPU on Skylake-X/X299, although the Web Driver perfectly works with my Pascal GPU and Pascal GPUs of other users on Skylake-X/X299.

Please note that my guide explicitly bases on the ASUS Prime X299 Deluxe and the Gigabyte AORUS GeForce GTX 1080 Ti WaterForce WB 11GB Extrem Edition. Deviating system configurations might work or simply might not work...

I am trying to help and support users with deviating system configurations, however such systems are out of my responsibilities and at the risk of the respective users.

Cheers,

KGP
 
Everything looks fine except one thing. Do you really need NvidiaWeb checked?

Do you still have problems with your 3 monitors and your Maxwell GPU on Skylake-X/X299? If so, maybe also the other issues might be really related with the web driver, as you suggest.

However this would mean that the web driver does not properly work with your Maxwell GPU on Skylake-X/X299, although the Web Driver perfectly works with my Pascal GPU and Pascal GPUs of other users on Skylake-X/X299.

Please note that my guide explicitly bases on the ASUS Prime X299 Deluxe and the Gigabyte AORUS GeForce GTX 1080 Ti WaterForce WB 11GB Extrem Edition. Deviating system configurations might work or simply might not work...

I am trying to help and support users with deviating system configurations, however such systems are out of my responsibilities and at the risk of the respective users.

Cheers,

KGP


100% not asking you to support something outside of the guide. just wondering if anyone has any info regarding this matter.

no i dont need nvidia web checked. its unchecked now. it was just one of those things i did to see what would happen.


To further elaborate on this issue for some reason (nvidia web drivers) are not allowing "mach reboot" to be sent upon restart... thus the machine stays running.

so strange.
 
100% not asking you to support something outside of the guide. just wondering if anyone has any info regarding this matter.

no i dont need nvidia web checked. its unchecked now. it was just one of those things i did to see what would happen.


To further elaborate on this issue for some reason (nvidia web drivers) are not allowing "mach reboot" to be sent upon restart... thus the machine stays running.

so strange.

Sorry that you face these issues. I would certainly help if I could..
 
Sorry that you face these issues. I would certainly help if I could..

thank you!

do u know of any other "power users" like yourself or @DSM2 who are working with an nvidia card that may know this issue?
 
thank you!

do u know of any other "power users" like yourself or @DSM2 who are working with an nvidia card that may know this issue?

I do not properly remember if anybody connected to this thread owns a Mawell Titan X. One would have to go through more than 2800 posts.

Let’s hope that somebody replies on your issues and suggests some solution.

Up to my knowledge there are definitely not similar issues observed with Pascal graphics cards.
 
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