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[HELP] Disable HD 7650M in DSDT

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nguyenmac said:
I'm using MaciASL 1.3 too. It's strange that I can apply patch (ACPI 4.0) and you don't.

Your problem is the patch:
Code: 
into definitionblock code_regex External\s+\(\\_SB_\.PCI0\.GFX0\.DD02\._BCM,\s+IntObj\) replace_matched begin External(\\_SB_.PCI0.GFX0.DD02._BCM, MethodObj)
end;

You can edit by hand by changing this line from IntObj to MethodObj
Code: 
External (\_SB_.PCI0.GFX0.DD02._BCM, IntObj)
Click to expand...

Yes I am now able to patch it with selecting v4.0 (had to quit before using it again) only. Did not change the parameter though. Thanks!
 
using now Patched SSD-1 + Patched DSDT but I couldn't tell whether its working or not.
 
Do you see it in System Information?
 
roswell said:
Yes indeed.
Click to expand...

So the patch does not work. Try apply the dsdt patch to your PBI's dsdt, and remove SSDT containing Graphics.

Code: 
into definitionblock code_regex External\s+\(\\_SB_\.PCI0\.PEGP\.DGFX\.SVID\) remove_matched;

into method label _OFF parent_adr 0x00010000 remove_entry;
into device name_adr 0x00010000 insert
begin
OperationRegion (RPCX, SystemMemory, \XBAS,0x9000)\n
Field (RPCX, DWordAcc, NoLock, Preserve)\n
            {\n
                        Offset (0x8214), \n
                        Offset (0x8216), \n
                LNKS,   4, \n
                        Offset (0x8C20), \n
                    ,   4, \n
                AFE4,   1, \n
                AFE5,   1\n
            }\n
end;

into method label _OFF parent_label PEGP.DGFX remove_entry;
into method label SGPO parent_label PEGP.DGFX remove_entry;
into device label PEGP.DGFX insert
begin
Name (ELCT, Zero)\n
        Name (HVID, Zero)\n
        Name (HDID, Zero)\n
        OperationRegion (PCIS, PCI_Config, Zero, 0xF0)\n
        Field (PCIS, DWordAcc, Lock, Preserve)\n
        {\n
            DVID,   16, \n
                    Offset (0x2C), \n
            SVID,   16, \n
            SDID,   16, \n
                    Offset (0x4C), \n
            WVID,   16, \n
            WDID,   16\n
        }\n
OperationRegion (PCAP, PCI_Config, \EECP,0x14)\n
Field (PCAP, DWordAcc, NoLock, Preserve)\n
            {\n
                        Offset (0x10), \n
                LCTL,   16\n
            }\n
OperationRegion (GPIO, SystemIO, \GBAS,0x60)\n
Field (GPIO, ByteAcc, Lock, Preserve)\n
            {\n
                        Offset (0x0C), \n
                LVL0,   32, \n
                        Offset (0x38), \n
                LVL1,   32, \n
                        Offset (0x48), \n
                LVL2,   32\n
            }\n
Method (_OFF, 0, Serialized)\n
        {\n
            Store (LCTL, ELCT)\n
            Store (SVID, HVID)\n
            Store (SDID, HDID)\n
            Store (One, LNKD)\n
            Store (Zero, AFE4)\n
            Store (One, AFE5)\n
            SGPO (HLRS, Zero)\n
            SGPO (PWEN, Zero)\n
            Notify (\_SB.PCI0.PEGP, Zero)\n
            Return (Zero)\n
        }\n
Method (SGPO, 2, Serialized)\n
        {\n
            And (Arg0, 0x7F, Arg0)\n
            If (LEqual (Arg1, Zero))\n
            {\n
                Store (Zero, Local3)\n
            }\n
            Else\n
            {\n
                Store (One, Local3)\n
            }\n
            If (LLess (Arg0, 0x20))\n
            {\n
                ShiftLeft (Local3, Arg0, Local0)\n
                ShiftLeft (One, Arg0, Local1)\n
                And (\_SB.PCI0.PEGP.DGFX.LVL0, Not (Local1), Local2)\n
                Or (Local2, Local0, \_SB.PCI0.PEGP.DGFX.LVL0)\n
            }\n
            Else\n
            {\n
                If (LLess (Arg0, 0x40))\n
                {\n
                    ShiftLeft (Local3, Subtract (Arg0, 0x20), Local0)\n
                    ShiftLeft (One, Subtract (Arg0, 0x20), Local1)\n
                    And (\_SB.PCI0.PEGP.DGFX.LVL1, Not (Local1), Local2)\n
                    Or (Local2, Local0, \_SB.PCI0.PEGP.DGFX.LVL1)\n
                }\n
                Else\n
                {\n
                    ShiftLeft (Local3, Subtract (Arg0, 0x40), Local0)\n
                    ShiftLeft (One, Subtract (Arg0, 0x40), Local1)\n
                    And (\_SB.PCI0.PEGP.DGFX.LVL2, Not (Local1), Local2)\n
                    Or (Local2, Local0, \_SB.PCI0.PEGP.DGFX.LVL2)\n
                }\n
            }\n
            Return (One)\n
        }\n
end;

into method label _INI parent_label _SB code_regex . insert
begin
\_SB_.PCI0.PEGP.DGFX._OFF()\n
end;
 
roswell said:
Compilation error, see screenshot attached.

Here is my acpi tables https://dl.dropboxusercontent.com/u/19583075/ACPI Tables.zip
Note that you can find SgTabl in SSDT-5.aml in 'All clean' folder.
Click to expand...

I just did it here and it worked fine. You must be doing something wrong. Why 'SSDT-1.aml' (previously patched?) when the actual file is 'SSDT-5.aml'. Try with the actual files you just posted.

- - - Updated - - -

roswell said:
using now Patched SSD-1 + Patched DSDT but I couldn't tell whether its working or not.
Click to expand...

Post ioreg: http://www.tonymacx86.com/audio/58368-guide-how-make-copy-ioreg.html
 
nguyenmac said:
So the patch does not work. Try apply the dsdt patch to your PBI's dsdt, and remove SSDT containing Graphics.

Code: 
into definitionblock code_regex External\s+\(\\_SB_\.PCI0\.PEGP\.DGFX\.SVID\) remove_matched;

into method label _OFF parent_adr 0x00010000 remove_entry;
into device name_adr 0x00010000 insert
begin
OperationRegion (RPCX, SystemMemory, \XBAS,0x9000)\n
Field (RPCX, DWordAcc, NoLock, Preserve)\n
            {\n
                        Offset (0x8214), \n
                        Offset (0x8216), \n
                LNKS,   4, \n
                        Offset (0x8C20), \n
                    ,   4, \n
                AFE4,   1, \n
                AFE5,   1\n
            }\n
end;

into method label _OFF parent_label PEGP.DGFX remove_entry;
into method label SGPO parent_label PEGP.DGFX remove_entry;
into device label PEGP.DGFX insert
begin
Name (ELCT, Zero)\n
        Name (HVID, Zero)\n
        Name (HDID, Zero)\n
        OperationRegion (PCIS, PCI_Config, Zero, 0xF0)\n
        Field (PCIS, DWordAcc, Lock, Preserve)\n
        {\n
            DVID,   16, \n
                    Offset (0x2C), \n
            SVID,   16, \n
            SDID,   16, \n
                    Offset (0x4C), \n
            WVID,   16, \n
            WDID,   16\n
        }\n
OperationRegion (PCAP, PCI_Config, \EECP,0x14)\n
Field (PCAP, DWordAcc, NoLock, Preserve)\n
            {\n
                        Offset (0x10), \n
                LCTL,   16\n
            }\n
OperationRegion (GPIO, SystemIO, \GBAS,0x60)\n
Field (GPIO, ByteAcc, Lock, Preserve)\n
            {\n
                        Offset (0x0C), \n
                LVL0,   32, \n
                        Offset (0x38), \n
                LVL1,   32, \n
                        Offset (0x48), \n
                LVL2,   32\n
            }\n
Method (_OFF, 0, Serialized)\n
        {\n
            Store (LCTL, ELCT)\n
            Store (SVID, HVID)\n
            Store (SDID, HDID)\n
            Store (One, LNKD)\n
            Store (Zero, AFE4)\n
            Store (One, AFE5)\n
            SGPO (HLRS, Zero)\n
            SGPO (PWEN, Zero)\n
            Notify (\_SB.PCI0.PEGP, Zero)\n
            Return (Zero)\n
        }\n
Method (SGPO, 2, Serialized)\n
        {\n
            And (Arg0, 0x7F, Arg0)\n
            If (LEqual (Arg1, Zero))\n
            {\n
                Store (Zero, Local3)\n
            }\n
            Else\n
            {\n
                Store (One, Local3)\n
            }\n
            If (LLess (Arg0, 0x20))\n
            {\n
                ShiftLeft (Local3, Arg0, Local0)\n
                ShiftLeft (One, Arg0, Local1)\n
                And (\_SB.PCI0.PEGP.DGFX.LVL0, Not (Local1), Local2)\n
                Or (Local2, Local0, \_SB.PCI0.PEGP.DGFX.LVL0)\n
            }\n
            Else\n
            {\n
                If (LLess (Arg0, 0x40))\n
                {\n
                    ShiftLeft (Local3, Subtract (Arg0, 0x20), Local0)\n
                    ShiftLeft (One, Subtract (Arg0, 0x20), Local1)\n
                    And (\_SB.PCI0.PEGP.DGFX.LVL1, Not (Local1), Local2)\n
                    Or (Local2, Local0, \_SB.PCI0.PEGP.DGFX.LVL1)\n
                }\n
                Else\n
                {\n
                    ShiftLeft (Local3, Subtract (Arg0, 0x40), Local0)\n
                    ShiftLeft (One, Subtract (Arg0, 0x40), Local1)\n
                    And (\_SB.PCI0.PEGP.DGFX.LVL2, Not (Local1), Local2)\n
                    Or (Local2, Local0, \_SB.PCI0.PEGP.DGFX.LVL2)\n
                }\n
            }\n
            Return (One)\n
        }\n
end;

into method label _INI parent_label _SB code_regex . insert
begin
\_SB_.PCI0.PEGP.DGFX._OFF()\n
end;
Click to expand...

Cool it worked! No ATI card in System Information!
 
RehabMan said:
I just did it here and it worked fine. You must be doing something wrong. Why 'SSDT-1.aml' (previously patched?) when the actual file is 'SSDT-5.aml'. Try with the actual files you just posted.

- - - Updated - - -



Post ioreg: http://www.tonymacx86.com/audio/58368-guide-how-make-copy-ioreg.html
Click to expand...

He patched it successfully now:
http://www.tonymacx86.com/hp-probook-mavericks/118047-help-disable-hd-7650m-dsdt-6.html#post721792

- - - Updated - - -

roswell said:
Cool it worked! No ATI card in System Information!
Click to expand...

The problem is that the patch only works with your system (and maybe other 4540s + 7650 + same BIOS).
 
nguyenmac said:
The problem is that the patch only works with your system (and maybe other 4540s + 7650 + same BIOS).
Click to expand...

Hmm, I remember when I used to have Dell 1510, I used a generic DSDT patch for my Nvidia to turn it off. I took it from insanelymac forum. I'm sure we can come up with a generic way.

Btw CPU temperatures are dropped 5-7c which was the main reason I wanted it off. Feeling a smoothness in overall performance as well.
 
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