/*
* Intel ACPI Component Architecture
* AML Disassembler version 20131218-64 [Jan 8 2014]
* Copyright (c) 2000 - 2013 Intel Corporation
*
* Disassembly of iASLthK0zD.aml, Mon Apr 7 14:33:23 2014
*
* Original Table Header:
* Signature "SSDT"
* Length 0x000008C1 (2241)
* Revision 0x01
* Checksum 0x60
* OEM ID "APPLE "
* OEM Table ID "CpuPm"
* OEM Revision 0x00013000 (77824)
* Compiler ID "INTL"
* Compiler Version 0x20130117 (538116375)
*/
DefinitionBlock ("iASLthK0zD.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013000)
{
External (_PR_.CPU0, DeviceObj)
External (_PR_.CPU1, DeviceObj)
External (_PR_.CPU2, DeviceObj)
External (_PR_.CPU3, DeviceObj)
External (_PR_.CPU4, DeviceObj)
External (_PR_.CPU5, DeviceObj)
External (_PR_.CPU6, DeviceObj)
External (_PR_.CPU7, DeviceObj)
Scope (\_PR.CPU0)
{
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
Store ("ssdtPRGen version....: 13.0 / Mac OS X 10.9.2 (13C64)", Debug)
Store ("target processor.....: i7-4770K", Debug)
Store ("running processor....: Intel(R) Core(TM) i7-4770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency........: 800", Debug)
Store ("frequency............: 3500", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 84", Debug)
Store ("packageLength........: 35", Debug)
Store ("turboStates..........: 7", Debug)
Store ("maxTurboFrequency....: 4200", Debug)
Store ("machdep.xcpm.mode....: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x07)
Name (APSS, Package (0x23)
{
Package (0x06)
{
0x1068,
0x00014820,
0x0A,
0x0A,
0x2A00,
0x2A00
},
Package (0x06)
{
0x1004,
0x00014820,
0x0A,
0x0A,
0x2900,
0x2900
},
Package (0x06)
{
0x0FA0,
0x00014820,
0x0A,
0x0A,
0x2800,
0x2800
},
Package (0x06)
{
0x0F3C,
0x00014820,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00014820,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00014820,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00014820,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00014820,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x00013B23,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x00012E62,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000121DB,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0x00011590,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0x0001097E,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xFDA7,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xF208,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xE6A2,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xDB75,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xD07F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xC5C0,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xBB39,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xB0E7,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0xA6CC,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x9CE6,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x9335,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x89B9,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x8071,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x775C,
0x0A,
0x0A,
0x1000,
0x1000
},
Package (0x06)
{
0x05DC,
0x6E7A,
0x0A,
0x0A,
0x0F00,
0x0F00
},
Package (0x06)
{
0x0578,
0x65CC,
0x0A,
0x0A,
0x0E00,
0x0E00
},
Package (0x06)
{
0x0514,
0x5D4F,
0x0A,
0x0A,
0x0D00,
0x0D00
},
Package (0x06)
{
0x04B0,
0x5504,
0x0A,
0x0A,
0x0C00,
0x0C00
},
Package (0x06)
{
0x044C,
0x4CEA,
0x0A,
0x0A,
0x0B00,
0x0B00
},
Package (0x06)
{
0x03E8,
0x4501,
0x0A,
0x0A,
0x0A00,
0x0A00
},
Package (0x06)
{
0x0384,
0x3D49,
0x0A,
0x0A,
0x0900,
0x0900
},
Package (0x06)
{
0x0320,
0x35C0,
0x0A,
0x0A,
0x0800,
0x0800
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 29", Debug)
Return (Package (0x06)
{
One,
0x04,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x07,
0xF5,
0xC8
}
})
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (\_PR.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU2.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU3.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU4.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU5.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU6.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (\_PR.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU7.APSS Called", Debug)
Return (\_PR.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
}
