[Guide] HP ProBook/EliteBook/Zbook using Clover UEFI hotpatch (10.11)

[VioletDragon]

I think the regional (legal) differences result in different channels being available/unavailable.

I guess these government blokes don't realize that wireless networking is primarily used on mobile devices that regularly travel around the world with their owners... so, of course, they must regulate the airwaves, because clearly only devices licensed in that country could possibly be used there! (maybe it is not as ridiculous as it seems, but...)

I see. I seem to get AC also with this card it seems to work fine anyway but the router I'm using isn't from my ISP it's a 3rd Party Router so that could be why. I'm not too worried anyway it works cheers.

 

[gi10]

Yup... this looks good.

It is a bit of a strange thing running a Sandy SMBIOS on Ivy hardware, but in this case (assuming no other solutions come along), it might be reasonable.

One thing interesting is that you're getting idle states only to x9 (idle should be at x8), but maybe you have background tasks keeping the system from getting to x8.

Honestly, it's strange that it works with SmBios 8.1. I notice in what you say of x8 or x9 but I see a minor failure since there are not many alternatives.


Now the idea that comes to mind ... I know it is specular but seeing that Apple removed devices supported in this version 10.12, I do not know why but I think they will do it in 10.13 (eliminate 8.1 support) and I wont have alternatives. A posibility is go to back the -xcpm command but as you said it was used for testing by apple.


Thank you for all of your help.!


UPDATE:

Geekbench 4 >>>>>>>>>>>. https://browser.geekbench.com/v4/cpu/2991603
Solution found for Smbios 9.2.

At the beginning of the clover in the log look something that would put 0x700 (using SSDT generated by ssdtPRGen beta unmodified by myself). Think if the kp is caused by the 0x700 on the SSDT. I erase it and test it, without success then I add twice the 0x800 test and surprise worked!

SSDT generated by ssdtPRGen beta using ./ssdtPRGen.sh command

/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20161210-64(RM)
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASL8yKhjT.aml, Thu Jun  1 04:59:28 2017
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x0000074C (1868)
*     Revision         0x01
*     Checksum         0xB1
*     OEM ID           "APPLE "
*     OEM Table ID     "CpuPm"
*     OEM Revision     0x00021500 (136448)
*     Compiler ID      "INTL"
*     Compiler Version 0x20161210 (538317328)
*/
DefinitionBlock ("", "SSDT", 1, "APPLE ", "CpuPm", 0x00021500)
{
    External (_PR_.CPU0, DeviceObj)    // (from opcode)
    External (_PR_.CPU1, DeviceObj)    // (from opcode)
    External (_PR_.CPU2, DeviceObj)    // (from opcode)
    External (_PR_.CPU3, DeviceObj)    // (from opcode)

    Scope (\_PR.CPU0)
    {
        Method (_INI, 0, NotSerialized)  // _INI: Initialize
        {
            Store ("ssdtPRGen version.....: 21.5 / Mac OS X 10.12.5 (16F73)", Debug)
            Store ("custom mode...........: 0", Debug)
            Store ("host processor........: Intel(R) Core(TM) i7-3667U CPU @ 2.00GHz", Debug)
            Store ("target processor......: i7-3667U", Debug)
            Store ("number of processors..: 1", Debug)
            Store ("baseFrequency.........: 800", Debug)
            Store ("frequency.............: 2000", Debug)
            Store ("busFrequency..........: 100", Debug)
            Store ("logicalCPUs...........: 4", Debug)
            Store ("maximum TDP...........: 17", Debug)
            Store ("packageLength.........: 25", Debug)
            Store ("turboStates...........: 12", Debug)
            Store ("maxTurboFrequency.....: 3200", Debug)
            Store ("CPU Workarounds.......: 3", Debug)
            Store ("machdep.xcpm.mode.....: 0", Debug)
        }

        Name (APLF, One)
        Name (APSN, 0x0D)
        Name (APSS, Package (0x1B)
        {
            Package (0x06)
            {
                0x0C81,
                0x4268,
                0x0A,
                0x0A,
                0x2100,
                0x2100
            },

            Package (0x06)
            {
                0x0C80,
                0x4268,
                0x0A,
                0x0A,
                0x2000,
                0x2000
            },

            Package (0x06)
            {
                0x0C1C,
                0x4268,
                0x0A,
                0x0A,
                0x1F00,
                0x1F00
            },

            Package (0x06)
            {
                0x0BB8,
                0x4268,
                0x0A,
                0x0A,
                0x1E00,
                0x1E00
            },

            Package (0x06)
            {
                0x0B54,
                0x4268,
                0x0A,
                0x0A,
                0x1D00,
                0x1D00
            },

            Package (0x06)
            {
                0x0AF0,
                0x4268,
                0x0A,
                0x0A,
                0x1C00,
                0x1C00
            },

            Package (0x06)
            {
                0x0A8C,
                0x4268,
                0x0A,
                0x0A,
                0x1B00,
                0x1B00
            },

            Package (0x06)
            {
                0x0A28,
                0x4268,
                0x0A,
                0x0A,
                0x1A00,
                0x1A00
            },

            Package (0x06)
            {
                0x09C4,
                0x4268,
                0x0A,
                0x0A,
                0x1900,
                0x1900
            },

            Package (0x06)
            {
                0x0960,
                0x4268,
                0x0A,
                0x0A,
                0x1800,
                0x1800
            },

            Package (0x06)
            {
                0x08FC,
                0x4268,
                0x0A,
                0x0A,
                0x1700,
                0x1700
            },

            Package (0x06)
            {
                0x0898,
                0x4268,
                0x0A,
                0x0A,
                0x1600,
                0x1600
            },

            Package (0x06)
            {
                0x0834,
                0x4268,
                0x0A,
                0x0A,
                0x1500,
                0x1500
            },

            Package (0x06)
            {
                0x07D0,
                0x4268,
                0x0A,
                0x0A,
                0x1400,
                0x1400
            },

            Package (0x06)
            {
                0x076C,
                0x3E5E,
                0x0A,
                0x0A,
                0x1300,
                0x1300
            },

            Package (0x06)
            {
                0x0708,
                0x3A6A,
                0x0A,
                0x0A,
                0x1200,
                0x1200
            },

            Package (0x06)
            {
                0x06A4,
                0x3689,
                0x0A,
                0x0A,
                0x1100,
                0x1100
            },

            Package (0x06)
            {
                0x0640,
                0x32BC,
                0x0A,
                0x0A,
                0x1000,
                0x1000
            },

            Package (0x06)
            {
                0x05DC,
                0x2F03,
                0x0A,
                0x0A,
                0x0F00,
                0x0F00
            },

            Package (0x06)
            {
                0x0578,
                0x2B5E,
                0x0A,
                0x0A,
                0x0E00,
                0x0E00
            },

            Package (0x06)
            {
                0x0514,
                0x27CC,
                0x0A,
                0x0A,
                0x0D00,
                0x0D00
            },

            Package (0x06)
            {
                0x04B0,
                0x244D,
                0x0A,
                0x0A,
                0x0C00,
                0x0C00
            },

            Package (0x06)
            {
                0x044C,
                0x20E2,
                0x0A,
                0x0A,
                0x0B00,
                0x0B00
            },

            Package (0x06)
            {
                0x03E8,
                0x1D89,
                0x0A,
                0x0A,
                0x0A00,
                0x0A00
            },

            Package (0x06)
            {
                0x0384,
                0x1A43,
                0x0A,
                0x0A,
                0x0900,
                0x0900
            },

            Package (0x06)
            {
                0x0320,
                0x1710,
                0x0A,
                0x0A,
                0x0800,
                0x0800
            },

            Package (0x06)
            {
                0x02BC,
                Zero,
                0x0A,
                0x0A,
                0x0700,
                0x0700
            }
        })
        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU0.ACST Called", Debug)
            Store ("CPU0 C-States    : 29", Debug)
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    Zero,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xCD,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x06,
                    0xF5,
                    0x015E
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store ("Method _PR_.CPU0._DSM Called", Debug)
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03                                        
                })
            }

            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }

    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.ACST Called", Debug)
            Store ("CPU1 C-States    : 7", Debug)
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    0x03E8,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x02,
                    0x94,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xC6,
                    0xC8
                }
            })
        }
    }

    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU2.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }

    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU3.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }
}

Modified and working

/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20161210-64(RM)
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASL8yKhjT.aml, Thu Jun  1 04:59:28 2017
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x0000074C (1868)
*     Revision         0x01
*     Checksum         0xB1
*     OEM ID           "APPLE "
*     OEM Table ID     "CpuPm"
*     OEM Revision     0x00021500 (136448)
*     Compiler ID      "INTL"
*     Compiler Version 0x20161210 (538317328)
*/
DefinitionBlock ("", "SSDT", 1, "APPLE ", "CpuPm", 0x00021500)
{
    External (_PR_.CPU0, DeviceObj)    // (from opcode)
    External (_PR_.CPU1, DeviceObj)    // (from opcode)
    External (_PR_.CPU2, DeviceObj)    // (from opcode)
    External (_PR_.CPU3, DeviceObj)    // (from opcode)

    Scope (\_PR.CPU0)
    {
        Method (_INI, 0, NotSerialized)  // _INI: Initialize
        {
            Store ("ssdtPRGen version.....: 21.5 / Mac OS X 10.12.5 (16F73)", Debug)
            Store ("custom mode...........: 0", Debug)
            Store ("host processor........: Intel(R) Core(TM) i7-3667U CPU @ 2.00GHz", Debug)
            Store ("target processor......: i7-3667U", Debug)
            Store ("number of processors..: 1", Debug)
            Store ("baseFrequency.........: 800", Debug)
            Store ("frequency.............: 2000", Debug)
            Store ("busFrequency..........: 100", Debug)
            Store ("logicalCPUs...........: 4", Debug)
            Store ("maximum TDP...........: 17", Debug)
            Store ("packageLength.........: 25", Debug)
            Store ("turboStates...........: 12", Debug)
            Store ("maxTurboFrequency.....: 3200", Debug)
            Store ("CPU Workarounds.......: 3", Debug)
            Store ("machdep.xcpm.mode.....: 0", Debug)
        }

        Name (APLF, One)
        Name (APSN, 0x0D)
        Name (APSS, Package (0x1B)
        {
            Package (0x06)
            {
                0x0C81,
                0x4268,
                0x0A,
                0x0A,
                0x2100,
                0x2100
            },

            Package (0x06)
            {
                0x0C80,
                0x4268,
                0x0A,
                0x0A,
                0x2000,
                0x2000
            },

            Package (0x06)
            {
                0x0C1C,
                0x4268,
                0x0A,
                0x0A,
                0x1F00,
                0x1F00
            },

            Package (0x06)
            {
                0x0BB8,
                0x4268,
                0x0A,
                0x0A,
                0x1E00,
                0x1E00
            },

            Package (0x06)
            {
                0x0B54,
                0x4268,
                0x0A,
                0x0A,
                0x1D00,
                0x1D00
            },

            Package (0x06)
            {
                0x0AF0,
                0x4268,
                0x0A,
                0x0A,
                0x1C00,
                0x1C00
            },

            Package (0x06)
            {
                0x0A8C,
                0x4268,
                0x0A,
                0x0A,
                0x1B00,
                0x1B00
            },

            Package (0x06)
            {
                0x0A28,
                0x4268,
                0x0A,
                0x0A,
                0x1A00,
                0x1A00
            },

            Package (0x06)
            {
                0x09C4,
                0x4268,
                0x0A,
                0x0A,
                0x1900,
                0x1900
            },

            Package (0x06)
            {
                0x0960,
                0x4268,
                0x0A,
                0x0A,
                0x1800,
                0x1800
            },

            Package (0x06)
            {
                0x08FC,
                0x4268,
                0x0A,
                0x0A,
                0x1700,
                0x1700
            },

            Package (0x06)
            {
                0x0898,
                0x4268,
                0x0A,
                0x0A,
                0x1600,
                0x1600
            },

            Package (0x06)
            {
                0x0834,
                0x4268,
                0x0A,
                0x0A,
                0x1500,
                0x1500
            },

            Package (0x06)
            {
                0x07D0,
                0x4268,
                0x0A,
                0x0A,
                0x1400,
                0x1400
            },

            Package (0x06)
            {
                0x076C,
                0x3E5E,
                0x0A,
                0x0A,
                0x1300,
                0x1300
            },

            Package (0x06)
            {
                0x0708,
                0x3A6A,
                0x0A,
                0x0A,
                0x1200,
                0x1200
            },

            Package (0x06)
            {
                0x06A4,
                0x3689,
                0x0A,
                0x0A,
                0x1100,
                0x1100
            },

            Package (0x06)
            {
                0x0640,
                0x32BC,
                0x0A,
                0x0A,
                0x1000,
                0x1000
            },

            Package (0x06)
            {
                0x05DC,
                0x2F03,
                0x0A,
                0x0A,
                0x0F00,
                0x0F00
            },

            Package (0x06)
            {
                0x0578,
                0x2B5E,
                0x0A,
                0x0A,
                0x0E00,
                0x0E00
            },

            Package (0x06)
            {
                0x0514,
                0x27CC,
                0x0A,
                0x0A,
                0x0D00,
                0x0D00
            },

            Package (0x06)
            {
                0x04B0,
                0x244D,
                0x0A,
                0x0A,
                0x0C00,
                0x0C00
            },

            Package (0x06)
            {
                0x044C,
                0x20E2,
                0x0A,
                0x0A,
                0x0B00,
                0x0B00
            },

            Package (0x06)
            {
                0x03E8,
                0x1D89,
                0x0A,
                0x0A,
                0x0A00,
                0x0A00
            },

            Package (0x06)
            {
                0x0384,
                0x1A43,
                0x0A,
                0x0A,
                0x0900,
                0x0900
            },

            Package (0x06)
            {
                0x0320,
                0x1710,
                0x0A,
                0x0A,
                0x0800,
                0x0800
            },

            Package (0x06)
            {
                0x02BC,
                Zero,
                0x0A,
                0x0A,
                0x0800,
                0x0800
            }
        })
        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU0.ACST Called", Debug)
            Store ("CPU0 C-States    : 29", Debug)
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    Zero,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xCD,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x06,
                    0xF5,
                    0x015E
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store ("Method _PR_.CPU0._DSM Called", Debug)
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03                                         
                })
            }

            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }

    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.ACST Called", Debug)
            Store ("CPU1 C-States    : 7", Debug)
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    0x03E8,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x02,
                    0x94,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xC6,
                    0xC8
                }
            })
        }
    }

    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU2.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }

    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU3.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }
}

Results intel apple info. Strange x9...

AppleIntelInfo.kext v1.2 Copyright © 2012-2015 Pike R. Alpha. All rights reserved

Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 1
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0x3155b59d0a
MWAIT C-States.....................: 135456

Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35)  : 0x20004
MSR_PLATFORM_INFO..........(0xCE)  : 0x80815F0011900
MSR_PMG_CST_CONFIG_CONTROL.(0xE2)  : 0x1E008404
MSR_PMG_IO_CAPTURE_BASE....(0xE4)  : 0x20414
IA32_MPERF.................(0xE7)  : 0xCFB148DE7
IA32_APERF.................(0xE8)  : 0xCC51EEFAF
MSR_FLEX_RATIO.............(0x194) : 0x180000
MSR_IA32_PERF_STATUS.......(0x198) : 0x1ABD00000900
MSR_IA32_PERF_CONTROL......(0x199) : 0x2019
IA32_CLOCK_MODULATION......(0x19A) : 0x0
IA32_THERM_STATUS..........(0x19C) : 0x883A0000
IA32_MISC_ENABLES..........(0x1A0) : 0x850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400001
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x1E1E1E20
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x4
MSR_POWER_CTL..............(0x1FC) : 0x14005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003
MSR_PKG_POWER_LIMIT........(0x610) : 0x80FA00DC80C8
MSR_PKG_ENERGY_STATUS......(0x611) : 0x1F99288
MSR_PKG_POWER_INFO.........(0x614) : 0x88
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x1814149480000380
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x1460264
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PP1_CURRENT_CONFIG.....(0x602) : 0x1814149480000170
MSR_PP1_POWER_LIMIT........(0x640) : 0x0
MSR_PP1_ENERGY_STATUS......(0x641) : 0x5E2DF
MSR_PP1_POLICY.............(0x642) : 0x10
MSR_CONFIG_TDP_NOMINAL.....(0x648) : 0x14
MSR_CONFIG_TDP_LEVEL1......(0x649) : 0x80070
MSR_CONFIG_TDP_LEVEL2......(0x64a) : 0x1900C8
MSR_CONFIG_TDP_CONTROL.....(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.(0x64c) : 0x0
MSR_PKGC3_IRTL.............(0x60a) : 0x883B
MSR_PKGC6_IRTL.............(0x60b) : 0x8850
MSR_PKGC7_IRTL.............(0x60c) : 0x8857
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x128F9F99C
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0xE1C9AF4
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0xD666F24D
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x116C41E853
IA32_TSC_DEADLINE..........(0x6E0) : 0x3159ACBF2D
PCH device.................: 0x1E558086

Intel Register Data
------------------------------------
CPU_VGACNTRL...............: 0x6596C63A
IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)
PGETBL_CTL.................: 0x539b31cb
INSTDONE_I965..............: 0x5f635e6c
INSTDONE_1.................: 0x1e1661a8
CPU_VGACNTRL...............: 0x6596c63a (enabled)
DIGITAL_PORT_HOTPLUG_CNTRL.: 0xffd0a649
RR_HW_CTL..................: 0x00ff4669 (low 105, high 70)
FDI_PLL_BIOS_0.............: 0xe8149479
FDI_PLL_BIOS_1.............: 0xc5cf8a88
FDI_PLL_BIOS_2.............: 0x5aa2abc5
DISPLAY_PORT_PLL_BIOS_0....: 0x926e69d9
DISPLAY_PORT_PLL_BIOS_1....: 0xf745d643
DISPLAY_PORT_PLL_BIOS_2....: 0xf84fdfc6
FDI_PLL_FREQ_CTL...........: 0x12e1019a
PIPEACONF..................: 0x2852bf0b (disabled, inactive, rsvd, rotate 180, 8bpc)
HTOTAL_A...................: 0x05f61937 (6456 active, 1527 total)
HBLANK_A...................: 0x7d2da376 (41847 start, 32046 end)
HSYNC_A....................: 0x502fd9f0 (55793 start, 20528 end)
VTOTAL_A...................: 0xeed68c9e (35999 active, 61143 total)
VBLANK_A...................: 0x330542ab (17068 start, 13062 end)
VSYNC_A....................: 0xb80379b1 (31154 start, 47108 end)
VSYNCSHIFT_A...............: 0x8784ba42
PIPEASRC...................: 0x68c8c064 (26825, 49253)
PIPEA_DATA_M1..............: 0x12d67bb6 (TU 10, val 0xd67bb6 14056374)
PIPEA_DATA_N1..............: 0xd551e4f2 (val 0x51e4f2 5367026)
PIPEA_DATA_M2..............: 0xd52846cc (TU 107, val 0x2846cc 2639564)
PIPEA_DATA_N2..............: 0x6c44445d (val 0x44445d 4473949)
PIPEA_LINK_M1..............: 0x82a2721a (val 0xa2721a 10646042)
PIPEA_LINK_N1..............: 0x149662a0 (val 0x9662a0 9855648)
PIPEA_LINK_M2..............: 0xb2aee0ab (val 0xaee0ab 11460779)
PIPEA_LINK_N2..............: 0xdc89ab9e (val 0x89ab9e 9022366)
DSPACNTR...................: 0xdf81a6b9 (enabled)
DSPABASE...................: 0x5f75bb5c
DSPASTRIDE.................: 0xdf646e72 (58560953)
DSPASURF...................: 0x09a2cc19
DSPATILEOFF................: 0xb081bbd4 (48084, 45185)
PIPEBCONF..................: 0xe9a4d29d (enabled, active, pf-id-dbl, rotate 270, invalid bpc)
HTOTAL_B...................: 0xee343677 (13944 active, 60981 total)
HBLANK_B...................: 0xdc59679e (26527 start, 56410 end)
HSYNC_B....................: 0x90ff8bed (35822 start, 37120 end)
VTOTAL_B...................: 0x2fc26138 (24889 active, 12227 total)
VBLANK_B...................: 0x124ab5e7 (46568 start, 4683 end)
VSYNC_B....................: 0xd28b986a (39019 start, 53900 end)
VSYNCSHIFT_B...............: 0xee62e5c9
PIPEBSRC...................: 0x441e8790 (17439, 34705)
PIPEB_DATA_M1..............: 0x4477e1e6 (TU 35, val 0x77e1e6 7856614)
PIPEB_DATA_N1..............: 0x1b151ebf (val 0x151ebf 1384127)
PIPEB_DATA_M2..............: 0xbd6552b0 (TU 95, val 0x6552b0 6640304)
PIPEB_DATA_N2..............: 0xf683a37f (val 0x83a37f 8627071)
PIPEB_LINK_M1..............: 0x9433216a (val 0x33216a 3350890)
PIPEB_LINK_N1..............: 0x3cf60221 (val 0xf60221 16122401)
PIPEB_LINK_M2..............: 0x65f13c8c (val 0xf13c8c 15809676)
PIPEB_LINK_N2..............: 0x7bbd8879 (val 0xbd8879 12421241)
DSPBCNTR...................: 0x7861839e (disabled)
DSPBBASE...................: 0xb6aef2f6
DSPBSTRIDE.................: 0x05aac759 (1485597)
DSPBSURF...................: 0x4033cbb1
DSPBTILEOFF................: 0x7bb04dd1 (19921, 31664)
PIPECCONF..................: 0x08eaf86b (disabled, inactive, rsvd, rotate 270, 12bpc)
HTOTAL_C...................: 0xd3b7a430 (42033 active, 54200 total)
HBLANK_C...................: 0x1490811f (33056 start, 5265 end)
HSYNC_C....................: 0x90b199a8 (39337 start, 37042 end)
VTOTAL_C...................: 0x9ea0e8b1 (59570 active, 40609 total)
VBLANK_C...................: 0x58f9eef6 (61175 start, 22778 end)
VSYNC_C....................: 0x83f1ad22 (44323 start, 33778 end)
VSYNCSHIFT_C...............: 0xb70884c9
PIPECSRC...................: 0xfd3e87c0 (64831, 34753)
PIPEC_DATA_M1..............: 0x64f7e030 (TU 51, val 0xf7e030 16244784)
PIPEC_DATA_N1..............: 0x39617b77 (val 0x617b77 6388599)
PIPEC_DATA_M2..............: 0x5f76bf73 (TU 48, val 0x76bf73 7782259)
PIPEC_DATA_N2..............: 0x6bc1e3a4 (val 0xc1e3a4 12706724)
PIPEC_LINK_M1..............: 0x7e32d00d (val 0x32d00d 3330061)
PIPEC_LINK_N1..............: 0x165ee651 (val 0x5ee651 6219345)
PIPEC_LINK_M2..............: 0x6de0c989 (val 0xe0c989 14731657)
PIPEC_LINK_N2..............: 0x2feed8f0 (val 0xeed8f0 15653104)
DSPCCNTR...................: 0x1d68b596 (disabled)
DSPCBASE...................: 0xb722d27c
DSPCSTRIDE.................: 0x00230d0d (35892)
DSPCSURF...................: 0x7054db99
DSPCTILEOFF................: 0x72b74190 (16784, 29367)
PFA_CTL_1..................: 0xe28b073a (enable, auto_scale no, auto_scale_cal yes, v_filter enable, vadapt disable, mode moderate, filter_sel hardcoded,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFA_CTL_2..................: 0x972a256a (vscale f)
PFA_CTL_3..................: 0x9d4e12ea (vscale initial phase f)
PFA_CTL_4..................: 0x0ac19ff7 (hscale f)
PFA_WIN_POS................: 0x0b783b40 (2936, 2880)
PFA_WIN_SIZE...............: 0x3de3e892 (7651, 2194)
PFB_CTL_1..................: 0x831b4f09 (enable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode moderate, filter_sel edge_enhance,chroma pre-filter disable, vert3tap auto, v_inter_invert field 0)
PFB_CTL_2..................: 0x4d782569 (vscale f)
PFB_CTL_3..................: 0x9dc202ec (vscale initial phase f)
PFB_CTL_4..................: 0x07e04b9f (hscale f)
PFB_WIN_POS................: 0x8e3aaea0 (3642, 3744)
PFB_WIN_SIZE...............: 0x9fc32890 (8131, 2192)
PFC_CTL_1..................: 0x404a5ffc (disable, auto_scale no, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter enable, vert3tap auto, v_inter_invert field 1)
PFC_CTL_2..................: 0xefd275a3 (vscale f)
PFC_CTL_3..................: 0x0641efa9 (vscale initial phase f)
PFC_CTL_4..................: 0xbb059017 (hscale f)
PFC_WIN_POS................: 0xea1ff822 (2591, 2082)
PFC_WIN_SIZE...............: 0x1a521b9a (6738, 2970)
PCH_DREF_CONTROL...........: 0x9b09d9ec (cpu source downspread, ssc_source enable, nonspread_source disable, superspread_source enable, ssc4_mode centerspread, ssc1 disable, ssc4 disable)
PCH_RAWCLK_FREQ............: 0xe6c8989b (FDL_TP1 timer 1.0us, FDL_TP2 timer 6.0us, freq 155)
PCH_DPLL_TMR_CFG...........: 0x0a662bdd
PCH_SSC4_PARMS.............: 0x6f0d7643
PCH_SSC4_AUX_PARMS.........: 0xf93f87a7
PCH_DPLL_SEL...............: 0x916c5bb7 (TransA DPLL disable (DPLL ), TransB DPLL enable (DPLL B))
PCH_DPLL_ANALOG_CTL........: 0x22939b9c
PCH_DPLL_A.................: 0x805935a3 (enable, sdvo high speed no, mode , p2 , FPA0 P1 1, FPA1 P1 1, refclk SuperSSC 120Mhz, sdvo/hdmi mul 3)
PCH_DPLL_B.................: 0x93476789 (enable, sdvo high speed no, mode , p2 , FPA0 P1 1, FPA1 P1 1, refclk SSC, sdvo/hdmi mul 4)
PCH_FPA0...................: 0x2e3d4106 (n = 61, m1 = 1, m2 = 6)
PCH_FPA1...................: 0x65c42eda (n = 4, m1 = 46, m2 = 26)
PCH_FPB0...................: 0x35889880 (n = 8, m1 = 24, m2 = 0)
PCH_FPB1...................: 0xd8ce125c (n = 14, m1 = 18, m2 = 28)
TRANS_HTOTAL_A.............: 0xe28b073a (1851 active, 57996 total)
TRANS_HBLANK_A.............: 0x972a2568 (9577 start, 38699 end)
TRANS_HSYNC_A..............: 0x9dce12e8 (4841 start, 40399 end)
TRANS_VTOTAL_A.............: 0x86d322ab (8876 active, 34516 total)
TRANS_VBLANK_A.............: 0x0ac19ef7 (40696 start, 2754 end)
TRANS_VSYNC_A..............: 0xab244f20 (20257 start, 43813 end)
TRANS_VSYNCSHIFT_A.........: 0xf1a4fd5d
TRANSA_DATA_M1.............: 0x610edfe2 (TU 49, val 0xedfe2 974818)
TRANSA_DATA_N1.............: 0xff4f1da2 (val 0x4f1da2 5184930)
TRANSA_DATA_M2.............: 0x60e8e13d (TU 49, val 0xe8e13d 15262013)
TRANSA_DATA_N2.............: 0x78f0d752 (val 0xf0d752 15783762)
TRANSA_DP_LINK_M1..........: 0x91971a53 (val 0x971a53 9902675)
TRANSA_DP_LINK_N1..........: 0xf9b9e4e3 (val 0xb9e4e3 12182755)
TRANSA_DP_LINK_M2..........: 0x6c4ef242 (val 0x4ef242 5173826)
TRANSA_DP_LINK_N2..........: 0xb8cfd211 (val 0xcfd211 13619729)
TRANS_HTOTAL_B.............: 0x404a5ffc (24573 active, 16459 total)
TRANS_HBLANK_B.............: 0xefd255a1 (21922 start, 61395 end)
TRANS_HSYNC_B..............: 0x06417fa9 (32682 start, 1602 end)
TRANS_VTOTAL_B.............: 0xf84c028b (652 active, 63565 total)
TRANS_VBLANK_B.............: 0xb9059817 (38936 start, 47366 end)
TRANS_VSYNC_B..............: 0x0b4b3f4f (16208 start, 2892 end)
TRANS_VSYNCSHIFT_B.........: 0xd7ae0ed8
TRANSB_DATA_M1.............: 0x3d2eb170 (TU 31, val 0x2eb170 3060080)
TRANSB_DATA_N1.............: 0x14bf2268 (val 0xbf2268 12526184)
TRANSB_DATA_M2.............: 0x3e5e8491 (TU 32, val 0x5e8491 6194321)
TRANSB_DATA_N2.............: 0x5a71b7b7 (val 0x71b7b7 7452599)
TRANSB_DP_LINK_M1..........: 0xc647445e (val 0x47445e 4670558)
TRANSB_DP_LINK_N1..........: 0xe439f609 (val 0x39f609 3798537)
TRANSB_DP_LINK_M2..........: 0x860015cc (val 0x15cc 5580)
TRANSB_DP_LINK_N2..........: 0x38e8f245 (val 0xe8f245 15266373)
TRANS_HTOTAL_C.............: 0x50c899a8 (39337 active, 20681 total)
TRANS_HBLANK_C.............: 0xb75c3334 (13109 start, 46941 end)
TRANS_HSYNC_C..............: 0x970095ce (38351 start, 38657 end)
TRANS_VTOTAL_C.............: 0x20a8268c (9869 active, 8361 total)
TRANS_VBLANK_C.............: 0xdd840bd5 (3030 start, 56709 end)
TRANS_VSYNC_C..............: 0x32503b4f (15184 start, 12881 end)
TRANS_VSYNCSHIFT_C.........: 0xdff6566a
TRANSC_DATA_M1.............: 0x1b8e4522 (TU 14, val 0x8e4522 9323810)
TRANSC_DATA_N1.............: 0x72722869 (val 0x722869 7481449)
TRANSC_DATA_M2.............: 0x3c36ba33 (TU 31, val 0x36ba33 3586611)
TRANSC_DATA_N2.............: 0x7b713d96 (val 0x713d96 7421334)
TRANSC_DP_LINK_M1..........: 0xe3667996 (val 0x667996 6715798)
TRANSC_DP_LINK_N1..........: 0xc64ca02e (val 0x4ca02e 5021742)
TRANSC_DP_LINK_M2..........: 0xb7702d3f (val 0x702d3f 7351615)
TRANSC_DP_LINK_N2..........: 0xd4a8e60d (val 0xa8e60d 11068941)
TRANSACONF.................: 0x2c56d0c0 (disable, inactive, rsvd)
TRANSBCONF.................: 0x3cd3b59e (disable, inactive, rsvd)
TRANSCCONF.................: 0xa518b5fe (enable, inactive, progressive)
FDI_TXA_CTL................: 0xda4cd226 (enable, train pattern pattern_2, voltage swing ,pre-emphasis , port width X2, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
FDI_TXB_CTL................: 0x3c3ba1e7 (disable, train pattern not train, voltage swing ,pre-emphasis , port width , enhanced framing disable, FDI PLL disable, scrambing disable, master mode enable)
FDI_TXC_CTL................: 0xbc1e110d (enable, train pattern not train, voltage swing ,pre-emphasis , port width X4, enhanced framing enable, FDI PLL disable, scrambing enable, master mode enable)
FDI_RXA_CTL................: 0xf8bf8229 (enable, train pattern pattern_idle, port width , ,link_reverse_strap_overwrite yes, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report enable, FE err report disable,scrambing enable,FDI_RXB_CTL................: 0x5a00e405 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite yes, dmi_link_reverse yes, FDI PLL enable,FS ecc disable, FE ecc enable, FS err report disable, FE err report disable,scrambing enaFDI_RXC_CTL................: 0x5da0fa45 (disable, train pattern pattern_idle, port width , 8bpc,link_reverse_strap_overwrite yes, dmi_link_reverse yes, FDI PLL enable,FS ecc enable, FE ecc disable, FS err report enable, FE err report disable,scrambing enaDPAFE_BMFUNC...............: 0xb6141cca
DPAFE_DL_IREFCAL0..........: 0x36ad258d
DPAFE_DL_IREFCAL1..........: 0xa6819c70
DPAFE_DP_IREFCAL...........: 0xe5ea559b
PCH_DSPCLK_GATE_D..........: 0x192e4a79
PCH_DSP_CHICKEN1...........: 0x741b9a5a
PCH_DSP_CHICKEN2...........: 0x98b9749d
PCH_DSP_CHICKEN3...........: 0x181cd3ea
FDI_RXA_MISC...............: 0xacddd5c9 (FDI Delay 5577)
FDI_RXB_MISC...............: 0x7feb90c7 (FDI Delay 4295)
FDI_RXC_MISC...............: 0x70185905 (FDI Delay 6405)
FDI_RXA_TUSIZE1............: 0xee6b6a34
FDI_RXA_TUSIZE2............: 0x6b60d69d
FDI_RXB_TUSIZE1............: 0xe01e8fb2
FDI_RXB_TUSIZE2............: 0x2bfa96bb
FDI_RXC_TUSIZE1............: 0x0e16fdd2
FDI_RXC_TUSIZE2............: 0xada2f4b2
FDI_PLL_CTL_1..............: 0xe709e4dc
FDI_PLL_CTL_2..............: 0x4ecae657
FDI_RXA_IIR................: 0x016f282a
FDI_RXA_IMR................: 0x7c976fea
FDI_RXB_IIR................: 0x0bc638f9
FDI_RXB_IMR................: 0x21da96c6
PCH_ADPA...................: 0xf890ddfd (enabled, transcoder B, +hsync, +vsync)
HDMIB......................: 0x21e818c4 (disabled pipe B 8bpc TMDS DVI audio enabled -vsync -hsync detected)
HDMIC......................: 0xa9bfc173 (enabled pipe B  SDVO DVI audio enabled +vsync -hsync non-detected)
HDMID......................: 0xdc1a1b6c (enabled pipe C  TMDS HDMI audio enabled -vsync +hsync detected)
PCH_LVDS...................: 0x2d120dfe (disabled, pipe B, 24 bit, 2 channels)
CPU_eDP_A..................: 0x69bd62e4
PCH_DP_B...................: 0x765a4de8
PCH_DP_C...................: 0xfcf7e5b4
PCH_DP_D...................: 0xf63e46f9
TRANS_DP_CTL_A.............: 0xba3ccda2 (enable port C  -vsync -hsync)
TRANS_DP_CTL_B.............: 0x2c3cb63d (disable port C 12bpc +vsync +hsync)
TRANS_DP_CTL_C.............: 0x0eed879e (disable port B 12bpc +vsync +hsync)
BLC_PWM_CPU_CTL2...........: 0x8d515293 (enable 1, pipe A)
BLC_PWM_CPU_CTL............: 0x829c3399 (cycle 13209)
BLC_PWM_PCH_CTL1...........: 0x2ba3ae9c (enable 0, override 0, inverted polarity 1)
BLC_PWM_PCH_CTL2...........: 0x3f0cc3dc (freq 16140, cycle 50140)
PCH_PP_STATUS..............: 0x207cefea (off, not ready, sequencing off)
PCH_PP_CONTROL.............: 0x3408a791 (blacklight disabled, do not power down on reset, panel on)
PCH_PP_ON_DELAYS...........: 0xc874ea25
PCH_PP_OFF_DELAYS..........: 0x052a9217
PCH_PP_DIVISOR.............: 0xd74dd04c
PORT_DBG...................: 0x84d135d4 (HW DRRS )
RC6_RESIDENCY_TIME.........: 0x56010fdf
RC6p_RESIDENCY_TIME........: 0x0ce57a8c
RC6pp_RESIDENCY_TIME.......: 0xe58ba854
IS_GEN6(devid) || IS_GEN7(devid)
FENCE START 0..............: 0x53419ad5
FENCE END 0................: 0xbe3d40ad
FENCE START 1..............: 0x8bb78e7b
FENCE END 1................: 0xd582a10d
FENCE START 2..............: 0xf6253325
FENCE END 2................: 0xc867bed0
FENCE START 3..............: 0xd1a98f04
FENCE END 3................: 0x5eb686f8
FENCE START 4..............: 0xcd41e69d
FENCE END 4................: 0x90048ed0
FENCE START 5..............: 0x34c5ca79
FENCE END 5................: 0xaba86186
FENCE START 6..............: 0x21f42e1f
FENCE END 6................: 0x402ca980
FENCE START 7..............: 0xe6de1f61
FENCE END 7................: 0x7e5b94bb
FENCE START 8..............: 0xda6021cc
FENCE END 8................: 0xd7ea8079
FENCE START 9..............: 0x08e2a09d
FENCE END 9................: 0xaa486b37
FENCE START 10.............: 0x474d6851
FENCE END 10...............: 0xd83fdfb2
FENCE START 11.............: 0xecd75c67
FENCE END 11...............: 0x01191f9b
FENCE START 12.............: 0xec597a07
FENCE END 12...............: 0xa2eb7b03
FENCE START 13.............: 0x8a6dd323
FENCE END 13...............: 0xb6e663da
FENCE START 14.............: 0x9acdf435
FENCE END 14...............: 0x23c0f43b
FENCE START 15.............: 0xfcdce671
FENCE END 15...............: 0x5ba9d969
FENCE START 16.............: 0xaae6e45f
FENCE END 16...............: 0x150d754f
FENCE START 17.............: 0x68861986
FENCE END 17...............: 0xbf572dda
FENCE START 18.............: 0x37edd79f
FENCE END 18...............: 0xf25ee4ff
FENCE START 19.............: 0xc5fa187b
FENCE END 19...............: 0xadd711e8
FENCE START 20.............: 0xba339a30
FENCE END 20...............: 0xfbf1dc36
FENCE START 20.............: 0xba339a30
FENCE END 20...............: 0xfbf1dc36
FENCE START 21.............: 0xb26b9659
FENCE END 21...............: 0x33bd78ae
FENCE START 22.............: 0x23e034cd
FENCE END 22...............: 0xb2e036d8
FENCE START 23.............: 0xa8d9fb78
FENCE END 23...............: 0x92ff7d77
FENCE START 24.............: 0x0e9acecb
FENCE END 24...............: 0x77f0c08b
FENCE START 25.............: 0xc1854ae4
FENCE END 25...............: 0x030c0794
FENCE START 26.............: 0xf641d108
FENCE END 26...............: 0x6f3c2238
FENCE START 27.............: 0xb7959952
FENCE END 27...............: 0xb67cfd15
FENCE START 28.............: 0xf50809ab
FENCE END 28...............: 0xed4a85b2
FENCE START 29.............: 0x5dab90b8
FENCE END 29...............: 0x1ca4d914
FENCE START 30.............: 0x73b01c1a
FENCE END 30...............: 0xe19df496
FENCE START 31.............: 0x3229bfcd
FENCE END 31...............: 0x1dac789c
GEN6_RP_CONTROL............: 0x08115954 (disabled)
GEN6_RPNSWREQ..............: 0xc08a22ce
GEN6_RP_DOWN_TIMEOUT.......: 0x9a564b64
GEN6_RP_INTERRUPT_LIMITS...: 0x805935a3
GEN6_RP_UP_THRESHOLD.......: 0xe5fa20a9
GEN6_RP_UP_EI..............: 0x6ba08f9f
GEN6_RP_DOWN_EI............: 0xb7ef9e09
GEN6_RP_IDLE_HYSTERSIS.....: 0x489d43a9
GEN6_RC_STATE..............: 0xb872de31
GEN6_RC_CONTROL............: 0xe5113176
GEN6_RC1_WAKE_RATE_LIMIT...: 0x20e3a2b4
GEN6_RC6_WAKE_RATE_LIMIT...: 0x6976fd49
GEN6_RC_EVALUATION_INTERVAL: 0xa413a0da
GEN6_RC_IDLE_HYSTERSIS.....: 0x88cd3e04
GEN6_RC_SLEEP..............: 0xc163ea8f
GEN6_RC1e_THRESHOLD........: 0x31866c92
GEN6_RC6_THRESHOLD.........: 0x93180bce
GEN6_RC_VIDEO_FREQ.........: 0x940ac140
GEN6_PMIER.................: 0xa2085755
GEN6_PMIMR.................: 0xa322cd02
GEN6_PMINTRMSK.............: 0xc18d625f

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 2500 MHz
CPU Maximum Turbo Frequency........: 3200 MHz

IGPU Info:
------------------------------------
IGPU Current Frequency.............:  350 MHz
IGPU Minimum Frequency.............:  350 MHz
IGPU Maximum Non-Turbo Frequency...:  350 MHz
IGPU Maximum Turbo Frequency.......: 1150 MHz
IGPU Maximum limit.................: No Limit

CPU P-States [ (9) 21 30 ] iGPU P-States [ (7) ]
CPU C3-Cores [ 1 2 3 ]
CPU C6-Cores [ 0 1 2 3 ]
CPU C7-Cores [ 0 1 2 3 ]
CPU P-States [ 9 (19) 21 24 30 ] iGPU P-States [ (7) ]
CPU P-States [ (9) 15 19 21 24 30 ] iGPU P-States [ (7) ]
CPU P-States [ 9 13 15 (19) 21 24 30 ] iGPU P-States [ (7) ]
CPU C3-Cores [ 0 1 2 3 ]
CPU P-States [ 9 13 14 15 (19) 21 24 30 ] iGPU P-States [ (7) ]

Upload file following problem reporting, but I think it looks good.

Thank you for your help and I hope it helps more people.

 

[RehabMan]

Honestly, it's strange that it works with SmBios 8.1. I notice in what you say of x8 or x9 but I see a minor failure since there are not many alternatives.


Now the idea that comes to mind ... I know it is specular but seeing that Apple removed devices supported in this version 10.12, I do not know why but I think they will do it in 10.13 (eliminate 8.1 support) and I wont have alternatives. A posibility is go to back the -xcpm command but as you said it was used for testing by apple.


Thank you for all of your help.!


UPDATE:

Geekbench 4 >>>>>>>>>>>. https://browser.geekbench.com/v4/cpu/2991603
Solution found for Smbios 9.2.

At the beginning of the clover in the log look something that would put 0x700 (using SSDT generated by ssdtPRGen beta unmodified by myself). Think if the kp is caused by the 0x700 on the SSDT. I erase it and test it, without success then I add twice the 0x800 test and surprise worked!

SSDT generated by ssdtPRGen beta using ./ssdtPRGen.sh command

/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20161210-64(RM)
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASL8yKhjT.aml, Thu Jun  1 04:59:28 2017
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x0000074C (1868)
*     Revision         0x01
*     Checksum         0xB1
*     OEM ID           "APPLE "
*     OEM Table ID     "CpuPm"
*     OEM Revision     0x00021500 (136448)
*     Compiler ID      "INTL"
*     Compiler Version 0x20161210 (538317328)
*/
DefinitionBlock ("", "SSDT", 1, "APPLE ", "CpuPm", 0x00021500)
{
    External (_PR_.CPU0, DeviceObj)    // (from opcode)
    External (_PR_.CPU1, DeviceObj)    // (from opcode)
    External (_PR_.CPU2, DeviceObj)    // (from opcode)
    External (_PR_.CPU3, DeviceObj)    // (from opcode)

    Scope (\_PR.CPU0)
    {
        Method (_INI, 0, NotSerialized)  // _INI: Initialize
        {
            Store ("ssdtPRGen version.....: 21.5 / Mac OS X 10.12.5 (16F73)", Debug)
            Store ("custom mode...........: 0", Debug)
            Store ("host processor........: Intel(R) Core(TM) i7-3667U CPU @ 2.00GHz", Debug)
            Store ("target processor......: i7-3667U", Debug)
            Store ("number of processors..: 1", Debug)
            Store ("baseFrequency.........: 800", Debug)
            Store ("frequency.............: 2000", Debug)
            Store ("busFrequency..........: 100", Debug)
            Store ("logicalCPUs...........: 4", Debug)
            Store ("maximum TDP...........: 17", Debug)
            Store ("packageLength.........: 25", Debug)
            Store ("turboStates...........: 12", Debug)
            Store ("maxTurboFrequency.....: 3200", Debug)
            Store ("CPU Workarounds.......: 3", Debug)
            Store ("machdep.xcpm.mode.....: 0", Debug)
        }

        Name (APLF, One)
        Name (APSN, 0x0D)
        Name (APSS, Package (0x1B)
        {
            Package (0x06)
            {
                0x0C81,
                0x4268,
                0x0A,
                0x0A,
                0x2100,
                0x2100
            },

            Package (0x06)
            {
                0x0C80,
                0x4268,
                0x0A,
                0x0A,
                0x2000,
                0x2000
            },

            Package (0x06)
            {
                0x0C1C,
                0x4268,
                0x0A,
                0x0A,
                0x1F00,
                0x1F00
            },

            Package (0x06)
            {
                0x0BB8,
                0x4268,
                0x0A,
                0x0A,
                0x1E00,
                0x1E00
            },

            Package (0x06)
            {
                0x0B54,
                0x4268,
                0x0A,
                0x0A,
                0x1D00,
                0x1D00
            },

            Package (0x06)
            {
                0x0AF0,
                0x4268,
                0x0A,
                0x0A,
                0x1C00,
                0x1C00
            },

            Package (0x06)
            {
                0x0A8C,
                0x4268,
                0x0A,
                0x0A,
                0x1B00,
                0x1B00
            },

            Package (0x06)
            {
                0x0A28,
                0x4268,
                0x0A,
                0x0A,
                0x1A00,
                0x1A00
            },

            Package (0x06)
            {
                0x09C4,
                0x4268,
                0x0A,
                0x0A,
                0x1900,
                0x1900
            },

            Package (0x06)
            {
                0x0960,
                0x4268,
                0x0A,
                0x0A,
                0x1800,
                0x1800
            },

            Package (0x06)
            {
                0x08FC,
                0x4268,
                0x0A,
                0x0A,
                0x1700,
                0x1700
            },

            Package (0x06)
            {
                0x0898,
                0x4268,
                0x0A,
                0x0A,
                0x1600,
                0x1600
            },

            Package (0x06)
            {
                0x0834,
                0x4268,
                0x0A,
                0x0A,
                0x1500,
                0x1500
            },

            Package (0x06)
            {
                0x07D0,
                0x4268,
                0x0A,
                0x0A,
                0x1400,
                0x1400
            },

            Package (0x06)
            {
                0x076C,
                0x3E5E,
                0x0A,
                0x0A,
                0x1300,
                0x1300
            },

            Package (0x06)
            {
                0x0708,
                0x3A6A,
                0x0A,
                0x0A,
                0x1200,
                0x1200
            },

            Package (0x06)
            {
                0x06A4,
                0x3689,
                0x0A,
                0x0A,
                0x1100,
                0x1100
            },

            Package (0x06)
            {
                0x0640,
                0x32BC,
                0x0A,
                0x0A,
                0x1000,
                0x1000
            },

            Package (0x06)
            {
                0x05DC,
                0x2F03,
                0x0A,
                0x0A,
                0x0F00,
                0x0F00
            },

            Package (0x06)
            {
                0x0578,
                0x2B5E,
                0x0A,
                0x0A,
                0x0E00,
                0x0E00
            },

            Package (0x06)
            {
                0x0514,
                0x27CC,
                0x0A,
                0x0A,
                0x0D00,
                0x0D00
            },

            Package (0x06)
            {
                0x04B0,
                0x244D,
                0x0A,
                0x0A,
                0x0C00,
                0x0C00
            },

            Package (0x06)
            {
                0x044C,
                0x20E2,
                0x0A,
                0x0A,
                0x0B00,
                0x0B00
            },

            Package (0x06)
            {
                0x03E8,
                0x1D89,
                0x0A,
                0x0A,
                0x0A00,
                0x0A00
            },

            Package (0x06)
            {
                0x0384,
                0x1A43,
                0x0A,
                0x0A,
                0x0900,
                0x0900
            },

            Package (0x06)
            {
                0x0320,
                0x1710,
                0x0A,
                0x0A,
                0x0800,
                0x0800
            },

            Package (0x06)
            {
                0x02BC,
                Zero,
                0x0A,
                0x0A,
                0x0700,
                0x0700
            }
        })
        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU0.ACST Called", Debug)
            Store ("CPU0 C-States    : 29", Debug)
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    Zero,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xCD,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x06,
                    0xF5,
                    0x015E
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store ("Method _PR_.CPU0._DSM Called", Debug)
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03                                       
                })
            }

            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }

    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.ACST Called", Debug)
            Store ("CPU1 C-States    : 7", Debug)
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    0x03E8,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x02,
                    0x94,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xC6,
                    0xC8
                }
            })
        }
    }

    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU2.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }

    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU3.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }
}

Modified and working

/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20161210-64(RM)
* Copyright (c) 2000 - 2016 Intel Corporation
*
* Disassembling to non-symbolic legacy ASL operators
*
* Disassembly of iASL8yKhjT.aml, Thu Jun  1 04:59:28 2017
*
* Original Table Header:
*     Signature        "SSDT"
*     Length           0x0000074C (1868)
*     Revision         0x01
*     Checksum         0xB1
*     OEM ID           "APPLE "
*     OEM Table ID     "CpuPm"
*     OEM Revision     0x00021500 (136448)
*     Compiler ID      "INTL"
*     Compiler Version 0x20161210 (538317328)
*/
DefinitionBlock ("", "SSDT", 1, "APPLE ", "CpuPm", 0x00021500)
{
    External (_PR_.CPU0, DeviceObj)    // (from opcode)
    External (_PR_.CPU1, DeviceObj)    // (from opcode)
    External (_PR_.CPU2, DeviceObj)    // (from opcode)
    External (_PR_.CPU3, DeviceObj)    // (from opcode)

    Scope (\_PR.CPU0)
    {
        Method (_INI, 0, NotSerialized)  // _INI: Initialize
        {
            Store ("ssdtPRGen version.....: 21.5 / Mac OS X 10.12.5 (16F73)", Debug)
            Store ("custom mode...........: 0", Debug)
            Store ("host processor........: Intel(R) Core(TM) i7-3667U CPU @ 2.00GHz", Debug)
            Store ("target processor......: i7-3667U", Debug)
            Store ("number of processors..: 1", Debug)
            Store ("baseFrequency.........: 800", Debug)
            Store ("frequency.............: 2000", Debug)
            Store ("busFrequency..........: 100", Debug)
            Store ("logicalCPUs...........: 4", Debug)
            Store ("maximum TDP...........: 17", Debug)
            Store ("packageLength.........: 25", Debug)
            Store ("turboStates...........: 12", Debug)
            Store ("maxTurboFrequency.....: 3200", Debug)
            Store ("CPU Workarounds.......: 3", Debug)
            Store ("machdep.xcpm.mode.....: 0", Debug)
        }

        Name (APLF, One)
        Name (APSN, 0x0D)
        Name (APSS, Package (0x1B)
        {
            Package (0x06)
            {
                0x0C81,
                0x4268,
                0x0A,
                0x0A,
                0x2100,
                0x2100
            },

            Package (0x06)
            {
                0x0C80,
                0x4268,
                0x0A,
                0x0A,
                0x2000,
                0x2000
            },

            Package (0x06)
            {
                0x0C1C,
                0x4268,
                0x0A,
                0x0A,
                0x1F00,
                0x1F00
            },

            Package (0x06)
            {
                0x0BB8,
                0x4268,
                0x0A,
                0x0A,
                0x1E00,
                0x1E00
            },

            Package (0x06)
            {
                0x0B54,
                0x4268,
                0x0A,
                0x0A,
                0x1D00,
                0x1D00
            },

            Package (0x06)
            {
                0x0AF0,
                0x4268,
                0x0A,
                0x0A,
                0x1C00,
                0x1C00
            },

            Package (0x06)
            {
                0x0A8C,
                0x4268,
                0x0A,
                0x0A,
                0x1B00,
                0x1B00
            },

            Package (0x06)
            {
                0x0A28,
                0x4268,
                0x0A,
                0x0A,
                0x1A00,
                0x1A00
            },

            Package (0x06)
            {
                0x09C4,
                0x4268,
                0x0A,
                0x0A,
                0x1900,
                0x1900
            },

            Package (0x06)
            {
                0x0960,
                0x4268,
                0x0A,
                0x0A,
                0x1800,
                0x1800
            },

            Package (0x06)
            {
                0x08FC,
                0x4268,
                0x0A,
                0x0A,
                0x1700,
                0x1700
            },

            Package (0x06)
            {
                0x0898,
                0x4268,
                0x0A,
                0x0A,
                0x1600,
                0x1600
            },

            Package (0x06)
            {
                0x0834,
                0x4268,
                0x0A,
                0x0A,
                0x1500,
                0x1500
            },

            Package (0x06)
            {
                0x07D0,
                0x4268,
                0x0A,
                0x0A,
                0x1400,
                0x1400
            },

            Package (0x06)
            {
                0x076C,
                0x3E5E,
                0x0A,
                0x0A,
                0x1300,
                0x1300
            },

            Package (0x06)
            {
                0x0708,
                0x3A6A,
                0x0A,
                0x0A,
                0x1200,
                0x1200
            },

            Package (0x06)
            {
                0x06A4,
                0x3689,
                0x0A,
                0x0A,
                0x1100,
                0x1100
            },

            Package (0x06)
            {
                0x0640,
                0x32BC,
                0x0A,
                0x0A,
                0x1000,
                0x1000
            },

            Package (0x06)
            {
                0x05DC,
                0x2F03,
                0x0A,
                0x0A,
                0x0F00,
                0x0F00
            },

            Package (0x06)
            {
                0x0578,
                0x2B5E,
                0x0A,
                0x0A,
                0x0E00,
                0x0E00
            },

            Package (0x06)
            {
                0x0514,
                0x27CC,
                0x0A,
                0x0A,
                0x0D00,
                0x0D00
            },

            Package (0x06)
            {
                0x04B0,
                0x244D,
                0x0A,
                0x0A,
                0x0C00,
                0x0C00
            },

            Package (0x06)
            {
                0x044C,
                0x20E2,
                0x0A,
                0x0A,
                0x0B00,
                0x0B00
            },

            Package (0x06)
            {
                0x03E8,
                0x1D89,
                0x0A,
                0x0A,
                0x0A00,
                0x0A00
            },

            Package (0x06)
            {
                0x0384,
                0x1A43,
                0x0A,
                0x0A,
                0x0900,
                0x0900
            },

            Package (0x06)
            {
                0x0320,
                0x1710,
                0x0A,
                0x0A,
                0x0800,
                0x0800
            },

            Package (0x06)
            {
                0x02BC,
                Zero,
                0x0A,
                0x0A,
                0x0800,
                0x0800
            }
        })
        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU0.ACST Called", Debug)
            Store ("CPU0 C-States    : 29", Debug)
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    Zero,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xCD,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x06,
                    0xF5,
                    0x015E
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }

        Method (_DSM, 4, NotSerialized)  // _DSM: Device-Specific Method
        {
            Store ("Method _PR_.CPU0._DSM Called", Debug)
            If (LEqual (Arg2, Zero))
            {
                Return (Buffer (One)
                {
                     0x03                                        
                })
            }

            Return (Package (0x02)
            {
                "plugin-type",
                One
            })
        }
    }

    Scope (\_PR.CPU1)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU1.ACST Called", Debug)
            Store ("CPU1 C-States    : 7", Debug)
            Return (Package (0x05)
            {
                One,
                0x03,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },

                    One,
                    0x03E8,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x02,
                    0x94,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },

                    0x03,
                    0xC6,
                    0xC8
                }
            })
        }
    }

    Scope (\_PR.CPU2)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU2.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }

    Scope (\_PR.CPU3)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _PR_.CPU3.APSS Called", Debug)
            Return (\_PR.CPU0.APSS)
        }

        Method (ACST, 0, NotSerialized)
        {
            Return (\_PR.CPU1.ACST ())
        }
    }
}

Results intel apple info. Strange x9...

AppleIntelInfo.kext v1.2 Copyright © 2012-2015 Pike R. Alpha. All rights reserved

Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 1
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0x3155b59d0a
MWAIT C-States.....................: 135456

Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35)  : 0x20004
MSR_PLATFORM_INFO..........(0xCE)  : 0x80815F0011900
MSR_PMG_CST_CONFIG_CONTROL.(0xE2)  : 0x1E008404
MSR_PMG_IO_CAPTURE_BASE....(0xE4)  : 0x20414
IA32_MPERF.................(0xE7)  : 0xCFB148DE7
IA32_APERF.................(0xE8)  : 0xCC51EEFAF
MSR_FLEX_RATIO.............(0x194) : 0x180000
MSR_IA32_PERF_STATUS.......(0x198) : 0x1ABD00000900
MSR_IA32_PERF_CONTROL......(0x199) : 0x2019
IA32_CLOCK_MODULATION......(0x19A) : 0x0
IA32_THERM_STATUS..........(0x19C) : 0x883A0000
IA32_MISC_ENABLES..........(0x1A0) : 0x850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x400001
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x1E1E1E20
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x4
MSR_POWER_CTL..............(0x1FC) : 0x14005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA1003
MSR_PKG_POWER_LIMIT........(0x610) : 0x80FA00DC80C8
MSR_PKG_ENERGY_STATUS......(0x611) : 0x1F99288
MSR_PKG_POWER_INFO.........(0x614) : 0x88
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x1814149480000380
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x1460264
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PP1_CURRENT_CONFIG.....(0x602) : 0x1814149480000170
MSR_PP1_POWER_LIMIT........(0x640) : 0x0
MSR_PP1_ENERGY_STATUS......(0x641) : 0x5E2DF
MSR_PP1_POLICY.............(0x642) : 0x10
MSR_CONFIG_TDP_NOMINAL.....(0x648) : 0x14
MSR_CONFIG_TDP_LEVEL1......(0x649) : 0x80070
MSR_CONFIG_TDP_LEVEL2......(0x64a) : 0x1900C8
MSR_CONFIG_TDP_CONTROL.....(0x64b) : 0x0
MSR_TURBO_ACTIVATION_RATIO.(0x64c) : 0x0
MSR_PKGC3_IRTL.............(0x60a) : 0x883B
MSR_PKGC6_IRTL.............(0x60b) : 0x8850
MSR_PKGC7_IRTL.............(0x60c) : 0x8857
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x128F9F99C
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0xE1C9AF4
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0xD666F24D
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x116C41E853
IA32_TSC_DEADLINE..........(0x6E0) : 0x3159ACBF2D
PCH device.................: 0x1E558086

Intel Register Data
------------------------------------
CPU_VGACNTRL...............: 0x6596C63A
IS_GEN5(devid) || IS_GEN6(devid) || IS_IVYBRIDGE(devid)
PGETBL_CTL.................: 0x539b31cb
INSTDONE_I965..............: 0x5f635e6c
INSTDONE_1.................: 0x1e1661a8
CPU_VGACNTRL...............: 0x6596c63a (enabled)
DIGITAL_PORT_HOTPLUG_CNTRL.: 0xffd0a649
RR_HW_CTL..................: 0x00ff4669 (low 105, high 70)
FDI_PLL_BIOS_0.............: 0xe8149479
FDI_PLL_BIOS_1.............: 0xc5cf8a88
FDI_PLL_BIOS_2.............: 0x5aa2abc5
DISPLAY_PORT_PLL_BIOS_0....: 0x926e69d9
DISPLAY_PORT_PLL_BIOS_1....: 0xf745d643
DISPLAY_PORT_PLL_BIOS_2....: 0xf84fdfc6
FDI_PLL_FREQ_CTL...........: 0x12e1019a
PIPEACONF..................: 0x2852bf0b (disabled, inactive, rsvd, rotate 180, 8bpc)
HTOTAL_A...................: 0x05f61937 (6456 active, 1527 total)
HBLANK_A...................: 0x7d2da376 (41847 start, 32046 end)
HSYNC_A....................: 0x502fd9f0 (55793 start, 20528 end)
VTOTAL_A...................: 0xeed68c9e (35999 active, 61143 total)
VBLANK_A...................: 0x330542ab (17068 start, 13062 end)
VSYNC_A....................: 0xb80379b1 (31154 start, 47108 end)
VSYNCSHIFT_A...............: 0x8784ba42
PIPEASRC...................: 0x68c8c064 (26825, 49253)
PIPEA_DATA_M1..............: 0x12d67bb6 (TU 10, val 0xd67bb6 14056374)
PIPEA_DATA_N1..............: 0xd551e4f2 (val 0x51e4f2 5367026)
PIPEA_DATA_M2..............: 0xd52846cc (TU 107, val 0x2846cc 2639564)
PIPEA_DATA_N2..............: 0x6c44445d (val 0x44445d 4473949)
PIPEA_LINK_M1..............: 0x82a2721a (val 0xa2721a 10646042)
PIPEA_LINK_N1..............: 0x149662a0 (val 0x9662a0 9855648)
PIPEA_LINK_M2..............: 0xb2aee0ab (val 0xaee0ab 11460779)
PIPEA_LINK_N2..............: 0xdc89ab9e (val 0x89ab9e 9022366)
DSPACNTR...................: 0xdf81a6b9 (enabled)
DSPABASE...................: 0x5f75bb5c
DSPASTRIDE.................: 0xdf646e72 (58560953)
DSPASURF...................: 0x09a2cc19
DSPATILEOFF................: 0xb081bbd4 (48084, 45185)
PIPEBCONF..................: 0xe9a4d29d (enabled, active, pf-id-dbl, rotate 270, invalid bpc)
HTOTAL_B...................: 0xee343677 (13944 active, 60981 total)
HBLANK_B...................: 0xdc59679e (26527 start, 56410 end)
HSYNC_B....................: 0x90ff8bed (35822 start, 37120 end)
VTOTAL_B...................: 0x2fc26138 (24889 active, 12227 total)
VBLANK_B...................: 0x124ab5e7 (46568 start, 4683 end)
VSYNC_B....................: 0xd28b986a (39019 start, 53900 end)
VSYNCSHIFT_B...............: 0xee62e5c9
PIPEBSRC...................: 0x441e8790 (17439, 34705)
PIPEB_DATA_M1..............: 0x4477e1e6 (TU 35, val 0x77e1e6 7856614)
PIPEB_DATA_N1..............: 0x1b151ebf (val 0x151ebf 1384127)
PIPEB_DATA_M2..............: 0xbd6552b0 (TU 95, val 0x6552b0 6640304)
PIPEB_DATA_N2..............: 0xf683a37f (val 0x83a37f 8627071)
PIPEB_LINK_M1..............: 0x9433216a (val 0x33216a 3350890)
PIPEB_LINK_N1..............: 0x3cf60221 (val 0xf60221 16122401)
PIPEB_LINK_M2..............: 0x65f13c8c (val 0xf13c8c 15809676)
PIPEB_LINK_N2..............: 0x7bbd8879 (val 0xbd8879 12421241)
DSPBCNTR...................: 0x7861839e (disabled)
DSPBBASE...................: 0xb6aef2f6
DSPBSTRIDE.................: 0x05aac759 (1485597)
DSPBSURF...................: 0x4033cbb1
DSPBTILEOFF................: 0x7bb04dd1 (19921, 31664)
PIPECCONF..................: 0x08eaf86b (disabled, inactive, rsvd, rotate 270, 12bpc)
HTOTAL_C...................: 0xd3b7a430 (42033 active, 54200 total)
HBLANK_C...................: 0x1490811f (33056 start, 5265 end)
HSYNC_C....................: 0x90b199a8 (39337 start, 37042 end)
VTOTAL_C...................: 0x9ea0e8b1 (59570 active, 40609 total)
VBLANK_C...................: 0x58f9eef6 (61175 start, 22778 end)
VSYNC_C....................: 0x83f1ad22 (44323 start, 33778 end)
VSYNCSHIFT_C...............: 0xb70884c9
PIPECSRC...................: 0xfd3e87c0 (64831, 34753)
PIPEC_DATA_M1..............: 0x64f7e030 (TU 51, val 0xf7e030 16244784)
PIPEC_DATA_N1..............: 0x39617b77 (val 0x617b77 6388599)
PIPEC_DATA_M2..............: 0x5f76bf73 (TU 48, val 0x76bf73 7782259)
PIPEC_DATA_N2..............: 0x6bc1e3a4 (val 0xc1e3a4 12706724)
PIPEC_LINK_M1..............: 0x7e32d00d (val 0x32d00d 3330061)
PIPEC_LINK_N1..............: 0x165ee651 (val 0x5ee651 6219345)
PIPEC_LINK_M2..............: 0x6de0c989 (val 0xe0c989 14731657)
PIPEC_LINK_N2..............: 0x2feed8f0 (val 0xeed8f0 15653104)
DSPCCNTR...................: 0x1d68b596 (disabled)
DSPCBASE...................: 0xb722d27c
DSPCSTRIDE.................: 0x00230d0d (35892)
DSPCSURF...................: 0x7054db99
DSPCTILEOFF................: 0x72b74190 (16784, 29367)
PFA_CTL_1..................: 0xe28b073a (enable, auto_scale no, auto_scale_cal yes, v_filter enable, vadapt disable, mode moderate, filter_sel hardcoded,chroma pre-filter disable, vert3tap auto, v_inter_invert field 1)
PFA_CTL_2..................: 0x972a256a (vscale f)
PFA_CTL_3..................: 0x9d4e12ea (vscale initial phase f)
PFA_CTL_4..................: 0x0ac19ff7 (hscale f)
PFA_WIN_POS................: 0x0b783b40 (2936, 2880)
PFA_WIN_SIZE...............: 0x3de3e892 (7651, 2194)
PFB_CTL_1..................: 0x831b4f09 (enable, auto_scale yes, auto_scale_cal no, v_filter enable, vadapt disable, mode moderate, filter_sel edge_enhance,chroma pre-filter disable, vert3tap auto, v_inter_invert field 0)
PFB_CTL_2..................: 0x4d782569 (vscale f)
PFB_CTL_3..................: 0x9dc202ec (vscale initial phase f)
PFB_CTL_4..................: 0x07e04b9f (hscale f)
PFB_WIN_POS................: 0x8e3aaea0 (3642, 3744)
PFB_WIN_SIZE...............: 0x9fc32890 (8131, 2192)
PFC_CTL_1..................: 0x404a5ffc (disable, auto_scale no, auto_scale_cal no, v_filter enable, vadapt disable, mode least, filter_sel programmed,chroma pre-filter enable, vert3tap auto, v_inter_invert field 1)
PFC_CTL_2..................: 0xefd275a3 (vscale f)
PFC_CTL_3..................: 0x0641efa9 (vscale initial phase f)
PFC_CTL_4..................: 0xbb059017 (hscale f)
PFC_WIN_POS................: 0xea1ff822 (2591, 2082)
PFC_WIN_SIZE...............: 0x1a521b9a (6738, 2970)
PCH_DREF_CONTROL...........: 0x9b09d9ec (cpu source downspread, ssc_source enable, nonspread_source disable, superspread_source enable, ssc4_mode centerspread, ssc1 disable, ssc4 disable)
PCH_RAWCLK_FREQ............: 0xe6c8989b (FDL_TP1 timer 1.0us, FDL_TP2 timer 6.0us, freq 155)
PCH_DPLL_TMR_CFG...........: 0x0a662bdd
PCH_SSC4_PARMS.............: 0x6f0d7643
PCH_SSC4_AUX_PARMS.........: 0xf93f87a7
PCH_DPLL_SEL...............: 0x916c5bb7 (TransA DPLL disable (DPLL ), TransB DPLL enable (DPLL B))
PCH_DPLL_ANALOG_CTL........: 0x22939b9c
PCH_DPLL_A.................: 0x805935a3 (enable, sdvo high speed no, mode , p2 , FPA0 P1 1, FPA1 P1 1, refclk SuperSSC 120Mhz, sdvo/hdmi mul 3)
PCH_DPLL_B.................: 0x93476789 (enable, sdvo high speed no, mode , p2 , FPA0 P1 1, FPA1 P1 1, refclk SSC, sdvo/hdmi mul 4)
PCH_FPA0...................: 0x2e3d4106 (n = 61, m1 = 1, m2 = 6)
PCH_FPA1...................: 0x65c42eda (n = 4, m1 = 46, m2 = 26)
PCH_FPB0...................: 0x35889880 (n = 8, m1 = 24, m2 = 0)
PCH_FPB1...................: 0xd8ce125c (n = 14, m1 = 18, m2 = 28)
TRANS_HTOTAL_A.............: 0xe28b073a (1851 active, 57996 total)
TRANS_HBLANK_A.............: 0x972a2568 (9577 start, 38699 end)
TRANS_HSYNC_A..............: 0x9dce12e8 (4841 start, 40399 end)
TRANS_VTOTAL_A.............: 0x86d322ab (8876 active, 34516 total)
TRANS_VBLANK_A.............: 0x0ac19ef7 (40696 start, 2754 end)
TRANS_VSYNC_A..............: 0xab244f20 (20257 start, 43813 end)
TRANS_VSYNCSHIFT_A.........: 0xf1a4fd5d
TRANSA_DATA_M1.............: 0x610edfe2 (TU 49, val 0xedfe2 974818)
TRANSA_DATA_N1.............: 0xff4f1da2 (val 0x4f1da2 5184930)
TRANSA_DATA_M2.............: 0x60e8e13d (TU 49, val 0xe8e13d 15262013)
TRANSA_DATA_N2.............: 0x78f0d752 (val 0xf0d752 15783762)
TRANSA_DP_LINK_M1..........: 0x91971a53 (val 0x971a53 9902675)
TRANSA_DP_LINK_N1..........: 0xf9b9e4e3 (val 0xb9e4e3 12182755)
TRANSA_DP_LINK_M2..........: 0x6c4ef242 (val 0x4ef242 5173826)
TRANSA_DP_LINK_N2..........: 0xb8cfd211 (val 0xcfd211 13619729)
TRANS_HTOTAL_B.............: 0x404a5ffc (24573 active, 16459 total)
TRANS_HBLANK_B.............: 0xefd255a1 (21922 start, 61395 end)
TRANS_HSYNC_B..............: 0x06417fa9 (32682 start, 1602 end)
TRANS_VTOTAL_B.............: 0xf84c028b (652 active, 63565 total)
TRANS_VBLANK_B.............: 0xb9059817 (38936 start, 47366 end)
TRANS_VSYNC_B..............: 0x0b4b3f4f (16208 start, 2892 end)
TRANS_VSYNCSHIFT_B.........: 0xd7ae0ed8
TRANSB_DATA_M1.............: 0x3d2eb170 (TU 31, val 0x2eb170 3060080)
TRANSB_DATA_N1.............: 0x14bf2268 (val 0xbf2268 12526184)
TRANSB_DATA_M2.............: 0x3e5e8491 (TU 32, val 0x5e8491 6194321)
TRANSB_DATA_N2.............: 0x5a71b7b7 (val 0x71b7b7 7452599)
TRANSB_DP_LINK_M1..........: 0xc647445e (val 0x47445e 4670558)
TRANSB_DP_LINK_N1..........: 0xe439f609 (val 0x39f609 3798537)
TRANSB_DP_LINK_M2..........: 0x860015cc (val 0x15cc 5580)
TRANSB_DP_LINK_N2..........: 0x38e8f245 (val 0xe8f245 15266373)
TRANS_HTOTAL_C.............: 0x50c899a8 (39337 active, 20681 total)
TRANS_HBLANK_C.............: 0xb75c3334 (13109 start, 46941 end)
TRANS_HSYNC_C..............: 0x970095ce (38351 start, 38657 end)
TRANS_VTOTAL_C.............: 0x20a8268c (9869 active, 8361 total)
TRANS_VBLANK_C.............: 0xdd840bd5 (3030 start, 56709 end)
TRANS_VSYNC_C..............: 0x32503b4f (15184 start, 12881 end)
TRANS_VSYNCSHIFT_C.........: 0xdff6566a
TRANSC_DATA_M1.............: 0x1b8e4522 (TU 14, val 0x8e4522 9323810)
TRANSC_DATA_N1.............: 0x72722869 (val 0x722869 7481449)
TRANSC_DATA_M2.............: 0x3c36ba33 (TU 31, val 0x36ba33 3586611)
TRANSC_DATA_N2.............: 0x7b713d96 (val 0x713d96 7421334)
TRANSC_DP_LINK_M1..........: 0xe3667996 (val 0x667996 6715798)
TRANSC_DP_LINK_N1..........: 0xc64ca02e (val 0x4ca02e 5021742)
TRANSC_DP_LINK_M2..........: 0xb7702d3f (val 0x702d3f 7351615)
TRANSC_DP_LINK_N2..........: 0xd4a8e60d (val 0xa8e60d 11068941)
TRANSACONF.................: 0x2c56d0c0 (disable, inactive, rsvd)
TRANSBCONF.................: 0x3cd3b59e (disable, inactive, rsvd)
TRANSCCONF.................: 0xa518b5fe (enable, inactive, progressive)
FDI_TXA_CTL................: 0xda4cd226 (enable, train pattern pattern_2, voltage swing ,pre-emphasis , port width X2, enhanced framing enable, FDI PLL enable, scrambing enable, master mode disable)
FDI_TXB_CTL................: 0x3c3ba1e7 (disable, train pattern not train, voltage swing ,pre-emphasis , port width , enhanced framing disable, FDI PLL disable, scrambing disable, master mode enable)
FDI_TXC_CTL................: 0xbc1e110d (enable, train pattern not train, voltage swing ,pre-emphasis , port width X4, enhanced framing enable, FDI PLL disable, scrambing enable, master mode enable)
FDI_RXA_CTL................: 0xf8bf8229 (enable, train pattern pattern_idle, port width , ,link_reverse_strap_overwrite yes, dmi_link_reverse no, FDI PLL disable,FS ecc disable, FE ecc disable, FS err report enable, FE err report disable,scrambing enable,FDI_RXB_CTL................: 0x5a00e405 (disable, train pattern pattern_1, port width X1, 8bpc,link_reverse_strap_overwrite yes, dmi_link_reverse yes, FDI PLL enable,FS ecc disable, FE ecc enable, FS err report disable, FE err report disable,scrambing enaFDI_RXC_CTL................: 0x5da0fa45 (disable, train pattern pattern_idle, port width , 8bpc,link_reverse_strap_overwrite yes, dmi_link_reverse yes, FDI PLL enable,FS ecc enable, FE ecc disable, FS err report enable, FE err report disable,scrambing enaDPAFE_BMFUNC...............: 0xb6141cca
DPAFE_DL_IREFCAL0..........: 0x36ad258d
DPAFE_DL_IREFCAL1..........: 0xa6819c70
DPAFE_DP_IREFCAL...........: 0xe5ea559b
PCH_DSPCLK_GATE_D..........: 0x192e4a79
PCH_DSP_CHICKEN1...........: 0x741b9a5a
PCH_DSP_CHICKEN2...........: 0x98b9749d
PCH_DSP_CHICKEN3...........: 0x181cd3ea
FDI_RXA_MISC...............: 0xacddd5c9 (FDI Delay 5577)
FDI_RXB_MISC...............: 0x7feb90c7 (FDI Delay 4295)
FDI_RXC_MISC...............: 0x70185905 (FDI Delay 6405)
FDI_RXA_TUSIZE1............: 0xee6b6a34
FDI_RXA_TUSIZE2............: 0x6b60d69d
FDI_RXB_TUSIZE1............: 0xe01e8fb2
FDI_RXB_TUSIZE2............: 0x2bfa96bb
FDI_RXC_TUSIZE1............: 0x0e16fdd2
FDI_RXC_TUSIZE2............: 0xada2f4b2
FDI_PLL_CTL_1..............: 0xe709e4dc
FDI_PLL_CTL_2..............: 0x4ecae657
FDI_RXA_IIR................: 0x016f282a
FDI_RXA_IMR................: 0x7c976fea
FDI_RXB_IIR................: 0x0bc638f9
FDI_RXB_IMR................: 0x21da96c6
PCH_ADPA...................: 0xf890ddfd (enabled, transcoder B, +hsync, +vsync)
HDMIB......................: 0x21e818c4 (disabled pipe B 8bpc TMDS DVI audio enabled -vsync -hsync detected)
HDMIC......................: 0xa9bfc173 (enabled pipe B  SDVO DVI audio enabled +vsync -hsync non-detected)
HDMID......................: 0xdc1a1b6c (enabled pipe C  TMDS HDMI audio enabled -vsync +hsync detected)
PCH_LVDS...................: 0x2d120dfe (disabled, pipe B, 24 bit, 2 channels)
CPU_eDP_A..................: 0x69bd62e4
PCH_DP_B...................: 0x765a4de8
PCH_DP_C...................: 0xfcf7e5b4
PCH_DP_D...................: 0xf63e46f9
TRANS_DP_CTL_A.............: 0xba3ccda2 (enable port C  -vsync -hsync)
TRANS_DP_CTL_B.............: 0x2c3cb63d (disable port C 12bpc +vsync +hsync)
TRANS_DP_CTL_C.............: 0x0eed879e (disable port B 12bpc +vsync +hsync)
BLC_PWM_CPU_CTL2...........: 0x8d515293 (enable 1, pipe A)
BLC_PWM_CPU_CTL............: 0x829c3399 (cycle 13209)
BLC_PWM_PCH_CTL1...........: 0x2ba3ae9c (enable 0, override 0, inverted polarity 1)
BLC_PWM_PCH_CTL2...........: 0x3f0cc3dc (freq 16140, cycle 50140)
PCH_PP_STATUS..............: 0x207cefea (off, not ready, sequencing off)
PCH_PP_CONTROL.............: 0x3408a791 (blacklight disabled, do not power down on reset, panel on)
PCH_PP_ON_DELAYS...........: 0xc874ea25
PCH_PP_OFF_DELAYS..........: 0x052a9217
PCH_PP_DIVISOR.............: 0xd74dd04c
PORT_DBG...................: 0x84d135d4 (HW DRRS )
RC6_RESIDENCY_TIME.........: 0x56010fdf
RC6p_RESIDENCY_TIME........: 0x0ce57a8c
RC6pp_RESIDENCY_TIME.......: 0xe58ba854
IS_GEN6(devid) || IS_GEN7(devid)
FENCE START 0..............: 0x53419ad5
FENCE END 0................: 0xbe3d40ad
FENCE START 1..............: 0x8bb78e7b
FENCE END 1................: 0xd582a10d
FENCE START 2..............: 0xf6253325
FENCE END 2................: 0xc867bed0
FENCE START 3..............: 0xd1a98f04
FENCE END 3................: 0x5eb686f8
FENCE START 4..............: 0xcd41e69d
FENCE END 4................: 0x90048ed0
FENCE START 5..............: 0x34c5ca79
FENCE END 5................: 0xaba86186
FENCE START 6..............: 0x21f42e1f
FENCE END 6................: 0x402ca980
FENCE START 7..............: 0xe6de1f61
FENCE END 7................: 0x7e5b94bb
FENCE START 8..............: 0xda6021cc
FENCE END 8................: 0xd7ea8079
FENCE START 9..............: 0x08e2a09d
FENCE END 9................: 0xaa486b37
FENCE START 10.............: 0x474d6851
FENCE END 10...............: 0xd83fdfb2
FENCE START 11.............: 0xecd75c67
FENCE END 11...............: 0x01191f9b
FENCE START 12.............: 0xec597a07
FENCE END 12...............: 0xa2eb7b03
FENCE START 13.............: 0x8a6dd323
FENCE END 13...............: 0xb6e663da
FENCE START 14.............: 0x9acdf435
FENCE END 14...............: 0x23c0f43b
FENCE START 15.............: 0xfcdce671
FENCE END 15...............: 0x5ba9d969
FENCE START 16.............: 0xaae6e45f
FENCE END 16...............: 0x150d754f
FENCE START 17.............: 0x68861986
FENCE END 17...............: 0xbf572dda
FENCE START 18.............: 0x37edd79f
FENCE END 18...............: 0xf25ee4ff
FENCE START 19.............: 0xc5fa187b
FENCE END 19...............: 0xadd711e8
FENCE START 20.............: 0xba339a30
FENCE END 20...............: 0xfbf1dc36
FENCE START 20.............: 0xba339a30
FENCE END 20...............: 0xfbf1dc36
FENCE START 21.............: 0xb26b9659
FENCE END 21...............: 0x33bd78ae
FENCE START 22.............: 0x23e034cd
FENCE END 22...............: 0xb2e036d8
FENCE START 23.............: 0xa8d9fb78
FENCE END 23...............: 0x92ff7d77
FENCE START 24.............: 0x0e9acecb
FENCE END 24...............: 0x77f0c08b
FENCE START 25.............: 0xc1854ae4
FENCE END 25...............: 0x030c0794
FENCE START 26.............: 0xf641d108
FENCE END 26...............: 0x6f3c2238
FENCE START 27.............: 0xb7959952
FENCE END 27...............: 0xb67cfd15
FENCE START 28.............: 0xf50809ab
FENCE END 28...............: 0xed4a85b2
FENCE START 29.............: 0x5dab90b8
FENCE END 29...............: 0x1ca4d914
FENCE START 30.............: 0x73b01c1a
FENCE END 30...............: 0xe19df496
FENCE START 31.............: 0x3229bfcd
FENCE END 31...............: 0x1dac789c
GEN6_RP_CONTROL............: 0x08115954 (disabled)
GEN6_RPNSWREQ..............: 0xc08a22ce
GEN6_RP_DOWN_TIMEOUT.......: 0x9a564b64
GEN6_RP_INTERRUPT_LIMITS...: 0x805935a3
GEN6_RP_UP_THRESHOLD.......: 0xe5fa20a9
GEN6_RP_UP_EI..............: 0x6ba08f9f
GEN6_RP_DOWN_EI............: 0xb7ef9e09
GEN6_RP_IDLE_HYSTERSIS.....: 0x489d43a9
GEN6_RC_STATE..............: 0xb872de31
GEN6_RC_CONTROL............: 0xe5113176
GEN6_RC1_WAKE_RATE_LIMIT...: 0x20e3a2b4
GEN6_RC6_WAKE_RATE_LIMIT...: 0x6976fd49
GEN6_RC_EVALUATION_INTERVAL: 0xa413a0da
GEN6_RC_IDLE_HYSTERSIS.....: 0x88cd3e04
GEN6_RC_SLEEP..............: 0xc163ea8f
GEN6_RC1e_THRESHOLD........: 0x31866c92
GEN6_RC6_THRESHOLD.........: 0x93180bce
GEN6_RC_VIDEO_FREQ.........: 0x940ac140
GEN6_PMIER.................: 0xa2085755
GEN6_PMIMR.................: 0xa322cd02
GEN6_PMINTRMSK.............: 0xc18d625f

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 2500 MHz
CPU Maximum Turbo Frequency........: 3200 MHz

IGPU Info:
------------------------------------
IGPU Current Frequency.............:  350 MHz
IGPU Minimum Frequency.............:  350 MHz
IGPU Maximum Non-Turbo Frequency...:  350 MHz
IGPU Maximum Turbo Frequency.......: 1150 MHz
IGPU Maximum limit.................: No Limit

CPU P-States [ (9) 21 30 ] iGPU P-States [ (7) ]
CPU C3-Cores [ 1 2 3 ]
CPU C6-Cores [ 0 1 2 3 ]
CPU C7-Cores [ 0 1 2 3 ]
CPU P-States [ 9 (19) 21 24 30 ] iGPU P-States [ (7) ]
CPU P-States [ (9) 15 19 21 24 30 ] iGPU P-States [ (7) ]
CPU P-States [ 9 13 15 (19) 21 24 30 ] iGPU P-States [ (7) ]
CPU C3-Cores [ 0 1 2 3 ]
CPU P-States [ 9 13 14 15 (19) 21 24 30 ] iGPU P-States [ (7) ]

Upload file following problem reporting, but I think it looks good.

Thank you for your help and I hope it helps more people.

The "double x8 state" solution is an old one that I forgot about...

You might post that info here:
https://www.tonymacx86.com/threads/solved-ssdtprgen-aicpupm-kernel-panics-and-stepping-woes.202421/

 

[VioletDragon]

I think the regional (legal) differences result in different channels being available/unavailable.

I guess these government blokes don't realize that wireless networking is primarily used on mobile devices that regularly travel around the world with their owners... so, of course, they must regulate the airwaves, because clearly only devices licensed in that country could possibly be used there! (maybe it is not as ridiculous as it seems, but...)

Hi RehabMan. Would you know a program which will allow me to clone windows drive which my Probook 4540s came with to the SSD?

 

[RehabMan]

Hi RehabMan. Would you know a program which will allow me to clone windows drive which my Probook 4540s came with to the SSD?

I just clone individual partitions with gparted.
You have to manually move/fix things like the BCD.

 

[VioletDragon]

I just clone individual partitions with gparted.
You have to manually move/fix things like the BCD.

Maybe better to do a fresh install i think because Windows 8.1 is in Legacy not UEFI. Currently installing Windows 10 over Windows 8.1 to see if it activates because apparently you can still get Windows 10 for free.

 

[RehabMan]

Maybe better to do a fresh install i think because Windows 8.1 is in Legacy not UEFI. Currently installing Windows 10 over Windows 8.1 to see if it activates because apparently you can still get Windows 10 for free.

FYI: You can still clone from a legacy Windows install to a GPT drive. Then rebuild the UEFI boot info with BCDBOOT...

 

[VioletDragon]

FYI: You can still clone from a legacy Windows install to a GPT drive. Then rebuild the UEFI boot info with BCDBOOT...

So heres something i want to ask you. I just ran the upgrade from Windows 8.1 using the assistive update from Windows 8.1 to Windows 10 Pro its activated after running the upgrade then i did a clean install of Windows 10 Pro on a test drive and its activated and the Licence Key is still the same how does it know the same licence key? The Licence key is a new key not the one on the SLIC how does it know the same Licence key does it write anything to the UEFI?

 

[RehabMan]

So heres something i want to ask you. I just ran the upgrade from Windows 8.1 using the assistive update from Windows 8.1 to Windows 10 Pro its activated after running the upgrade then i did a clean install of Windows 10 Pro on a test drive and its activated and the Licence Key is still the same how does it know the same licence key? The Licence key is a new key not the one on the SLIC how does it know the same Licence key does it write anything to the UEFI?

Probably it "phones home" to Microsoft servers... validation details kept there...

 

[VioletDragon]

Probably it "phones home" to Microsoft servers... validation details kept there...

I guess so. It appears that the Licence Keys seem to be the same when doing the free upgrade.