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I was dum file debug successful. Hope pro see help
[Guide] How to patch DSDT for working battery status
- Thread starter RehabMan
- Start date
RehabMan
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EFI/Clover is missing. Please read "Problem Reporting" carefully.
Your kextcache output proves kexts are not installed correctly.
All kexts you need must be installed to the system volume.
Read post #2 of the Clover guide for details:
https://www.tonymacx86.com/threads/guide-booting-the-os-x-installer-on-laptops-with-clover.148093/
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Hello,
i want to get more familiar with battery patching. I know there is a guide for my laptop. But i want to patch the dsdt on my own to learn.
My question is, do i have to change, delete or set new offsets after changing the commented fields.
i want to get more familiar with battery patching. I know there is a guide for my laptop. But i want to patch the dsdt on my own to learn.
My question is, do i have to change, delete or set new offsets after changing the commented fields.
Code:
OperationRegion (ECRM, EmbeddedControl, Zero, 0xFF)
Field (ECRM, ByteAcc, NoLock, Preserve)
{
PMCD, 32,
S0FL, 8,
SXF0, 8,
SXF1, 8,
CPWR, 16,
CVLT, 16,
CCUR, 16,
DIDX, 8,
CIDX, 8,
PMCC, 8,
PMEP, 8,
Offset (0x22),
CRZN, 8,
THTA, 8,
HYST, 8,
CRIT, 8,
TEMP, 8,
TENA, 8,
Offset (0x29),
TOAD, 8,
PHTP, 8,
THEM, 8,
TMPO, 8,
AFAN, 8,
FRDC, 8,
FTGC, 8,
PLTP, 8,
Offset (0x32),
DTMP, 8,
Offset (0x35),
FR2C, 8,
FT2C, 8,
BCVD, 8,
Offset (0x40),
ABDI, 8,
ABAD, 8,
ABIX, 8,
ABDA, 8,
ABST, 8,
PORI, 8,
Offset (0x4C),
PSSB, 8,
Offset (0x5E),
PPST, 8,
PPVP, 8,
UCHC, 8,
UCHS, 8,
UCDB, 8,
UCCS, 8,
UCPN, 8,
Offset (0x70),
WKTR, 16,
S5TR, 16,
AS4F, 8,
Offset (0x78),
, 7,
BCML, 1,
BRIM, 1,
, 1,
LPMS, 1,
, 1,
EXTP, 1,
BKDT, 1,
BOTP, 1,
Offset (0x80),
Offset (0x81),
, 4,
SLPT, 4,
FNSW, 1,
SFNC, 1,
ACPI, 1,
, 1,
, 1,
, 1,
, 1,
DETF, 1,
LIDS, 1,
TBLT, 1,
, 1,
, 1,
, 1,
COMM, 1,
PME, 1,
SBVD, 1,
ADP, 1,
ADID, 2,
LCTV, 1,
BATP, 4,
BPU, 1,
Offset (0x86),
BSEL, 4,
Offset (0x87),
LB1, 8,
LB2, 8,
//BDC, 16,
BDC0, 8,
BDC1, 8,
Offset (0x8D),
//BFC, 16,
BFC0, 8,
BFC1, 8,
//BRTE, 16,
RTE0, 8,
RTE1, 8,
BTC, 1,
Offset (0x92),
//BME, 16,
BME0, 8,
BME1, 8,
BDN, 8,
//BDV, 16,
BDV0, 8,
BDV1, 8,
//BCV1, 16,
BCX0, 8,
BCX1, 8,
BST, 4,
Offset (0x9B),
//BATE, 16,
ATE0, 8,
ATE1, 8,
//BPR, 16,
BPR0, 8,
BPR1, 8,
//BCR, 16,
BCR0, 8,
BCR1, 8,
//BRC, 16,
BRC0, 8,
BRC1, 8,
//BCC, 16,
BCC0, 8,
BCC1, 8,
//BPV, 16,
BPV0, 8,
BPV1, 8,
//BCV2, 16,
BCA0, 8,
BCA1, 8,
//BCV3, 16,
BCB0, 8,
BCB1, 8,
//BCV4, 16,
BCP0, 8,
BCP1, 8,
BCW, 16,
//BATF, 16,
ATF0, 8,
ATF1, 8,
BCL, 16,
//MAXC, 16,
AXC0, 8,
AXC1, 8,
BCG1, 8,
BT1I, 1,
BT2I, 1,
, 2,
BATN, 4,
//BSTS, 16,
BST0, 8,
BST1, 8,
BCG2, 8,
Offset (0xBD),
BMO, 8,
Offset (0xBF),
BRCV, 8,
Offset (0xC1),
BIF, 8,
BRCC, 8,
Offset (0xC4),
CPSN, 8,
SCPS, 8,
Offset (0xC9),
//BSN, 16,
BSN0, 8,
BSN1, 8,
//BDAT, 16,
BDA0, 8,
BDA1, 8,
BMF, 8,
Offset (0xCF),
CTLB, 8,
Offset (0xD1),
BTY, 8,
Offset (0xD5),
MFAC, 8,
CFAN, 8,
PFAN, 8,
OCPS, 8,
OCPR, 8,
OCPE, 8,
TMP1, 8,
TMP2, 8,
NABT, 4,
BCM, 4,
CCBQ, 16,
//CBT, 16,
CBT0, 8,
CBT1, 8,
Offset (0xE3),
OST, 4,
Offset (0xE4),
Offset (0xE5),
TPTE, 1,
TBBN, 1,
, 3,
TP, 1,
Offset (0xE6),
SHK, 8,
AUDS, 1,
SPKR, 1,
Offset (0xE8),
HSEN, 4,
HSST, 4,
Offset (0xEA),
, 2,
WWP, 1,
WLP, 1,
, 1,
WWS3, 1,
WLS3, 1,
Offset (0xEC),
, 4,
PTEN, 1,
ERWB, 1,
, 1,
Offset (0xED),
Offset (0xEF),
INCH, 2,
IDIS, 2,
INAC, 1,
Offset (0xF6),
AAPI, 8,
ACSE, 8,
ACIX, 8,
//ACPR, 16,
ACP0, 8,
ACP1, 8,
Offset (0xFD),
Offset (0xFF)
}RehabMan
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You cannot remove (comment out) those fields.
As per post #1, you must break them into the appropriate number of 1 byte sized identifiers.
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Sorry my mistake. I have not exactly described what i have done.
I have only 16-bit fields that are accessed. All fields i commented out are larger than 8-bit (16-bit) and are accessed. I break them into two 8-bit fields and used the method called B1B2. My battery status also seems to be working. But i dont know how to set the offset right or if it is necessary at all.
Code:
{
PMCD, 32,
S0FL, 8,
SXF0, 8,
SXF1, 8,
CPWR, 16,
CVLT, 16,
CCUR, 16,
DIDX, 8,
CIDX, 8,
PMCC, 8,
PMEP, 8,
Offset (0x22),
CRZN, 8,
THTA, 8,
HYST, 8,
CRIT, 8,
TEMP, 8,
TENA, 8,
Offset (0x29),
TOAD, 8,
PHTP, 8,
THEM, 8,
TMPO, 8,
AFAN, 8,
FRDC, 8,
FTGC, 8,
PLTP, 8,
Offset (0x32),
DTMP, 8,
Offset (0x35),
FR2C, 8,
FT2C, 8,
BCVD, 8,
Offset (0x40),
ABDI, 8,
ABAD, 8,
ABIX, 8,
ABDA, 8,
ABST, 8,
PORI, 8,
Offset (0x4C),
PSSB, 8,
Offset (0x5E),
PPST, 8,
PPVP, 8,
UCHC, 8,
UCHS, 8,
UCDB, 8,
UCCS, 8,
UCPN, 8,
Offset (0x70),
WKTR, 16,
S5TR, 16,
AS4F, 8,
Offset (0x78),
, 7,
BCML, 1,
BRIM, 1,
, 1,
LPMS, 1,
, 1,
EXTP, 1,
BKDT, 1,
BOTP, 1,
Offset (0x80),
Offset (0x81),
, 4,
SLPT, 4,
FNSW, 1,
SFNC, 1,
ACPI, 1,
, 1,
, 1,
, 1,
, 1,
DETF, 1,
LIDS, 1,
TBLT, 1,
, 1,
, 1,
, 1,
COMM, 1,
PME, 1,
SBVD, 1,
ADP, 1,
ADID, 2,
LCTV, 1,
BATP, 4,
BPU, 1,
Offset (0x86),
BSEL, 4,
Offset (0x87),
LB1, 8,
LB2, 8,
//BDC, 16,
BDC0, 8,
BDC1, 8,
Offset (0x8D),
//BFC, 16,
BFC0, 8,
BFC1, 8,
//BRTE, 16,
RTE0, 8,
RTE1, 8,
BTC, 1,
Offset (0x92),
//BME, 16,
BME0, 8,
BME1, 8,
BDN, 8,
//BDV, 16,
BDV0, 8,
BDV1, 8,
//BCV1, 16,
BCX0, 8,
BCX1, 8,
BST, 4,
Offset (0x9B),
//BATE, 16,
ATE0, 8,
ATE1, 8,
//BPR, 16,
BPR0, 8,
BPR1, 8,
//BCR, 16,
BCR0, 8,
BCR1, 8,
//BRC, 16,
BRC0, 8,
BRC1, 8,
//BCC, 16,
BCC0, 8,
BCC1, 8,
//BPV, 16,
BPV0, 8,
BPV1, 8,
//BCV2, 16,
BCA0, 8,
BCA1, 8,
//BCV3, 16,
BCB0, 8,
BCB1, 8,
//BCV4, 16,
BCP0, 8,
BCP1, 8,
BCW, 16,
//BATF, 16,
ATF0, 8,
ATF1, 8,
BCL, 16,
//MAXC, 16,
AXC0, 8,
AXC1, 8,
BCG1, 8,
BT1I, 1,
BT2I, 1,
, 2,
BATN, 4,
//BSTS, 16,
BST0, 8,
BST1, 8,
BCG2, 8,
Offset (0xBD),
BMO, 8,
Offset (0xBF),
BRCV, 8,
Offset (0xC1),
BIF, 8,
BRCC, 8,
Offset (0xC4),
CPSN, 8,
SCPS, 8,
Offset (0xC9),
//BSN, 16,
BSN0, 8,
BSN1, 8,
//BDAT, 16,
BDA0, 8,
BDA1, 8,
BMF, 8,
Offset (0xCF),
CTLB, 8,
Offset (0xD1),
BTY, 8,
Offset (0xD5),
MFAC, 8,
CFAN, 8,
PFAN, 8,
OCPS, 8,
OCPR, 8,
OCPE, 8,
TMP1, 8,
TMP2, 8,
NABT, 4,
BCM, 4,
CCBQ, 16,
//CBT, 16,
CBT0, 8,
CBT1, 8,
Offset (0xE3),
OST, 4,
Offset (0xE4),
Offset (0xE5),
TPTE, 1,
TBBN, 1,
, 3,
TP, 1,
Offset (0xE6),
SHK, 8,
AUDS, 1,
SPKR, 1,
Offset (0xE8),
HSEN, 4,
HSST, 4,
Offset (0xEA),
, 2,
WWP, 1,
WLP, 1,
, 1,
WWS3, 1,
WLS3, 1,
Offset (0xEC),
, 4,
PTEN, 1,
ERWB, 1,
, 1,
Offset (0xED),
Offset (0xEF),
INCH, 2,
IDIS, 2,
INAC, 1,
Offset (0xF6),
AAPI, 8,
ACSE, 8,
ACIX, 8,
//ACPR, 16,
ACP0, 8,
ACP1, 8,
Offset (0xFD),
Offset (0xFF)
}
Code:
{
PMCD, 32,
S0FL, 8,
SXF0, 8,
SXF1, 8,
CPWR, 16,
CVLT, 16,
CCUR, 16,
DIDX, 8,
CIDX, 8,
PMCC, 8,
PMEP, 8,
Offset (0x22),
CRZN, 8,
THTA, 8,
HYST, 8,
CRIT, 8,
TEMP, 8,
TENA, 8,
Offset (0x29),
TOAD, 8,
PHTP, 8,
THEM, 8,
TMPO, 8,
AFAN, 8,
FRDC, 8,
FTGC, 8,
PLTP, 8,
Offset (0x32),
DTMP, 8,
Offset (0x35),
FR2C, 8,
FT2C, 8,
BCVD, 8,
Offset (0x40),
ABDI, 8,
ABAD, 8,
ABIX, 8,
ABDA, 8,
ABST, 8,
PORI, 8,
Offset (0x4C),
PSSB, 8,
Offset (0x5E),
PPST, 8,
PPVP, 8,
UCHC, 8,
UCHS, 8,
UCDB, 8,
UCCS, 8,
UCPN, 8,
Offset (0x70),
WKTR, 16,
S5TR, 16,
AS4F, 8,
Offset (0x78),
, 7,
BCML, 1,
BRIM, 1,
, 1,
LPMS, 1,
, 1,
EXTP, 1,
BKDT, 1,
BOTP, 1,
Offset (0x80),
Offset (0x81),
, 4,
SLPT, 4,
FNSW, 1,
SFNC, 1,
ACPI, 1,
, 1,
, 1,
, 1,
, 1,
DETF, 1,
LIDS, 1,
TBLT, 1,
, 1,
, 1,
, 1,
COMM, 1,
PME, 1,
SBVD, 1,
ADP, 1,
ADID, 2,
LCTV, 1,
BATP, 4,
BPU, 1,
Offset (0x86),
BSEL, 4,
Offset (0x87),
LB1, 8,
LB2, 8,
BDC, 16,
Offset (0x8D),
BFC, 16,
BRTE, 16,
BTC, 1,
Offset (0x92),
BME, 16,
BDN, 8,
BDV, 16,
BCV1, 16,
BST, 4,
Offset (0x9B),
BATE, 16,
BPR, 16,
BCR, 16,
BRC, 16,
BCC, 16,
BPV, 16,
BCV2, 16,
BCV3, 16,
BCV4, 16,
BCW, 16,
BATF, 16,
BCL, 16,
MAXC, 16,
BCG1, 8,
BT1I, 1,
BT2I, 1,
, 2,
BATN, 4,
BSTS, 16,
BCG2, 8,
Offset (0xBD),
BMO, 8,
Offset (0xBF),
BRCV, 8,
Offset (0xC1),
BIF, 8,
BRCC, 8,
Offset (0xC4),
CPSN, 8,
SCPS, 8,
Offset (0xC9),
BSN, 16,
BDAT, 16,
BMF, 8,
Offset (0xCF),
CTLB, 8,
Offset (0xD1),
BTY, 8,
Offset (0xD5),
MFAC, 8,
CFAN, 8,
PFAN, 8,
OCPS, 8,
OCPR, 8,
OCPE, 8,
TMP1, 8,
TMP2, 8,
NABT, 4,
BCM, 4,
CCBQ, 16,
CBT, 16,
Offset (0xE3),
OST, 4,
Offset (0xE4),
Offset (0xE5),
TPTE, 1,
TBBN, 1,
, 3,
TP, 1,
Offset (0xE6),
SHK, 8,
AUDS, 1,
SPKR, 1,
Offset (0xE8),
HSEN, 4,
HSST, 4,
Offset (0xEA),
, 2,
WWP, 1,
WLP, 1,
, 1,
WWS3, 1,
WLS3, 1,
Offset (0xEC),
, 4,
PTEN, 1,
ERWB, 1,
, 1,
Offset (0xED),
Offset (0xEF),
INCH, 2,
IDIS, 2,
INAC, 1,
Offset (0xF6),
AAPI, 8,
ACSE, 8,
ACIX, 8,
ACPR, 16,
Offset (0xFD),
Offset (0xFF)
}RehabMan
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Not sure why you think you need to "set the offset right".
By replacing 16-bit fields with two 8-bit fields, the offset of the following fields are the same as original.
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Oh okay, I thought it is always necessary when i split fields which are bigger than 8-bit. Thanks for the explanation.
RehabMan
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Consider:
Code:
Field(...)
{
Offset(2), // just to set a fixed offset for this example
FOO, 16,
BAR, 8, // is at offset 4 (2+16/8=4)
}And if we split FOO:
Code:
Field(...)
{
Offset(2), // just to set a fixed offset for this example
FOO1, 8, FOO2, 8,
BAR, 8, // is *still* at offset 4 (2+8/8+8/8=4)
}
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Hi! I have a problem with a patch for battery status. In Sierra the patch for Asus-N55SL/Vivobook worked perfectly fine for my Asus n552vw(I even was the one that reported that it worked for this machine), but in High Sierra it doesn't work anymore. Any ideas? Attached everything as zip as requested. Thanks in advance!
RehabMan
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You forgot to install ACPIBatteryManager.kext. Read post #1.
And...
Your kextcache output proves kexts are not installed correctly.
All kexts you need must be installed to the system volume.
Read post #2 of the Clover guide for details:
https://www.tonymacx86.com/threads/guide-booting-the-os-x-installer-on-laptops-with-clover.148093/