Contribute
Register

[GUIDE] Extract and Edit SSDT

Status
Not open for further replies.
Joined
Feb 26, 2011
Messages
365
CPU
i7 2600K @ 4.8ghz
Graphics
560 Ti
Mac
  1. MacBook Air
Classic Mac
  1. PowerBook
Mobile Phone
  1. iOS
titsmgee said:
philz said:
Titsmgee,

Thanks for the guide (never noticed the SSDT button in Aida64, though ubuntu was 3 SSDT's rather than 6 from Aida64...). Good to have clear info on this!

Regardless, mind taking a look at mine, it makes no sense compared to every SSDT.aml I've seen on this board, it's almost as if it's malformed to begin with? The P-States are only defined for CPU0 in SSDT2 but it seemingly has other definitions shoved in the middle of it and not in any order at all.

I know it takes a lot of time–not looking for edits per-say just what the heck to do lol. Seriously it's a strange SSDT!

your SSDT 2 has the PSS section in it with all your stepping information and that is really all you need to worry about in most cases

EDIT: i should not say ALL your stepping information because you are missing a few p-states such as 1700. so the section does need to be patched but i would work with that one for sure

But isn't the SSDT not formed right? as the PSS is smack in middle of another section, I'll go ahead and edit if you think it's kosher then... Just never seen an SSDT like this.
 

dta

Joined
May 6, 2012
Messages
121
Motherboard
MSI Z77A-G43
CPU
Core i7 3770K
Graphics
Intel HD4000
Mac
  1. MacBook Pro
Classic Mac
Mobile Phone
  1. iOS
Why aren't you using DSDT editor in your guide to extract the DSDT? I did this and it's working perfectly fine. Is there any disadvantage over using AIDA or board tools in linux?
 
Joined
May 17, 2011
Messages
519
Motherboard
GIGABYTE GA-Z68X-UD3P Rev1.3 (F7)
CPU
i5-2500K OC 4.2GHz
Graphics
HD 6850
Mac
  1. MacBook Pro
Mobile Phone
  1. iOS
I never tried extracting using OSX, simply because have not heard anything but problems from people who have. That being said it is still a viable choice.
 
Joined
Nov 10, 2011
Messages
152
Motherboard
CustoMac HTPC
CPU
i3 2105
Graphics
HD 3000
Mac
  1. MacBook Pro
Classic Mac
Mobile Phone
Just wanted to make sure this is right. Still get compilation errors after changing Return Zero to "Return (Package (Zero) {})" Can someone give a quick look at this? It's from 16-42 for each core. Thanks in advance.
 

Attachments

  • SSDT.aml
    6.9 KB · Views: 238
Joined
May 17, 2011
Messages
519
Motherboard
GIGABYTE GA-Z68X-UD3P Rev1.3 (F7)
CPU
i5-2500K OC 4.2GHz
Graphics
HD 6850
Mac
  1. MacBook Pro
Mobile Phone
  1. iOS
@ Shakin_Handz
So you don't have any errors per se, just a warning about the CST section. I have the same warning in mine and it works fine without it. I use OSX to generate the C-States anyways using the following in my boot.plist
<key>GenerateCStates</key>
<string>Yes</string>

Also your SSDT actually goes to 4.3 fyi
 
Joined
Aug 2, 2011
Messages
42
Motherboard
Supermicro X10SAT, 32GB Crucial ECC 1600, TC Electronic Impact Twin
CPU
Xeon E3-1275 V3
Graphics
eVGA GTX 680 4GB reference
Mac
Classic Mac
  1. PowerBook
Mobile Phone
  1. Android
I have exactly the same problem and nearly the same file as FishCow.

It gives 8 errors that I have no idea what to do with.
There is one error for every virtual core that is exactly the same:

16 Error syntax error, unexpected PARSEOP_ARG0
16 Warning Statement is unreachable

Code:
DefinitionBlock ("ssdt.aml", "SSDT", 1, "AMICPU", "PROC", 0x00000001)
{
    External (\_PR_.OSC_, IntObj)
    External (\_PR_.PDC_, MethodObj)    // 1 Arguments
    Scope (\_PR)
    {
        Processor (P000, 0x01, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P001, 0x02, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P002, 0x03, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P003, 0x04, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P004, 0x05, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P005, 0x06, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P006, 0x07, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
        Processor (P007, 0x08, 0x00000410, 0x06)
        {
            Method (_PDC, 1, NotSerialized)
            {
                \_PR.PDC (Arg0)
            }
            Method (_OSC, 4, NotSerialized)
            {
                Return (\_PR.OSC)
                Arg0
                Arg1
                Arg2
                Arg3
            }
        }
    }
}
 
Joined
Sep 11, 2010
Messages
49
Motherboard
ASUS P8Z68V-LE | Sony VAIO Pro 13 (SVP13213CGB)
CPU
Core i5-2500K | Intel® Core™ i5-4200U Processor
Graphics
ASUS AMD R9 390 STRIX 8GB | Intel® HD Graphics 4400
Mac
Classic Mac
Mobile Phone
Bump./

I'm not sure what to do.. I get 6 options in Aida and you said to use SSDT1 (I'm assuming that's the second option on the list in Aida?) I get a table but it's all empty. It has all the methods and stuff but there's no real meat in the file. All the other files don't contain PSS or w/e we're looking for. What do I do?
 
Joined
Sep 11, 2010
Messages
49
Motherboard
ASUS P8Z68V-LE | Sony VAIO Pro 13 (SVP13213CGB)
CPU
Core i5-2500K | Intel® Core™ i5-4200U Processor
Graphics
ASUS AMD R9 390 STRIX 8GB | Intel® HD Graphics 4400
Mac
Classic Mac
Mobile Phone
Joined
Feb 24, 2012
Messages
124
Motherboard
EVGA Z68FTW
CPU
i7 2600K
Graphics
EVGA GTX 590 Classified
Mac
  1. MacBook Air
Classic Mac
Mobile Phone
  1. iOS
Like Fishcow and WitchButter, I too am having problems with Compiling the SSDT extracted via AIDA64 method. My SSDT looks similar if not exactly the same as WitchButter. My DSDT seems to contain the SSDT information under Scope_PR. I'm new to all this thus not sure what to make of all this.

Currently I can boot Mountain Lion 10.8.1 without any KP, however P-States and perhaps C-States does not work.

I've attached the SSDT extracted from my system along with an Screen Image of the Compile Error/Warning window.

Hope someone can help.

Thanks in advance.
 

Attachments

  • acpi_ssdt.aml
    470 bytes · Views: 216
  • SSDT Compile Errors and Warnings.tiff
    81.7 KB · Views: 304
Status
Not open for further replies.
Top