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[Guide] Creating a Custom SSDT for USBInjectAll.kext

well, thanks. that was my idea. but, searching, I don't find any other patch ..

High Sierra 10.13.6:
  • Name*: com.apple.driver.usb.AppleUSBXHCI
  • Find* [HEX]: 837D880F 0F83A704 0000
  • Replace* [HEX]: 837D880F 90909090 9090
  • Comment: USB 10.13.6+ by PMHeart

any ideas? I even tried to use -uia_exclude_ss and then -uia_exclude_hs to override usb limit patch

UPDATE: patch are good. maybe I need patch and other kext? like Mojave com.apple.iokit.IOUSBHostFamily or High Sierra 10.3.4 AppleUSBXHCIPCI
 

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well, thanks. that was my idea. but, searching, I don't find any other patch ..

High Sierra 10.13.6:
  • Name*: com.apple.driver.usb.AppleUSBXHCI
  • Find* [HEX]: 837D880F 0F83A704 0000
  • Replace* [HEX]: 837D880F 90909090 9090
  • Comment: USB 10.13.6+ by PMHeart

any ideas? I even tried to use -uia_exclude_ss and then -uia_exclude_hs to override usb limit patch

UPDATE: patch are good. maybe I need patch and other kext? like Mojave com.apple.iokit.IOUSBHostFamily or High Sierra 10.3.4 AppleUSBXHCIPCI

Okay.

It might depend on which Security Update you have installed. Currently we are at 2019-006. This is probably the reason. I am not aware that anyone has discovered a new PLRP for this upgrade.

However you can still create your SSDT without being able to see the USB3 ports, just try making the SS address 0x10 ports higher than its HS equivalent, so HS01 might be 01, 00, 00, 00 then try the SS01 port at 11, 00, 00, 00 etc.

Most of the big Intel chipsets did this. Some of the older, less powerful chips were only 0x08 ports higher.

:)
 
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Okay.

It might depend on which Security Update you have installed. Currently we are at 2019-006. This is probably the reason. I am not aware that anyone has discovered a new PLRP for this upgrade.

However you can still create your SSDT without being able to see the USB3 ports, just try making the SS address 0x10 ports higher than its HS equivalent, so HS01 might be 01, 00, 00, 00 then try the SS01 port at 11, 00, 00, 00 etc.

Most of the big Intel chipsets did this. Some of the older, less powerful chips were only 0x08 ports higher.

:)
thanks for this tip) I will try

yes, I am on 2019-006

okay, i found one USB3 working (after i did sort of ssdt). I disabled all unused HS ports and first SS port only.
so, only port 6 SS are working as USB3 speed 5Gb
HS10 0A = SS06 15

whats your idea about that)
 

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thanks for this tip) I will try

okay, i found one USB3 working (after i did sort of ssdt). I disabled all unused HS ports and first SS port only.
so, only port 6 SS are working as USB3 speed 5Gb
HS10 0A = SS06 15

whats your idea about that)

Yes 6x USB3 ports is correct. The Intel X99 chipset has 6x USB3 ports and ASRock has put 4x on the back-panel and 2x on an internal header. So that looks okay - not sure where SS01 is though.

(Incidentally, PR11 & PR21 will be "hubs" hanging on the EH01 & EH02 controllers).

:)
 
Yes 6x USB3 ports is correct. The Intel X99 chipset has 6x USB3 ports and ASRock has put 4x on the back-panel and 2x on an internal header. So that looks okay - not sure where SS01 is though.

:)
SS01 i omitted intentionally to test and to be in maximum 15 port range
 

hi, i am back on track and I need some help, don't have success with that. are you available?
i am unable to patch usb limits with clover and I am unable to trace all corresponding all xhc ports

at the moment I am on 17G9016
USB settings- USB Controller -Enabled/ Intel USB 3.0 Mode -Auto/ Legacy USB Support - Enabled/ Legacy USB3 Support -Enabled/ USB Compatibility Patch -Disabled.
Using latest USBInjectAll and x99_XHC kexts
 
hi, i am back on track and I need some help, don't have success with that. are you available?
i am unable to patch usb limits with clover and I am unable to trace all corresponding all xhc ports

at the moment I am on 17G9016
USB settings- USB Controller -Enabled/ Intel USB 3.0 Mode -Auto/ Legacy USB Support - Enabled/ Legacy USB3 Support -Enabled/ USB Compatibility Patch -Disabled.
Using latest USBInjectAll and x99_XHC kexts

@blackmailswitch. Just a general forum tip for you as it appears you're trying to get @UtterDisbelief's attention. To do so (for pretty much anyone on the forums here), type the @ symbol and then start typing their username (without a space) to bring up someone in particular that you are trying to contact or have read your post/reply. This will then bring up a small pop-up menu with either that person's name or a list of them - if you can't remember the exact spelling of it. They should then get a notification that you're trying to contact them, instead of just trusting that they'll check the forums for your comment. It is a pretty busy site, after all.
 
hi, i am back on track and I need some help, don't have success with that. are you available?
i am unable to patch usb limits with clover and I am unable to trace all corresponding all xhc ports

at the moment I am on 17G9016
USB settings- USB Controller -Enabled/ Intel USB 3.0 Mode -Auto/ Legacy USB Support - Enabled/ Legacy USB3 Support -Enabled/ USB Compatibility Patch -Disabled.
Using latest USBInjectAll and x99_XHC kexts

Hi there.

Way back at the beginning of this thread @RehabMan explains how to include or exclude certain ports so you can complete your port discovery - even without a port-limit patch in place.

Unfortunately the PLR-Patches often become broken with each new Security Update to High Sierra. And because most developers have moved on to Mojave and Catalina, the new versions of High Sierra, because that's what they become, get ignored. However if the PLR-Patches aren't working you can still work around it.

@RehabMan explains you can exclude all HS ports, except your keyboard and mouse ones, so the SS ports show up in IORegistryExplorer. I won't repeat that here, it's all back in post #1. There is another way too, that should work for an X99. See my earlier post.

Remember too that Hackintool was not available back when the guide was written and it has a few idiosyncrasies in operation. Mixing the two can cause confusion.

A few tips:

1) Your X99 chipset has both XHCI and EHCI controllers. The USB3.0 ports are attached to the XHCI and the USB2.0 attached to 2x EHCI controllers.

2) The ASRock motherboard you have implements 6x USB3.0 ports and 8x USB2.0 (the X99 itself actually supports 14x USB2.0). This means that the USB3.0 ports are on the XHCI and the USB2.0 divided between the two EHCI controllers, 4x on each.

3) I don't see a reason you might use the FakePCIID_XHCIMux.kext so if you have installed it, remove it and rebuild kext-caches.

4) You should have HS01 to HS14 even though your motherboard doesn't make any available after HS08, and SS01 to SS06, plus maybe a couple of other ports with USR names.

Other than that I don't have enough information on your system to be more specific. Perhaps consider uploading a IOReg export file and list of installed kexts in EFI and L/E. Your choice.

:)
 
Please assist, have done the mapping correctly and applied the SSDT-UIAC.aml patch.

Rebooting still shows all the ports like my boot flag is still set to -uia_ignore_rmcf. I have removed the boot flag, but all ports including the ones NOT used are still listed both in IORegistryExplorer and Hackintool.

Why is that ?
 

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*Solved at #3150
Opencore so I'm not using the debug packer, hope the dropbox link below covers all.

If I use USB Mapping, USB3 ports are sporadic, the devices will show up in HS at USB2.0 speeds but not always in the SS pair, replugging solves it, and if I replug again, it's a toss whether it will show up in HS or SS. If I have a monitor hub plugged in, the computer wakes immediately from sleep. With injectall and basic limit removal, they are working correctly.

Here is what I run into with just a vanilla usbinjectall + limit removal, I don't understand why the IOSUBHostDevice(monitor hub, usb3.0) doubles up on ss07. See below for mapping questions
Screen Shot 2020-01-05 at 1.53.53 AM.png


Here(click for dropbox link) is my OpenCore EFI and DSDT dump

When I used USPMap.py it made a SSDT-UIAC with a EH01 to accomodate legacy hub for some reason so I reverted to manual and double checked via hackintool. Here's what it wanted me to put in.


Code:
DefinitionBlock ("", "SSDT", 2, "hack", "_UIAC", 0x00000000)
{
    Device (UIAC)
    {
        Name (_HID, "UIA00000")  // _HID: Hardware ID
        Name (RMCF, Package (0x04)
        {
            "EH01",
            Package (0x04)
            {
                "port-count",
                Buffer (0x04)
                {
                     0x01, 0x00, 0x00, 0x00                      
                },

                "ports",
                Package (0x02)
                {
                    "SS07",
                    Package (0x04)
                    {
                        "UsbConnector",
                        Zero,
                        "port",
                        Buffer (0x04)
                        {
                             0x01, 0x00, 0x00, 0x00                      
                        }
                    }
                }
            },

            "8086_a2af",
            Package (0x04)
            {
                "port-count",
                Buffer (0x04)
                {
                     0x10, 0x00, 0x00, 0x00                      
                },

                "ports",
                Package (0x1E)
                {
                    "HS03",
                    Package (0x04)
                    {
                        "UsbConnector",
                        0x03,


If I do this, EC shows up with power management
Code:
DefinitionBlock ("", "SSDT", 2, "APPLE ", "SsdtEC", 0x00001000)
{
    External (_SB_.PCI0.LPCB, DeviceObj)    // (from opcode)

    Scope (\_SB.PCI0.LPCB)
    {
        Device (EC)
        {
            Name (_HID, "ACID0001")  // _HID: Hardware ID
            Method (_STA, 0, NotSerialized)  // _STA: Status
            {
                If (_OSI ("Darwin"))
                {
                    Return (0x0F)
                }
                Else
                {
                    Return (Zero)
                }
            }
        }
    }
}
 
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