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[Guide] Creating a Custom SSDT for USBInjectAll.kext

Joined
Nov 11, 2019
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Intel C602
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Hi,@RehabMan! I need you help...

I have a motherboard with an Intel C602 chipset. I use CLOVER and Mojave 10.14.6. If the device is connected to the USB 3.0 port, then when you turn off the computer, it turns on again after 3 seconds. Your help is very necessary. This problem is not related to the motherboard, since there are no problems when shutting down Windows 10. Thank! Sorry for my English..plz help...
 

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working to follow post 1, I have intel 1e31 but after I cut the ssdt so its just that id, it does not match
whats showing in ioreg. ioreg shows SSP06 for the USB3 device but the ssdt does not have that. It's
SS01 through 04. What did I miss in the post?

On 10.14.6 Used the limit patch in config for 10,14. Maybe this device doesnt need it? Or Mojave changed
and it doesn't work?

Edit

Just let it inject the ssdt as it was then I could get the SS part. Ended up as SS02 and was able to finish the ssdt. Just disabled limit patch and got ports needed showing up.
 
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hi to all brave people)
who could make some light?
High Sierra 10.3.6
-installed USBInjectAll.kext + UnsupportedXHC.kext
-clover usb limit patch 10.3.6
now with IORegistryExplorer or with Hackintool I write down all used ports... but I have problem detecting all SS USB3 ports... not all USB3 ports are visible I think, when I insert USB3 I don't have any feedback
best regards
 

UtterDisbelief

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hi to all brave people)
who could make some light?
High Sierra 10.3.6
-installed USBInjectAll.kext + UnsupportedXHC.kext
-clover usb limit patch 10.3.6
now with IORegistryExplorer or with Hackintool I write down all used ports... but I have problem detecting all SS USB3 ports... not all USB3 ports are visible I think, when I insert USB3 I don't have any feedback
best regards
Hello.

That sounds as though your port-limit removal patch is not working. Double-check the one you are using. :thumbup:
 
Joined
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Messages
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Motherboard
Asrock x99m Extreme 4
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i7-6800K
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Gigabyte GTX960 GV-N960IXOC-2GD
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well, thanks. that was my idea. but, searching, I don't find any other patch ..

High Sierra 10.13.6:
  • Name*: com.apple.driver.usb.AppleUSBXHCI
  • Find* [HEX]: 837D880F 0F83A704 0000
  • Replace* [HEX]: 837D880F 90909090 9090
  • Comment: USB 10.13.6+ by PMHeart

any ideas? I even tried to use -uia_exclude_ss and then -uia_exclude_hs to override usb limit patch

UPDATE: patch are good. maybe I need patch and other kext? like Mojave com.apple.iokit.IOUSBHostFamily or High Sierra 10.3.4 AppleUSBXHCIPCI
 

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UtterDisbelief

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well, thanks. that was my idea. but, searching, I don't find any other patch ..

High Sierra 10.13.6:
  • Name*: com.apple.driver.usb.AppleUSBXHCI
  • Find* [HEX]: 837D880F 0F83A704 0000
  • Replace* [HEX]: 837D880F 90909090 9090
  • Comment: USB 10.13.6+ by PMHeart

any ideas? I even tried to use -uia_exclude_ss and then -uia_exclude_hs to override usb limit patch

UPDATE: patch are good. maybe I need patch and other kext? like Mojave com.apple.iokit.IOUSBHostFamily or High Sierra 10.3.4 AppleUSBXHCIPCI
Okay.

It might depend on which Security Update you have installed. Currently we are at 2019-006. This is probably the reason. I am not aware that anyone has discovered a new PLRP for this upgrade.

However you can still create your SSDT without being able to see the USB3 ports, just try making the SS address 0x10 ports higher than its HS equivalent, so HS01 might be 01, 00, 00, 00 then try the SS01 port at 11, 00, 00, 00 etc.

Most of the big Intel chipsets did this. Some of the older, less powerful chips were only 0x08 ports higher.

:)
 
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Okay.

It might depend on which Security Update you have installed. Currently we are at 2019-006. This is probably the reason. I am not aware that anyone has discovered a new PLRP for this upgrade.

However you can still create your SSDT without being able to see the USB3 ports, just try making the SS address 0x10 ports higher than its HS equivalent, so HS01 might be 01, 00, 00, 00 then try the SS01 port at 11, 00, 00, 00 etc.

Most of the big Intel chipsets did this. Some of the older, less powerful chips were only 0x08 ports higher.

:)
thanks for this tip) I will try

yes, I am on 2019-006

okay, i found one USB3 working (after i did sort of ssdt). I disabled all unused HS ports and first SS port only.
so, only port 6 SS are working as USB3 speed 5Gb
HS10 0A = SS06 15

whats your idea about that)
 

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UtterDisbelief

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thanks for this tip) I will try

okay, i found one USB3 working (after i did sort of ssdt). I disabled all unused HS ports and first SS port only.
so, only port 6 SS are working as USB3 speed 5Gb
HS10 0A = SS06 15

whats your idea about that)
Yes 6x USB3 ports is correct. The Intel X99 chipset has 6x USB3 ports and ASRock has put 4x on the back-panel and 2x on an internal header. So that looks okay - not sure where SS01 is though.

(Incidentally, PR11 & PR21 will be "hubs" hanging on the EH01 & EH02 controllers).

:)
 
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Yes 6x USB3 ports is correct. The Intel X99 chipset has 6x USB3 ports and ASRock has put 4x on the back-panel and 2x on an internal header. So that looks okay - not sure where SS01 is though.

:)
SS01 i omitted intentionally to test and to be in maximum 15 port range
 
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