I'll grab a Orico LSDT M.2 NMVe USB 3.2 Gen2x2 enclosure (~USD 35) in about a month and test on my Z490 Vision D front F_U32C header and update here. I'm curious if this will provide better/smoother NVMe performance compared with certain NVMe's via TB3 ? I'll take your advise on the driver.
Maybe. I haven't done any testing. I can get 2822/2800 MB/s read/write using Thunderbolt 3 (Alpine Ridge enclosure) and 1061/1063 MB/s using USB 3.1 gen 2. I expect something like 2000 MB/s for gen 2x2.
I don't think the Z490 Vision D has a gen2x2 port. You need a Z590 or a PCIe card.
I'm curious if Apple Silcon USB4/TB ports actually have the physical support for USB 3.2 Gen 2x2 or Gen4? at 40Gbps since the aggregated 40Gbps lanes obviously already work in Thunderbolt mode ?
Probably no for Gen 2x2.
I think you mean Gen3. Gen1 is 5 Gbps. Gen2 is 10 Gbps. Gen3 is 20 Gbps. USB4 has two lanes like Thunderbolt, so the total can be Gen3x2 = 40 Gbps.
We know M1 does Thunderbolt 41.25 Gbps since you can connect old Thunderbolt 3 devices.
We know M1 supports USB tunnelling because a USB 3.x device connected to a Thunderbolt 4 hub or dock which is connected to an M1 Mac will be controlled by the USB controller of the M1 Mac instead of the USB controller of the Thunderbolt 4 dock. USB tunnelling is limited to the USB speed of the M1 Mac's USB controller.
I don't think I've seen USB tunnelling from Tiger Lake or Maple Ridge but I think they can do it. Someone with those Thunderbolt controllers and a Thunderbolt 4 dock should test that.
We don't know if M1 supports USB4 40 Gbps but Apple says they support USB4 so 40 Gbps should be possible. It's slower than Thunderbolt's 41.25 Gbps. I don't think there exists any USB4 (non-Thunderbolt) devices yet so this is hard to test.
I don't think USB4 has a 40 Gbps non-tunnelling mode. The 40 Gbps (or 20 Gbps for Gen3x1) is for doing combinations of PCIe, DisplayPort, and USB 3.2 tunnelling. USB 3.2 gen 2x2 support (tunnelled or not) is optional.
I don't understand why the Z490 Vision D switches the Type-C to two different 10Mbps ACPI ports SS01 and SS02. Some of the online images/discussions state this Type-C port provides Gen 2 @ 10Mbps one side, and Gen 1 @ 5Mbps flipped the otherside - but my actual tests show 10Mbps flipped both sides to/from different ports.
I guess they cheaped out by not adding a mux to do the lane switching of USB-C to a single port? Instead, they have both sides wired and disable the one with the incorrect orientation?
I'm not sure if there exists a type-E to dual Type-C Gen 2 to test this ?
That would be interesting. Type-E to dual Type-A might be doable so you could use SS01 and SS02 at the same time but they would need to share HS01. Type-E to dual Type-C would require a couple USB-C mux and more power. But what's the point of trying to get another USB 3.x port if you're already running against the macOS 15 port limit? This probably can't work anyway, since there's probably some orientation detection that disables one of the ports.
On the Z590 Vision D this Type-E port provides Gen2x2 20Gbps from the Z590 PCH.
I understood Gen 2x2 is actually 2 x USB 3.2 Gen 2 10Gbps lanes working together to give 20Gbps ?
Yes. Two lanes. That's why Gen2x2 can't work with Type A - because Type A only has one lane.
Keen to know your results ?
I'll get around to it one day.
Thank you ! That will be a very useful tool. I tried the script on the Z490 hack and M1 and both returned a single line: "#===========". I understand the script doesn't require any args, but depends on perl. I have Perl 5 installed. Sorry, did I miss something ?
You need pciutils installed to use pcitree.sh. If you can get
lspci
working then the script should work. On the Z490 or any Intel Mac running El Capitan or later, you should have
debug=0x144
in the
boot-args
. There are instructions in the comments section below the gist.
pciutils has not been updated to work on an M1 Mac. It probably needs a new DirectHW.kext with code to support the multiple PCI segments of the M1. The M1 Mac has very few PCI devices. There's one PCI segment for one Thunderbolt port and another segment for the other Thunderbolt port and a third segment for wlan, bluetooth, USB, and ethernet (the latter two only exist on M1 Mac mini and M1 iMac). Three segments means three devices with the same PCI bus:device.function can exist (for example, there are three devices having PCI address 00:00.0). I would like to make a DirectHW.kext that works on PowerPC, Intel, and M1 Macs.