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Gigabyte X299X - Catalina Support

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Jul 10, 2013
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395
Motherboard
Gigabyte X299X Designare 10G
CPU
i9-10900X
Graphics
RX 5500 XT
Mac
  1. iMac
  2. MacBook Pro
  3. Mac Pro
Classic Mac
  1. eMac
  2. iBook
  3. iMac
  4. PowerBook
Mobile Phone
  1. Android
Hello everyone,

As some of you know, I have been lurking around to make the new X299X boards (Gigabyte) work, unsuccessful at it, but trying nevertheless.

On the hardware side these are the specs of the build:

Gigabyte Designare EX 10G
Intel i9 10900X
128GB DDR4 3200 Mhz Crucial Ballistix
1200W BeQuiet! PurePower
PNY 500GB NVMe
And other bits, but the important is here.

Trials have been made with Clover v5100 and Catalina 10.15.2 previously installed, the reason because I have placed a drive with system already installed is simply because as you try to boot clover GUI with a USB drive attached (or any drive) system just reboots without warning o_O.

So in order to be able to get past the "shut down" issue, one must not have anything but the main drive attached (which makes installing in the drive wither impossible or pointless at this stage)

Once we get past this issue, we are presented with the usual clover screen, once you select to boot from a drive, everything looks normal, till you get to this errors.

1-
1.jpg

2-
2.jpg

BIOS configuration has gone from Default, to all sorts of changes, so uploading the setup is a bit pointless, the important bit is related to TB and the error is giving out.

My goal is to be able to create a "not-guide-but-orientation" post for users with Gigabyte boards, since the Asus thread should remain clean and free of other hardware so that anyone can easily find the information they need.

I am going to mention a few users who I know perhaps have some insight in the matter due to having GB boards or are experimenting the same issue @nmano @P1LGRIM @bingoc @Ellybz

I'm hoping we can get to a point where we can get actual working series of the new X299X boards, this will possibly help other users buying other vendors boards.

Hope some brilliant mind can come up with something.

Have a nice weekend guys.

Lets organise this a bit, I will keep updating this guide with whatever comes up.

Notes and remarks: NEWS
1). After much testing, I have discovered that the last two versions of MacproMemoryNotificationDisabler.kext somehow produce an error to the system log (console) and may throw a KP that for some reason relates to RadeonGraphics kext, perhaps the issue is localised for AMD 5000 series GFX but lets not get ahead of ourselves. I have contacted the developer and it seems he pushed the wrong package. He will fix it in the next commit. For now lets use the verison attched and the end of post one, I will update as the new commit comes up and is stable.
To check if your MPMNDisabler.kext is messing around, just open console.app and go to "Crash Reports", you should see MemorySlotNotification @ several instances, one for each boot (if you have a buggy version).

2). For the time being we still need to use the old TSCAdjustReset.kext by @Intereferenc order to correctly sync the TSC on our CPU's, remember to correctly edit the .plist inside the kext (right click, "Show Package Contents" Content/info.plist, open with Xcode or PlistEditor, modify IOKitPersonalities/TSCAdjustReset/IOPropertyMatch/IOCPUNumber to the desired CPU core amount -1, so if you have a 10900X with 20 threads, just remove 1 = 19, if a 10980XE with 36 th remove one = 35 and so on for each CPU), then save and place modified .kext inside C/K/O.

3). I have extracted the firmware of our on board Thunderbolt Titan Ridge in hopes that the same procedure than @CaseySJ and @Elias64Fr have been able to achive on the Designare Z390 in order to edit the Thunderbolt firmware to achieve achive full Thunderbolt BUS like Thunderbolt Networking capabilities (impossible to achieve so far with just a custom SSDT) and better Thunderbolt functionality overall by flashing back the modified firmware can be achieved on our boards.
The procedure requieres the use of an external SPI Programmer and dissasembling most components on motherboard, VRM and Chipset cooling system (both attached by a copper pipe) have to be removed, including (but not yet confirmed since I removed everything for the sake of it) backplate.

@CaseySJ has a set of patched Firmwares already patched here for everyone to use (be warned to use at your own risk). I have successfully flashed my GC Titan Ridge PCIe card and the results are just awesome :thumbup:
Here is what we get now. (this is my AMD build)
Screenshot 2020-03-27 at 12.29.49.png

Screenshot 2020-03-27 at 12.30.13.png

I will update the procedure once this has been tested on our onboard TB controller! Hopefully soon.

4). NEW Lets move onto the final piece of compatibility to make our sistems closer to a real mac than ever before, here I present full Thunderbolt 3 support thanks to the hard work of @CaseySJ and @Elias64Fr with Thunderbolt firmware modding. See new section 6.

5). NEW I'm currently using Open Core as my daily driver and I have to say that I'm very happy with it, so I will be upoloading new EFI files soon with OC (currenlty latest build is 0.5.7 but I have managed to compile 0.5.8 from n-d-k's fork which best works for systems with dual OS like myself.

6). NEW SmallTree has released a new set of drivers compatible with Catalina for our X550 10G ethernet chipset, so I'm planning on modding it and do some test, so expect a .kext update update soon too, perhaps this way we will be able to turn on SIP with OC :) (currently with the modded .kext system is unable to boot).

7). NEW OpenCore EFI added to donwloads at the end of this post.

Section 1: BIOS configuration file on latest BIOS. (currenlty F3c)
Section 2: DSDT boot patches for correct boot and remove "Thunderbolt 255 PCI" error. (RTC patch deprecated, see latest ACPI table and use RTC0 SSDT instead)
Section 3: Onboard 10G dual Intel X550 ethernet, driver and ACPI patching.
Section 4: Preffered SMBIOS and little Thunderbolt address corrections.
Section 5: ACPI Implementation (SSDT).
Section 6: On-board Titan Ridge Thunderbolt 3 firmware modding.

Section 1: Doing pictures of every bit in BIOS is a pain, so why not just upload a working BIOS config file :p ? Just see download section at the bottom of post #1. To load, just boot to BIOS (DEL) and move to Load/Save profile in the last tab of the advanced BIOS section (press F2 to move to andvanced BIOS view).
Be mindful that every build is different, and what works for me, may not work for you, have a look at Intel's ARK site to check your CPU properties and what not.

EDIT: I have found F3c to be more stable under intensive CPU tasks like CinebenchR20 than F3b, perhaps the F3c BIOS description is not all BS. We will see with other BIOS in the future. Still BS, some trouble with consistency and stability, going back to F3b, I'll attach BIOS and config for my specific setup, change as you need!

Section 2: In order to correctly boot, this boards require a DSDT hot patch in .plist ACPI/DSDT Patches section. (I'm not the author of this patch, user ç´«ç±³ from the other forum should be credited for it). Also included all the renames I currently use in check with a real MacPro7,1 SMBIOS, some would require ACPI patching in order to correctly work like _OSI - XOSI rename.
Code:
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE plist PUBLIC "-//Apple//DTD PLIST 1.0//EN" "http://www.apple.com/DTDs/PropertyList-1.0.dtd">
<plist version="1.0">
<dict>
    <key>ACPI</key>
    <dict>
        <key>DSDT</key>
        <dict>
            <key>Patches</key>
            <array>
                <dict>
                    <key>Comment</key>
                    <string>X299X - RTC</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>oAuTU1RBUwo=</data>
                    <key>Replace</key>
                    <data>oAqRCv8L//8=</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>PC00 - PCI0</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>UEMwMA==</data>
                    <key>Replace</key>
                    <data>UENJMA==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>H_EC - EC__</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>SF9FQw==</data>
                    <key>Replace</key>
                    <data>RUNfXw==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>_OSI - XOSI</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>X09TSQ==</data>
                    <key>Replace</key>
                    <data>WE9TSQ==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>IDER - MEID</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>SURFUg==</data>
                    <key>Replace</key>
                    <data>TUVJRA==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>LPC0 - LPCB</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>TFBDMA==</data>
                    <key>Replace</key>
                    <data>TFBDQg==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>FPU_ - MATH</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>RlBVXw==</data>
                    <key>Replace</key>
                    <data>TUFUSA==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>TMR_ - TIMR</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>VE1SXw==</data>
                    <key>Replace</key>
                    <data>VElNUg==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>SPIC - XSPI</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>U1BJQw==</data>
                    <key>Replace</key>
                    <data>WFNQSQ==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>PIC_ - IPIC</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>UElDXw==</data>
                    <key>Replace</key>
                    <data>SVBJQw==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>SMBS._ADR - XSBU.XADR</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>U01CUwhfQURS</data>
                    <key>Replace</key>
                    <data>WFNCVQhYQURS</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>_DSM - XDSM</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>X0RTTQ==</data>
                    <key>Replace</key>
                    <data>WERTTQ==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>PMC1 - PMCR</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>UE1DMQ==</data>
                    <key>Replace</key>
                    <data>UE1DUg==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>AWAC - ARTC</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>QVdBQw==</data>
                    <key>Replace</key>
                    <data>QVJUQw==</data>
                </dict>
                <dict>
                    <key>Comment</key>
                    <string>IOTR - LDRC</string>
                    <key>Disabled</key>
                    <false/>
                    <key>Find</key>
                    <data>SU9UUg==</data>
                    <key>Replace</key>
                    <data>TERSQw==</data>
                </dict>
            </array>
        </dict>
    </dict>
</dict>
</plist>
Moving forward, we are currently awaiting for SmallTree to release a set of drivers that are compatible with 10.15 in order to get the two X550T 10Gb Ethernet ports working, I will update asap on this matter!

Section 3: (Deprecated) So far no SmallTree drivers released for us to use with our X550T, but I must say that the usual method of swapping SubsystemID in Ubuntu is currently not working, ethtool does nothing when used with the correct patch, thus the only approach is as @AlBeast pointed out to me, using a combo of FakePCIID_Intel_GbX.kext, FakePCIID.kext and SmallTreeIntel8259x.kext in EFI partition.

I have updated SmallTree driver to the latest version downloadable from SmallTree site and removed all other ID's from FakePCIID_Intel_GbX.kext just to match these of the X550T that we need for our boards (there might be a slight gain by placing SmallTree.kext in C/K/15 and the rest of .kext in C/K/O (boot priorities) not proven entirely tho).

Here is the ACPI table to be used:
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGN10G", 0x00000000)
{
    External (_SB_.PCI0.RP21, DeviceObj)
    External (_SB_.PCI0.RP21.PXSX, DeviceObj)
    External (DTGP, MethodObj)

    Scope (_SB.PCI0.RP21)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Device (XGBE)
        {
            Name (_ADR, One)
            Method (_DSM, 4, NotSerialized)
            {
                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Intel X550T 10G Ethernet 2"
                        },

                        "name",
                        Buffer ()
                        {
                            "Intel(R) X550T Ethernet Controller"
                        },

                        "location",
                        Buffer ()
                        {
                            "2"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }

        Device (XGBF)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Intel X550T 10G Ethernet 1"
                        },

                        "name",
                        Buffer ()
                        {
                            "Intel(R) X550T Ethernet Controller"
                        },

                        "location",
                        Buffer ()
                        {
                            "1"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }
}

Not as fast as we would expect but not bad.
Screenshot 2020-01-30 at 10.00.42.png

This is on a 5 HDD's RAID on a 10G Qnap NAS over a Cat8e cable.

This is the code I used in Ubuntu, if anyone wants to give it a try:
Code:
sudo ethtool -E enp2s0f0 magic 0x15638086 offset 0x242 value 0x0a
sudo ethtool -E enp2s0f0 magic 0x15638086 offset 0x243 value 0x00

sudo ethtool -E enp2s0f1 magic 0x15638086 offset 0x242 value 0x0a
sudo ethtool -E enp2s0f1 magic 0x15638086 offset 0x243 value 0x00

Section 3.2: No need to use multiple kext to load the two Intel X550T 10GbE ports! Please find in attachments a modified version of the latest SmallTreeIntel8259x.kext to work with our cards :). Remove all other kexts from C/K/O and install the modified version under /L/E using KextBeast or Hackintool, then rebuild kext cache with terminal command, KextUtility or Hackintool.
Code:
sudo kextcache -i /
Slightly better results with SmallTree kext in correct location.
Screenshot 2020-01-31 at 12.42.06.png

Section 4: in order to achieve most device compatibility and full TB functionality I had to move to MacPro7,1 SMBIOS. Changes have been subtle but the functionality of the board has started to shine.

Both TB ports work HP on cold boot and recognize devices attached prior to boot (previously I suffered from KP every time I connected my UAD Apollo 8X on HP or even from cold boot, to which I found that setting "Boot from thunderbolt devices" in BIOS to enable solved the issue, but rendered the machine without proper HP functionality), so I had to come up with some changes. A new SSDT with implementations from a realo MacPro7,1 Dump and few BIOS changes has made this machine so far to be stable with TB devices, HP cold boot, you name it :thumbup:.

Obviously there are certain "cosmetic" things to improve in order to have a clean "PCI list section" in about this mac.
Add this to your .plist device properties.
Code:
<key>Properties</key>
        <dict>
            <key>PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)</key>
            <dict>
                <key>AAPL,slot-name</key>
                <string>Thunderbolt</string>
                <key>device_type</key>
                <string>Thunderbolt</string>
                <key>model</key>
                <string>Thunderbolt Drive</string>
            </dict>
            <key>PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)</key>
            <dict>
                <key>AAPL,slot-name</key>
                <string>Thunderbolt</string>
            </dict>
            <key>PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)/Pci(0x4,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)/Pci(0x0,0x0)</key>
            <dict>
                <key>AAPL,slot-name</key>
                <string>Thunderbolt</string>
                <key>device_type</key>
                <string>Thunderbolt</string>
                <key>model</key>
                <string>Thunderbolt Drive</string>
            </dict>
            <key>PciRoot(0x0)/Pci(0x1C,0x4)/Pci(0x0,0x0)/Pci(0x4,0x0)/Pci(0x0,0x0)/Pci(0x1,0x0)/Pci(0x0,0x0)</key>
            <dict>
                <key>AAPL,slot-name</key>
                <string>Thunderbolt</string>
            </dict>
        </dict>
The address used is based on my Apollo 8X and a TB drive I have around, perhaps other devices would use different device paths.
Captura de pantalla 2020-02-12 a las 12.00.32.png

For those of you who would like to use the provided Aorus PCIe RAID card I'll also attach the SSDT.

MacPro7,1 SMBIOS has an issue with memory modules, so an annoying message comes up every time you boot, there is MacProMemoryNotificationDisabler.kext, that solves the issue :)

Section 5: Lets share some SSDT for the used devices :).

Graphics: Based on a 5500 XT 8GB, remember to adopt as you need for your specific card. 5000 series are much similar to VEGA than Polaris, this there is some "extra devices" (EGP0 and EGP1) that did not appear in previous builds, also there is no "LCD" device in device tree of SMBIOS MacPro7,1, that must be esclusive to devices with Internal display like all iMac.
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGNEX", 0x00000000)
{
    External (_SB_.PC02.BR2A, DeviceObj)
    External (_SB_.PC02.BR2A.PEGP, DeviceObj)
    External (_SB_.PC02.BR2A.SL05, DeviceObj)
    External (_SB_.PNLF.BSET, MethodObj)
    External (BRTL, IntObj)
    External (DTGP, MethodObj)
    External (EGPS, IntObj)

    Scope (_SB.PC02.BR2A)
    {
        Scope (SL05)
        {
            Name (_STA, Zero)
        }

        Scope (PEGP)
        {
            Name (_STA, Zero)
        }

        Device (EGP0)
        {
            Name (_ADR, Zero)
            Method (_STA, 0, NotSerialized)
            {
                Return (One)
            }

            Device (EGP1)
            {
                Name (_ADR, Zero)
                Device (GFX0)
                {
                    Name (_ADR, Zero)
                    Name (ATIB, Buffer (0x0100){})
                    Method (ATIF, 2, Serialized)
                    {
                        If ((Arg0 == Zero))
                        {
                            Return (AF00 ())
                        }

                        If ((Arg0 == One))
                        {
                            Return (AF01 ())
                        }

                        If ((Arg0 == 0x02))
                        {
                            Return (AF02 ())
                        }
                        Else
                        {
                            CreateWordField (ATIB, Zero, SSZE)
                            CreateWordField (ATIB, 0x02, VERN)
                            CreateDWordField (ATIB, 0x04, NMSK)
                            CreateDWordField (ATIB, 0x08, SFUN)
                            SSZE = Zero
                            VERN = Zero
                            NMSK = Zero
                            SFUN = Zero
                            Return (ATIB)
                        }
                    }

                    Method (AF00, 0, NotSerialized)
                    {
                        CreateWordField (ATIB, Zero, SSZE)
                        CreateWordField (ATIB, 0x02, VERN)
                        CreateDWordField (ATIB, 0x04, NMSK)
                        CreateDWordField (ATIB, 0x08, SFUN)
                        SSZE = 0x0C
                        VERN = One
                        NMSK = 0x0C
                        SFUN = 0x03
                        Return (ATIB)
                    }

                    Method (AF01, 0, NotSerialized)
                    {
                        CreateWordField (ATIB, Zero, SSZE)
                        CreateDWordField (ATIB, 0x02, VMSK)
                        CreateDWordField (ATIB, 0x06, FLGS)
                        SSZE = 0x0A
                        VMSK = 0x03
                        FLGS = One
                        Return (ATIB)
                    }

                    Method (AF02, 0, NotSerialized)
                    {
                        CreateWordField (ATIB, Zero, SSZE)
                        CreateDWordField (ATIB, 0x02, PSBI)
                        CreateByteField (ATIB, 0x09, FPWR)
                        CreateByteField (ATIB, 0x0A, FPID)
                        SSZE = 0x0D
                        PSBI = 0x08
                        FPWR = Zero
                        FPID = EGPS
                        Return (ATIB)
                    }

                    Method (_PRW, 0, NotSerialized)
                    {
                        Return (Package (0x02)
                        {
                            0x69,
                            0x03
                        })
                    }

                    OperationRegion (PEGH, PCI_Config, Zero, 0x40)
                    Field (PEGH, ByteAcc, NoLock, Preserve)
                    {
                        VID0,   16,
                        DID0,   16,
                        GCMD,   8,
                        Offset (0x24),
                        BAR4,   32
                    }

                    Method (_DSM, 4, NotSerialized)
                    {
                        Local0 = Package ()
                            {
                                "built-in",
                                Buffer ()
                                {
                                     0x00
                                },

                                "AAPL,slot-name",
                                Buffer ()
                                {
                                    "Slot-1"
                                },
                                                                        
                                "model",
                                Buffer ()
                                {
                                    "AMD Radeon Pro 5500 XT"
                                },
        
                                "name",
                                Buffer ()
                                {
                                    "AMD(R) Radeon Pro Graphics Controller"
                                },

                                "hda-gfx",
                                Buffer ()
                                {
                                    "onboard-1"
                                }
                            }
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }

                    Return (0x80000002)
                }

                Device (HDAU)
                {
                    Name (_ADR, One)
                    OperationRegion (HDAH, PCI_Config, Zero, 0x40)
                    Field (HDAH, ByteAcc, NoLock, Preserve)
                    {
                        VID0,   16,
                        DID0,   16
                    }

                    Method (_DSM, 4, NotSerialized)
                    {
                        Local0 = Package ()
                            {
                                "built-in",
                                Buffer ()
                                {
                                     0x00
                                },

                                "AAPL,slot-name",
                                Buffer ()
                                {
                                    "Slot-1"
                                },

                                "model",
                                Buffer ()
                                {
                                    "AMD Radeon Pro Audio"
                                },

                                "name",
                                Buffer ()
                                {
                                    "AMD(R) Radeon Pro Audio Controller"
                                },

                                "hda-gfx",
                                Buffer ()
                                {
                                    "onboard-1"
                                }
                            }
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }

                    Return (0x80000002)
                }
            }
        }
    }
}

M.2: There are three locations to cover, all use the same method.
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGN10G", 0x00000000)
{
    External (_SB_.PC03.BR3D, DeviceObj)
    External (_SB_.PC03.BR3D.PEGP, DeviceObj)
    External (_SB_.PC03.BR3D.SL0C, DeviceObj)
    External (_SB_.PCI0.RP09, DeviceObj)
    External (_SB_.PCI0.RP09.PXSX, DeviceObj)
    External (_SB_.PCI0.RP17, DeviceObj)
    External (_SB_.PCI0.RP17.PXSX, DeviceObj)
    External (DTGP, MethodObj)

    Scope (\_SB.PC03.BR3D)
    {
        Scope (SL0C)
        {
            Name (_STA, Zero)
        }

        Scope (PEGP)
        {
            Name (_STA, Zero)
        }

        Device (ANS2)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Apple NVMe SSD 2"
                        },

                        "name",
                        Buffer ()
                        {
                            "Apple(R) NVMe SSD Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Scope (\_SB.PCI0.RP09)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Device (ANS1)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Apple NVMe SSD 1"
                        },

                        "name",
                        Buffer ()
                        {
                            "Apple(R) NVMe SSD Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Scope (\_SB.PCI0.RP17)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Device (ANS3)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Apple NVMe SSD 3"
                        },

                        "name",
                        Buffer ()
                        {
                            "Apple(R) NVMe SSD Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }
}

AirPort: In order to use this SSDT you need to have installed a DW1820A which is the module I am using and the one this SSDT was made for, otherwise just ignore and don't use. .kext to use aloing the DW1820A attached at the end of post #1 copy to C/K/O.
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGN10G", 0x00000000)
{
    External (_SB_.PCI0.RP01, DeviceObj)
    External (_SB_.PCI0.RP01.PXSX, DeviceObj)
    External (DTGP, MethodObj)

    Scope (\_SB.PCI0.RP01)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Device (ARPT)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                Local0 = Package ()
                    {
                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "device_type",
                        Buffer ()
                        {
                            "AirPort"
                        },

                        "model",
                        Buffer ()
                        {
                            "AirPort Extreme 802.11ac + Bluetooth"
                        },

                        "name",
                        Buffer ()
                        {
                            "Apple(R) AirPort Extreme 802.11ac + Bluetooth Controller"
                        },

                        "compatible",
                        Buffer ()
                        {
                            "pci14e4,4331"
                        },

                        "pci-aspm-default",
                        Buffer ()
                        {
                            0x00
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }
}

SATA: One of the two chipset is made by ASMedia, which should work just as fine since the OS already includes drivers and simply works.
C++:
DefinitionBlock ("", "SSDT", 1, "ICLONS", "DSGN10G", 0x00000000)
{
    External (_SB_.PCI0, DeviceObj)
    External (_SB_.PCI0.RP02, DeviceObj)
    External (_SB_.PCI0.RP02.PXSX, DeviceObj)
    External (_SB_.PCI0.SAT1, DeviceObj)
    External (DTGP, MethodObj)

    Scope (\_SB.PCI0.RP02)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Device (SAT0)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "ASMedia ASM1062 Serial ATA Chipset"
                        },

                        "name",
                        Buffer ()
                        {
                            "ASMedia(R) ASM1062 SATA AHCI Controller"
                        },

                        "subsystem-id",
                        Buffer ()
                        {
                             0x62, 0x10, 0x00, 0x00
                        },

                        "device-id",
                        Buffer ()
                        {
                             0x12, 0x06, 0x00, 0x00
                        },

                        "subsystem-vendor-id",
                        Buffer ()
                        {
                             0x21, 0x1b, 0x00, 0x00
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Scope (\_SB.PCI0)
    {
        Scope (SAT1)
        {
            Method (_DSM, 4, NotSerialized)
            {
                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Intel X299X Series SATA AHCI Chipset"
                        },

                        "name",
                        Buffer ()
                        {
                            "Intel(R) Series SATA AHCI Controller"
                        },

                        "device-id",
                        Buffer ()
                        {
                             0x82, 0xa2, 0x00, 0x00
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }
}

Audio: using a Realtek ALC1220 whihc should work with the selected ID's on the SSDT, no need to fill device ID in .plist since has already been implemented in this ACPi table. (NOTE: Audio device in MacPro7,1 SMBIOS is "ADIO" not "HDEF" but for some reason it automatically loads HDEF or just ignores the ACPI table if trying to implement "ADIO" and loads no audio, my guess it has something to do with AppleALC.kext hardcoding device HDEF by the compiler or something, perhaps someone has an idea about this??)
C++:
DefinitionBlock ("", "SSDT", 1, "ICLONS", "DSGEX10G", 0x00000000)
{
    External (_SB_.PCI0, DeviceObj)
    External (_SB_.PCI0.CAVS, DeviceObj)
    External (DTGP, MethodObj)

    Scope (\_SB.PCI0)
    {
        Scope (CAVS)
        {
            Name (_STA, Zero)
        }

        Device (HDEF)
        {
            Name (_ADR, 0x001F0003)
            Method (_DSM, 4, NotSerialized)
            {
                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "model",
                        Buffer ()
                        {
                            "Realtek ALC1220-VB 7.1 Audio"
                        },

                        "name",
                        Buffer ()
                        {
                            "Realtek(R) ALC1220-VB Audio Controller"
                        },

                        "device-id",
                        Buffer ()
                        {
                             0xf0, 0xa2, 0x00, 0x00
                        },

                        "layout-id",
                        Buffer ()
                        {
                            0x07, 0x00, 0x00, 0x00
                        },

                        "alc-layout-id",
                        Buffer ()
                        {
                            0x07, 0x00, 0x00, 0x00
                        },

                        "compatible",
                        Buffer ()
                        {
                            "pci8086,a2f0"
                        },

                        "MaximumBootBeepVolume",
                        Buffer ()
                        {
                             0xee
                        },

                        "MaximumBootBeepVolumeAlt",
                        Buffer ()
                        {
                             0xee
                        },

                        "PinConfigurations",
                        Buffer (Zero){}
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }
}

SBUS: This one has always been evasive, but its finally done, no need to "Fix SBUS" in .plist no more, correctly loading.
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGNEX", 0x00000000)
{
    External (_SB_.PCI0, DeviceObj)
    External (_SB_.PCI0.SBUS, DeviceObj)
    External (DTGP, MethodObj)

    Scope (_SB.PCI0)
    {
        Scope (SBUS)
        {
            OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)
            Field (SMBP, DWordAcc, NoLock, Preserve)
            {
                    ,   2,
                I2CE,   1
            }

            OperationRegion (SMPB, PCI_Config, 0x20, 0x04)
            Field (SMPB, DWordAcc, NoLock, Preserve)
            {
                    ,   5,
                SBAR,   11
            }

            OperationRegion (SMBI, SystemIO, (SBAR << 0x05), 0x10)
            Field (SMBI, ByteAcc, NoLock, Preserve)
            {
                HSTS,   8,
                Offset (0x02),
                HCON,   8,
                HCOM,   8,
                TXSA,   8,
                DAT0,   8,
                DAT1,   8,
                HBDR,   8,
                PECR,   8,
                RXSA,   8,
                SDAT,   16
            }

            Method (_DSM, 4, NotSerialized)
            {
                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Intel X299X Series SMBus Chipset"
                        },

                        "name",
                        Buffer ()
                        {
                            "Intel(R) Series SMBus Controller"
                        },
      
                        "device_type",
                        Buffer ()
                        {
                            "SMBus"
                        },

                        "subsystem-id",
                        Buffer ()
                        {
                             0x01, 0x50, 0x00, 0x00
                        },

                        "device-id",
                        Buffer ()
                        {
                             0xa3, 0xa2, 0x00, 0x00
                        },

                        "subsystem-vendor-id",
                        Buffer ()
                        {
                             0x58, 0x14, 0x00, 0x00
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }

            Device (BUS0)
            {
                Name (_CID, "smbus")
                Name (_ADR, Zero)
                Device (BLC0)
                {
                    Name (_ADR, Zero)
                    Name (_CID, "smbus-blc")
                    Method (_DSM, 4, NotSerialized)
                    {
                        Local0 = Package ()
                            {
                                "refnum",
                                Zero,
                                "version",
                                0x03,
                                "fault-off",
                                0x03,
                                "fault-len",
                                0x04,
                                "skey",
                                0x4C445342,
                                "smask",
                                0xFF
                            }
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }
                }
            }

            Device (BUS1)
            {
                Name (_CID, "smbus")
                Name (_ADR, One)
            }
        }
    }
}

XHCI: Correct port and power properties in corcondance to Board defaults and MacPro7,1 properties, use along the XHCI port patch.
Code:
Name.
com.apple.iokit.IOUSBHostFamily
com.apple.driver.usb.AppleUSBXHCI
Find.
83FB0F0F
83F90F0F
Replace.
83FB3F0F
83F93F0F
Comment.
USB Port limit patch #1/2 10.15.x (credit DalianSky)
USB Port limit patch #2/2 10.15.x (credit DalianSky)
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGN10G", 0x00000000)
{
    External (_SB_.PCI0.RP13, DeviceObj)
    External (_SB_.PCI0.RP13.PXSX, DeviceObj)
    External (_SB_.PCI0.XHCI, DeviceObj)
    External (DTGP, MethodObj)

    Scope (\_SB.PCI0.RP13)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Device (XHC2)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Internal"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "ASMedia ASM2142 Internal USB 3.2 Gen 2 Type-C Chipset"
                        },

                        "name",
                        Buffer ()
                        {
                            "ASMedia(R) ASM2142 USB 3.2 Gen 2 Type-C Controller"
                        },

                        "device-id",
                        Buffer ()
                        {
                             0x42, 0x21, 0x00, 0x00
                        },

                        "AAPL,clock-id",
                        0x02,
                        "AAPL,current-available",
                        0x0834,
                        "AAPL,current-extra",
                        0x0c80,
                        "AAPL,current-in-sleep",
                        0x03e8,
                        "AAPL,max-port-current-in-sleep",
                        0x0834
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }

            Method (_PRW, 0, NotSerialized)
            {
                Return (Package ()
                {
                    0x69,
                    0x04
                })
            }

            Device (RHUB)
            {
                Name (_ADR, Zero)
                Method (_RMV, 0, NotSerialized)
                {
                    Return (Zero)
                }

                Device (SSP1)
                {
                    Name (_ADR, One)
                    Name (_UPC, Package ()
                    {
                        0xFF,
                        0x09,
                        Zero,
                        Zero
                    })
                    Name (_PLD, Package ()
                    {
                        Buffer ()
                        {
                            0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                            0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                        }
                    })
                    Method (_DSM, 4, NotSerialized)
                    {
                        If ((Arg2 == Zero))
                        {
                            Return (Buffer ()
                            {
                                 0x03
                            })
                        }

                        Return (Package ()
                        {
                            "UsbCPortNumber",
                            One
                        })
                    }
                }

                Device (SSP2)
                {
                    Name (_ADR, 0x02)
                    Name (_UPC, Package ()
                    {
                        0xFF,
                        0x09,
                        Zero,
                        Zero
                    })
                    Name (_PLD, Package ()
                    {
                        Buffer ()
                        {
                            0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                            0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                        }
                    })
                    Method (_DSM, 4, NotSerialized)
                    {
                        If ((Arg2 == Zero))
                        {
                            Return (Buffer ()
                            {
                                 0x03
                            })
                        }

                        Return (Package ()
                        {
                            "UsbCPortNumber",
                            0x02
                        })
                    }
                }

                Device (HS01)
                {
                    Name (_ADR, 0x03)
                    Name (_UPC, Package ()
                    {
                        0xFF,
                        0x09,
                        Zero,
                        Zero
                    })
                    Name (_PLD, Package ()
                    {
                        Buffer ()
                        {
                            0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                            0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                        }
                    })
                }

                Device (HS02)
                {
                    Name (_ADR, 0x04)
                    Name (_UPC, Package ()
                    {
                        0xFF,
                        0x09,
                        Zero,
                        Zero
                    })
                    Name (_PLD, Package ()
                    {
                        Buffer ()
                        {
                            0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                            0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                        }
                    })
                }
            }
        }
    }

    Scope (\_SB.PCI0.XHCI)
    {
        Method (_DSM, 4, NotSerialized)
        {
            If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

            Local0 = Package ()
                {
                    "AAPL,slot-name",
                    Buffer ()
                    {
                        "Internal"
                    },

                    "built-in",
                    Buffer ()
                    {
                         0x00
                    },

                    "model",
                    Buffer ()
                    {
                        "Intel X299X Series USB 3.2 Chipset"
                    },

                    "name",
                    Buffer ()
                    {
                        "Intel(R) Series Chipset USB 3.2 Controller"
                    },

                    "device-id",
                    Buffer ()
                    {
                         0xaf, 0xa2, 0x00, 0x00
                    },

                    "AAPL,clock-id",
                    Zero,
                    "AAPL,current-available",
                    0x0834,
                    "AAPL,current-extra",
                    0x0c80,
                    "AAPL,current-in-sleep",
                    0x03e8,
                    "AAPL,max-port-current-in-sleep",
                    0x0834
                }
            DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
            Return (Local0)
        }
    }
}

Aorus RAID Card: Note this is for PC01, if you have the card installed on a different PCI than mine just adopt as needed.
C++:
DefinitionBlock ("", "SSDT", 1, "ICLONS", "DSGN10G", 0x00000000)
{
    External (_SB_.PC01.BR1A, DeviceObj)
    External (_SB_.PC01.BR1A.SL01, DeviceObj)
    External (_SB_.PC01.BR1A.PEGP, DeviceObj)
    External (_SB_.PC01.BR1B, DeviceObj)
    External (_SB_.PC01.BR1B.SL02, DeviceObj)
    External (_SB_.PC01.BR1C, DeviceObj)
    External (_SB_.PC01.BR1C.SL03, DeviceObj)
    External (_SB_.PC01.BR1D, DeviceObj)
    External (_SB_.PC01.BR1D.SL04, DeviceObj)
    External (DTGP, MethodObj)

    Scope (\_SB.PC01.BR1A)
    {
        Scope (SL01)
        {
            Name (_STA, Zero)
        }

        Scope (PEGP)
        {
            Name (_STA, Zero)
        }

        Device (RAD0)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Slot-4"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Aorus PCIe RAID NVMe 1"
                        },

                        "name",
                        Buffer ()
                        {
                            "Gigabyte(R) Aorus Gen 4 AIC Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Scope (\_SB.PC01.BR1B)
    {
        Scope (SL02)
        {
            Name (_STA, Zero)
        }

        Device (RAD1)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Slot-4"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Aorus PCIe RAID NVMe 2"
                        },

                        "name",
                        Buffer ()
                        {
                            "Gigabyte(R) Aorus Gen 4 AIC Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Scope (\_SB.PC01.BR1C)
    {
        Scope (SL03)
        {
            Name (_STA, Zero)
        }

        Device (RAD2)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Slot-4"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Aorus PCIe RAID NVMe 3"
                        },

                        "name",
                        Buffer ()
                        {
                            "Gigabyte(R) Aorus Gen 4 AIC Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }

    Scope (\_SB.PC01.BR1D)
    {
        Scope (SL04)
        {
            Name (_STA, Zero)
        }

        Device (RAD3)
        {
            Name (_ADR, Zero)
            Method (_DSM, 4, NotSerialized)
            {
                If (LEqual (Arg2, Zero)) { Return (Buffer() { 0x03 } ) }

                Local0 = Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Slot-4"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "model",
                        Buffer ()
                        {
                            "Aorus PCIe RAID NVMe 4"
                        },

                        "name",
                        Buffer ()
                        {
                            "Gigabyte(R) Aorus Gen 4 AIC Controller"
                        }
                    }
                DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                Return (Local0)
            }
        }
    }
}
RTC0: Finally an ACPI table to avoid using DSDT HotPatch! Tested on Designare 10G and possibly on ASRock X299 Creator too. (Credits over to the OpenCore Project for their great understanding of ACPI :clap: )
C++:
DefinitionBlock ("", "SSDT", 2, "RTC0", "DESG10G", 0x00000000)
{
    External (_SB_.PCI0.LPCB, DeviceObj)

    Scope (_SB.PCI0.LPCB)
    {
        Device (RTC0)
        {
            Name (_HID, EisaId ("PNP0B00"))
            Name (_CRS, ResourceTemplate ()
            {
                IO (Decode16,
                    0x0070,
                    0x0070,
                    0x01,
                    0x08,
                    )
                IRQNoFlags ()
                    {8}
            })
            Method (_STA, 0, NotSerialized)
            {
                If (_OSI ("Darwin")) {
                    Return (0x0F)
                } Else {
                    Return (0);
                }
            }
        }
    }
}

Thunderbolt: Here is the SSDT for those who won't go through the procedure of flashing their TB pch chips.
C++:
DefinitionBlock ("", "SSDT", 1, "DRENAN", "DSGN10G", 0x00000000)
{
    External (_SB_.PCI0.RP05, DeviceObj)
    External (_SB_.PCI0.RP05.PXSX, DeviceObj)
    External (DTGP, MethodObj)

    Scope (_SB.PCI0.RP05)
    {
        Scope (PXSX)
        {
            Name (_STA, Zero)
        }

        Method (_RMV, 0, NotSerialized)
        {
            Return (Zero)
        }

        Device (UPSB)
        {
            Name (_ADR, Zero)
            OperationRegion (A1E0, PCI_Config, Zero, 0x40)
            Field (A1E0, ByteAcc, NoLock, Preserve)
            {
                AVND,   32,
                BMIE,   3,
                Offset (0x18),
                PRIB,   8,
                SECB,   8,
                SUBB,   8,
                Offset (0x1E),
                    ,   13,
                MABT,   1
            }

            Method (_PRW, 0, NotSerialized)
            {
                Return (Package ()
                {
                    0x69,
                    0x03
                })
            }

            Method (_BBN, 0, NotSerialized)
            {
                Return (SECB)
            }

            Method (_STA, 0, NotSerialized)
            {
                Return (0x0F)
            }

            Method (_RMV, 0, NotSerialized)
            {
                Return (Zero)
            }

            Method (_DSM, 4, Serialized)
            {
                If (!Arg2)
                {
                    Return (Buffer ()
                    {
                         0x03
                    })
                }

                Return (Package ()
                {
                    "AAPL,slot-name",
                    Buffer ()
                    {
                        "Thunderbolt"
                    },

                    "built-in",
                    Buffer ()
                    {
                         0x00
                    },

                    "PCI-Thunderbolt",
                    One
                })
            }

            Device (DSB0)
            {
                Name (_ADR, Zero)
                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                Field (A1E0, ByteAcc, NoLock, Preserve)
                {
                    AVND,   32,
                    BMIE,   3,
                    Offset (0x18),
                    PRIB,   8,
                    SECB,   8,
                    SUBB,   8,
                    Offset (0x1E),
                        ,   13,
                    MABT,   1
                }

                Method (_PRW, 0, NotSerialized)
                {
                    Return (Package ()
                    {
                        0x69,
                        0x03
                    })
                }

                Method (_BBN, 0, NotSerialized)
                {
                    Return (SECB)
                }

                Method (_STA, 0, NotSerialized)
                {
                    Return (0x0F)
                }

                Method (_RMV, 0, NotSerialized)
                {
                    Return (Zero)
                }

                Method (_DSM, 4, Serialized)
                {
                    If (!Arg2)
                    {
                        Return (Buffer ()
                        {
                             0x03
                        })
                    }

                    Return (Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Thunderbolt"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "PCIHotplugCapable",
                        One
                    })
                }

                Device (NHI0)
                {
                    Name (_ADR, Zero)
                    Name (_STR, Unicode ("Thunderbolt"))
                    Method (_RMV, 0, NotSerialized)
                    {
                        Return (Zero)
                    }

                    OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                    Field (A1E0, ByteAcc, NoLock, Preserve)
                    {
                        AVND,   32,
                        BMIE,   3,
                        Offset (0x18),
                        PRIB,   8,
                        SECB,   8,
                        SUBB,   8,
                        Offset (0x1E),
                            ,   13,
                        MABT,   1
                    }

                    Method (_PRW, 0, NotSerialized)
                    {
                        Return (Package ()
                        {
                            0x69,
                            0x03
                        })
                    }

                    Method (_DSM, 4, NotSerialized)
                    {
                        If ((Arg2 == Zero))
                        {
                            Return (Buffer ()
                            {
                                 0x03
                            })
                        }

                        Local0 = Package ()
                            {
                                "AAPL,slot-name",
                                Buffer ()
                                {
                                    "Thunderbolt"
                                },

                                "built-in",
                                Buffer ()
                                {
                                     0x00
                                },

                                "device_type",
                                Buffer ()
                                {
                                    "Thunderbolt"
                                },

                                "model",
                                Buffer ()
                                {
                                    "JHL7540 Titan Ridge Thunderbolt 3"
                                },

                                "name",
                                Buffer ()
                                {
                                    "JHL7540 Titan Ridge Thunderbolt Controller"
                                },

                                "TBTDPLowToHigh",
                                Buffer ()
                                {
                                     0x01, 0x00, 0x00, 0x00
                                },

                                "pathcr",
                                Buffer ()
                                {
                                    0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x10, 0x00, 0x10, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x10, 0x00, 0x10, 0x00, 01, 00, 00, 00, 0x0b, 0x00, 0x0e, 0x00, 0x0e, 0x00, 00, 00, 00, 00, 00, 00, 02, 00, 00, 00, 00, 00, 00, 00, 00, 00, 04, 00, 02, 00, 01, 00, 03, 00, 00, 00, 00, 00, 00, 00, 00, 00, 07, 00, 02, 00, 01, 00
                                },

                                "ThunderboltDROM",
                                Buffer ()
                                {
                                    11, 02, 65, 0xba, 0x7c, 0x7f, 59, 00, 00, 0x2d, 0xea, 01, 0xbd, 01, 58, 00, 01, 00, 10, 00, 01, 00, 08, 81, 82, 02, 82, 00, 00, 00, 08, 82, 92, 01, 82, 00, 00, 00, 08, 83, 82, 04, 82, 01, 00, 00, 08, 84, 92, 03, 82, 01, 00, 00, 05, 85, 09, 01, 00, 05, 86, 09, 01, 00, 02, 87, 03, 88, 20, 03, 89, 80, 02, 0xca, 02, 0xcb, 0x0d, 01, 41, 70, 70, 0x6c, 65, 20, 49, 0x6e, 63, 0x2e, 00, 0x0c, 02, 0x4d, 61, 63, 69, 0x6e, 74, 0x6f, 73, 68, 00
                                },

                                "ThunderboltConfig",
                                Buffer ()
                                {
                                    02, 03, 02, 00, 0x0a, 00, 05, 01, 01, 00, 01, 00, 05, 01, 02, 00, 06, 00, 05, 01, 01, 00, 01, 00, 03, 01, 02, 00, 06, 00, 05, 00
                                },

                                "LinkDetails",
                                Buffer ()
                                {
                                     0x08, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00
                                },

                                "ThunderboltUUID",
                                ToUUID ("a0b5b7c6-1318-441c-b0c9-fe695eaf949b"),
                                "sscOffset",
                                Buffer ()
                                {
                                     0x00, 0x00
                                },

                                "TBTFlags",
                                Buffer ()
                                {
                                     0x03, 0x00, 0x00, 0x00
                                },

                                "power-save",
                                One,
                                Buffer ()
                                {
                                     0x00
                                }
                            }
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }

                    Return (Zero)
                }
            }

            Device (DSB1)
            {
                Name (_ADR, 0x00010000)
                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                Field (A1E0, ByteAcc, NoLock, Preserve)
                {
                    AVND,   32,
                    BMIE,   3,
                    Offset (0x18),
                    PRIB,   8,
                    SECB,   8,
                    SUBB,   8,
                    Offset (0x1E),
                        ,   13,
                    MABT,   1
                }

                Method (_PRW, 0, NotSerialized)
                {
                    Return (Package ()
                    {
                        0x69,
                        0x03
                    })
                }

                Method (_BBN, 0, NotSerialized)
                {
                    Return (SECB)
                }

                Method (_STA, 0, NotSerialized)
                {
                    Return (0x0F)
                }

                Method (_RMV, 0, NotSerialized)
                {
                    Return (Zero)
                }

                Method (_DSM, 4, Serialized)
                {
                    If (!Arg2)
                    {
                        Return (Buffer ()
                        {
                             0x03
                        })
                    }

                    Return (Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Thunderbolt"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "Thunderbolt Entry ID",
                        0x10000055c
                    })
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)
                    OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                    Field (ARE0, ByteAcc, NoLock, Preserve)
                    {
                        AVND,   16
                    }

                    Method (_RMV, 0, NotSerialized)
                    {
                        Return (Zero)
                    }

                    Device (DSB0)
                    {
                        Name (_ADR, Zero)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1,
                            Offset (0x3E),
                                ,   6,
                            SBRS,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }

                        Device (DEV0)
                        {
                            Name (_ADR, Zero)
                            Method (_STA, 0, NotSerialized)
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)
                            {
                                Return (Zero)
                            }
                        }
                    }

                    Device (DSB3)
                    {
                        Name (_ADR, 0x00030000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }

                        Device (UPS0)
                        {
                            Name (_ADR, Zero)
                            OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                            Field (ARE0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   16
                            }

                            Method (_RMV, 0, NotSerialized)
                            {
                                Return (Zero)
                            }

                            Device (DSB0)
                            {
                                Name (_ADR, Zero)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1,
                                    Offset (0x3E),
                                        ,   6,
                                    SBRS,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }
                                }
                            }

                            Device (DSB3)
                            {
                                Name (_ADR, 0x00030000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB4)
                            {
                                Name (_ADR, 0x00040000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB5)
                            {
                                Name (_ADR, 0x00050000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }

                            Device (DSB6)
                            {
                                Name (_ADR, 0x00060000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }
                        }
                    }

                    Device (DSB4)
                    {
                        Name (_ADR, 0x00040000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }

                        Device (UPS0)
                        {
                            Name (_ADR, Zero)
                            OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                            Field (ARE0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   16
                            }

                            Method (_RMV, 0, NotSerialized)
                            {
                                Return (Zero)
                            }

                            Device (DSB0)
                            {
                                Name (_ADR, Zero)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1,
                                    Offset (0x3E),
                                        ,   6,
                                    SBRS,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB3)
                            {
                                Name (_ADR, 0x00030000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB4)
                            {
                                Name (_ADR, 0x00040000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB5)
                            {
                                Name (_ADR, 0x00050000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }

                            Device (DSB6)
                            {
                                Name (_ADR, 0x00060000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }
                        }
                    }

                    Device (DSB5)
                    {
                        Name (_ADR, 0x00050000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }
                    }

                    Device (DSB6)
                    {
                        Name (_ADR, 0x00060000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }
                    }
                }
            }

            Device (DSB2)
            {
                Name (_ADR, 0x00020000)
                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                Field (A1E0, ByteAcc, NoLock, Preserve)
                {
                    AVND,   32,
                    BMIE,   3,
                    Offset (0x18),
                    PRIB,   8,
                    SECB,   8,
                    SUBB,   8,
                    Offset (0x1E),
                        ,   13,
                    MABT,   1
                }

                Method (_PRW, 0, NotSerialized)
                {
                    Return (Package (0x02)
                    {
                        0x69,
                        0x03
                    })
                }

                Method (_BBN, 0, NotSerialized)
                {
                    Return (SECB)
                }

                Method (_STA, 0, NotSerialized)
                {
                    Return (0x0F)
                }

                Method (_RMV, 0, NotSerialized)
                {
                    Return (Zero)
                }

                Method (_DSM, 4, Serialized)
                {
                    If (!Arg2)
                    {
                        Return (Buffer ()
                        {
                             0x03
                        })
                    }

                    Return (Package ()
                    {
                        "PCIHotplugCapable",
                        One,
                        "IOPCIHPType",
                        0x02
                    })
                }

                Device (XHC1)
                {
                    Name (_ADR, Zero)
                    Method (_DSM, 4, NotSerialized)
                    {
                        If ((Arg2 == Zero))
                        {
                            Return (Buffer ()
                            {
                                 0x03
                            })
                        }

                        Local0 = Package ()
                            {
                                "AAPL,slot-name",
                                Buffer ()
                                {
                                    "Thunderbolt"
                                },

                                "built-in",
                                Buffer ()
                                {
                                     0x00
                                },

                                "model",
                                Buffer ()
                                {
                                    "JHL7540 Titan Ridge USB 3.2 Gen 2 Type-C"
                                },

                                "name",
                                Buffer ()
                                {
                                    "JHL7450 Titan Ridge USB Type-C Controller"
                                },

                                "device_type",
                                Buffer ()
                                {
                                    "Thunderbolt USB"
                                },

                                "AAPL,clock-id",
                                One,
                                "AAPL,xhci-clock-id",
                                One,
                                "USBBusNumber",
                                Zero,
                                "UsbCompanionControllerPresent",
                                One,
                                "IOPCIExpressCapabilites",
                                0x02,
                                "IOPCIHPType",
                                0x02
                            }
                        DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                        Return (Local0)
                    }

                    Method (_PRW, 0, NotSerialized)
                    {
                        Return (Package ()
                        {
                            0x69,
                            0x03
                        })
                    }

                    Device (RHUB)
                    {
                        Name (_ADR, Zero)
                        Device (SSP1)
                        {
                            Name (_ADR, One)
                            Name (_UPC, Package ()
                            {
                                0xFF,
                                0x09,
                                Zero,
                                Zero
                            })

                           Name (_PLD, Package ()
                           {
                               Buffer ()
                               {
                                   0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                   0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                               }
                           })

                            Method (_DSM, 4, NotSerialized)
                            {
                                If (LEqual (Arg2, Zero))
                                {
                                    Return (Buffer ()
                                    {
                                        0x03
                                    })
                                }
                                Return (Package ()
                                {
                                    "UsbCPortNumber",
                                    One
                                })
                            }
                        }

                        Device (SSP2)
                        {
                            Name (_ADR, 0x02)
                            Name (_UPC, Package ()
                            {
                                0xFF,
                                0x09,
                                Zero,
                                Zero
                            })

                            Name (_PLD, Package ()
                            {
                                Buffer ()
                                {
                                    0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                                    0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
                                }
                            })

                            Method (_DSM, 4, NotSerialized)
                            {
                                If (LEqual (Arg2, Zero))
                                {
                                    Return (Buffer ()
                                    {
                                        0x03
                                    })
                                }
                                Return (Package ()
                                {
                                    "UsbCPortNumber",
                                    0x02
                                })
                            }
                        }
                    }
                }
            }

            Device (DSB4)
            {
                Name (_ADR, 0x00040000)
                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                Field (A1E0, ByteAcc, NoLock, Preserve)
                {
                    AVND,   32,
                    BMIE,   3,
                    Offset (0x18),
                    PRIB,   8,
                    SECB,   8,
                    SUBB,   8,
                    Offset (0x1E),
                        ,   13,
                    MABT,   1
                }

                Method (_PRW, 0, NotSerialized)
                {
                    Return (Package ()
                    {
                        0x69,
                        0x03
                    })
                }

                Method (_BBN, 0, NotSerialized)
                {
                    Return (SECB)
                }

                Method (_STA, 0, NotSerialized)
                {
                    Return (0x0F)
                }

                Method (_RMV, 0, NotSerialized)
                {
                    Return (Zero)
                }

                Method (_DSM, 4, Serialized)
                {
                    If (!Arg2)
                    {
                        Return (Buffer ()
                        {
                             0x03
                        })
                    }

                    Return (Package ()
                    {
                        "AAPL,slot-name",
                        Buffer ()
                        {
                            "Thunderbolt"
                        },

                        "built-in",
                        Buffer ()
                        {
                             0x00
                        },

                        "Thunderbolt Entry ID",
                        0x10000055e
                    })
                }

                Device (UPS0)
                {
                    Name (_ADR, Zero)
                    OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                    Field (ARE0, ByteAcc, NoLock, Preserve)
                    {
                        AVND,   16
                    }

                    Method (_RMV, 0, NotSerialized)
                    {
                        Return (Zero)
                    }

                    Device (DSB0)
                    {
                        Name (_ADR, Zero)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1,
                            Offset (0x3E),
                                ,   6,
                            SBRS,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }

                        Device (DEV0)
                        {
                            Name (_ADR, Zero)
                            Method (_STA, 0, NotSerialized)
                            {
                                Return (0x0F)
                            }

                            Method (_RMV, 0, NotSerialized)
                            {
                                Return (Zero)
                            }
                        }
                    }

                    Device (DSB3)
                    {
                        Name (_ADR, 0x00030000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }

                        Device (UPS0)
                        {
                            Name (_ADR, Zero)
                            OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                            Field (ARE0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   16
                            }

                            Method (_RMV, 0, NotSerialized)
                            {
                                Return (Zero)
                            }

                            Device (DSB0)
                            {
                                Name (_ADR, Zero)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1,
                                    Offset (0x3E),
                                        ,   6,
                                    SBRS,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }
                                }
                            }

                            Device (DSB3)
                            {
                                Name (_ADR, 0x00030000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB4)
                            {
                                Name (_ADR, 0x00040000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB5)
                            {
                                Name (_ADR, 0x00050000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }

                            Device (DSB6)
                            {
                                Name (_ADR, 0x00060000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }
                        }
                    }

                    Device (DSB4)
                    {
                        Name (_ADR, 0x00040000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }

                        Device (UPS0)
                        {
                            Name (_ADR, Zero)
                            OperationRegion (ARE0, PCI_Config, Zero, 0x04)
                            Field (ARE0, ByteAcc, NoLock, Preserve)
                            {
                                AVND,   16
                            }

                            Method (_RMV, 0, NotSerialized)
                            {
                                Return (Zero)
                            }

                            Device (DSB0)
                            {
                                Name (_ADR, Zero)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1,
                                    Offset (0x3E),
                                        ,   6,
                                    SBRS,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB3)
                            {
                                Name (_ADR, 0x00030000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB4)
                            {
                                Name (_ADR, 0x00040000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }

                                Device (DEV0)
                                {
                                    Name (_ADR, Zero)
                                    Method (_STA, 0, NotSerialized)
                                    {
                                        Return (0x0F)
                                    }

                                    Method (_RMV, 0, NotSerialized)
                                    {
                                        Return (Zero)
                                    }
                                }
                            }

                            Device (DSB5)
                            {
                                Name (_ADR, 0x00050000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }

                            Device (DSB6)
                            {
                                Name (_ADR, 0x00060000)
                                OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                                Field (A1E0, ByteAcc, NoLock, Preserve)
                                {
                                    AVND,   32,
                                    BMIE,   3,
                                    Offset (0x18),
                                    PRIB,   8,
                                    SECB,   8,
                                    SUBB,   8,
                                    Offset (0x1E),
                                        ,   13,
                                    MABT,   1
                                }

                                Method (_BBN, 0, NotSerialized)
                                {
                                    Return (SECB)
                                }

                                Method (_STA, 0, NotSerialized)
                                {
                                    Return (0x0F)
                                }

                                Method (_RMV, 0, NotSerialized)
                                {
                                    Return (Zero)
                                }
                            }
                        }
                    }

                    Device (DSB5)
                    {
                        Name (_ADR, 0x00050000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }
                    }

                    Device (DSB6)
                    {
                        Name (_ADR, 0x00060000)
                        OperationRegion (A1E0, PCI_Config, Zero, 0x40)
                        Field (A1E0, ByteAcc, NoLock, Preserve)
                        {
                            AVND,   32,
                            BMIE,   3,
                            Offset (0x18),
                            PRIB,   8,
                            SECB,   8,
                            SUBB,   8,
                            Offset (0x1E),
                                ,   13,
                            MABT,   1
                        }

                        Method (_BBN, 0, NotSerialized)
                        {
                            Return (SECB)
                        }

                        Method (_STA, 0, NotSerialized)
                        {
                            Return (0x0F)
                        }

                        Method (_RMV, 0, NotSerialized)
                        {
                            Return (Zero)
                        }
                    }
                }
            }
        }
    }
}
Section 6: So here comes the awaited how-to, extracting, checking and flashing back modded firmware on our on-board Titan Ridge Thunderbolt 3.

"What will I achieve by doing this weird procedure?"
  • Full Thunderbolt functionality like Thunderbolt networking capabilities, hot plug, better stablity and better perfomrance over-all.

"I already had Thunderbolt hot plug with the previous method"
  • Yes you did, but you couldn't load Thunderbolt bus which is mandatory to connect certain devices.

"My Thunderbolt worked just fine with my Apollo xxx"
  • Yes but now it requieres less buffer and connectivity is faster

"What is Thunderbolt networking capabilities?"
  • If you have never heard then don't bother, you don't need it, but if you have a NAS you'll probably be very happy about this, yeah I'm talking to you.

"I don't need any of the above, why bother?".
  • Then just don't do the procedure.

What do we need in order to do this procedure:
Your GB X299X Designare 10G.
SPI Flasher, this one should be fine, thats the one I use (from spanish amazon, yours might be different).
USB Extender if you don't have a Mac capable laptop to get close to the chip.
Small screwdriver kit like this one for instance.
Brew and Flashrom.

The procedure is very straight forward really, just take your time and read things through. (Just to be clear, not I or any of the members mentioned above are responsible for any kind of problem that might arise by doing the procedure, this is optional and everyone is respnsible for what they do with theyr hardware)

Now that unpleasanties are out of the way, lets start by dissasembling your board, literally.

6a) I have taken pictures of the procedure (sorry for any bad pics), lets start with the front which I believe should be thje start point. Remove cricled screws, its necessary.
IMG_20200415_175514.jpg

There is one behing the top cap, it just didn't make it in the picture.

Now lets move to the back panel:
IMG_20200415_175240.jpg

Once the back panel has been removed, lets remove some more screws!
IMG_20200415_175639.jpg

We have to remove the whole chipset/vrm cooling, it all runs throught a single pipe, be careful! the pipe I believe is copper which is very maleable if forced. (before lifting the cooling make sure all screws have been removed)

Once all screws have been removed, you should remove the I/O shield and plastic piece that covers USB and connectors. Now slowly clamp out the vrm pipe part by part, because there are thermal pads the VRM cooling will be "stuck" so just lift carefully.

Once done this is what we have :)
IMG_20200415_180445.jpg

That is where our Windbond firmware chip is located, a close up.
IMG_20200415_180520.jpg

The chip we are looking for is the one with the red mark, simple.

NOTE: All SMD chips have an indicator that will give away vendors the direction the chip has to be mounted on the PCB, starting by pin 1 up to #8, pin 1 being also an indicator for our SPI clip, more below.

Now that we have the muscle part out of the way, prepare an area where you can directly fiddle with the board as best as you can.

Lets now get to the software side, we will start by installing Homebrew (brew) package manager. Open Terminal and paste the following:
  • Code:
    /bin/bash -c "$(curl -fsSL https://raw.githubusercontent.com/Homebrew/install/master/install.sh)"
The procedure will take some time, so prepare a tea or whatever you fancy.
Once brew has been installed we have to install Flashrom, use this command:
  • Code:
    brew install flashrom
Now we can move on to extracting the firmware from our boards.

6b) Open Terminal, and plug your programmer to any USB port, wheter it be with an extener (I haven't used an extender, I connected the SPI flasher straight to my MBP which was close to the board) or to your laptop.
NOTE: I have used a USB 2 port, 500 mA max output.

Here is a link to the great SPI CH341 mini-guide from @CaseySJ for deeper understanding and useful info.

After you have set the connector side of the clip to the right position on the programmer connect the clip to the smd chip (remember the coloured dot I was talking about? Here will guide us on how to place the clip on the chip).
NOTE: I have used a GC Alpine Ridge AIC card for illustration, but the procedure is exactly the same.

Placing the clip on the chip in the right direction:
IMG_20200422_185811.jpg

On the X299X the chip is very close to the RAM slot, so in order to connect correctly you have to move the tip of the clip as close as possible to the RAM slot, then open the clip and move it down to connect with the 8 pins from the smd.
NOTE: I have found that if you move the clip as close as possible to the RAM it will be much easier than just bullseyeing the pins, then just open competely and be sure that both sides are as down as possible, gently, no force should be applied around this procedure.

This is how it looks from close once clipped:
IMG_20200422_185924-1.jpg


Now to the software part, in Terminal type:
Code:
sudo flashrom -p ch341a_spi -r DSG10G-TR-1.bin
and hit enter.

If the clip is not making good connectivity it will send this message:

0.png

Don't worry, just wiggle a bit the clip or try to re place, after few trials it should connect properly. Once the chip is properly read you will have this message, repeat 3 (after each successful attemp, change "whatever-name-1.bin" to "whatever-name-2-bin" and so, at the end file name to have multiple read files) times just to make sure it wasn't a fluke.

1.png

Now lets check sum for the 3 extracted files with this command in terminal
Code:
shasum
hit space and drag the 3 newly created .bin files in your user folder to Terminal window. If everything matches and there was no fluke you will have exact sum on the 3 instances like this:

2.png

Now we can finally move to flashing the modified firmware, download, unzip and place the .bin somewhere comfortable for easy access.

We will use Terminal again with very similar command, but instead of and "r" (read) we will use a "w" (write).
NOTE: Notice how the firmware doesn't correspond to our MB, well thats fine, our boards come with FW version NVM43 and after flashing the modified version that @CaseySJ provided, I didn't like how the whole functionality was going, sudden reboot, it wouldnt recognise some TB1 devices and some other stuff, so I risked my board and went to flash the same firmware from the Z390 Designare NVM33 as Casey suggested which turned up to be a success, now things work as expected :)

On Terminal type:
Code:
sudo flashrom -p ch341a_spi -w
hit space after the -w and drag the uncompressed .bin file from the location you placed it before, hit enter and if everything goes according to plan you should see this screen:

3.png

It would be wise to do few reads again and compare checksums just to be sure everything was flashed correctly.

6c) Re assemble the board and let's move onto the simplified SSDT (downloads section) needed for HP and proper port7 injection. Here is a mini-guide from @CaseySJ with all the details needed to change the needed CRC-8 checksum for each device, there could be trouble if this step isn't done.

I inssist, do the CRC step, just to be safe :thumbup:

Replace SSDT and DONE! Welcome to the most compatible hardware functionality :) on a HEDT hackintosh.
 

Attachments

  • SmallTreeIntel8259x.kext.zip
    95.9 KB · Views: 457
  • SSDT-X299X-DESIGNARE10G-AORUSRAID-PC01-DRENAN.aml.zip
    1.1 KB · Views: 398
  • X299D10G900F3C.zip
    2 KB · Views: 377
  • X299XD10.F3b.zip
    7.5 MB · Views: 393
  • MacProMemoryNotificationDisabler.kext.zip
    15 KB · Views: 334
  • AirPort + Bluetooth .kext.zip
    2.2 MB · Views: 371
  • SSDT-X299X-DESIGNARE10G-DTGP.dsl.zip
    1 KB · Views: 366
  • SSDT-X299X-DESIGNARE10G-XOSI.dsl.zip
    1,004 bytes · Views: 346
  • Config file X299D10G 10900X-F3b.zip
    2 KB · Views: 404
  • EFI Clover 5104 Simplified.zip
    4.1 MB · Views: 504
  • TSCAdjustReset.kext.zip
    10.7 KB · Views: 315
  • SSDT-X299X-DESIGNARE10G-THUNDERBOLT-SIMPLIFIED.aml.zip
    1.7 KB · Views: 334
  • EFI OC.zip
    4.5 MB · Views: 762
Last edited:
Unfortunately I don't have a X299X motherboard, but I still have a working build with Gigabyte X299UD4 PRO , so I could provide help from this configuration , past year, in 2018 we made extensive research with @nmano and Kgp for the Thunderbolt SSDT.aml.
 
Last edited:
Did you try X99 5960X patch for X299X?

Find Data<-> 483D0000 0040
MatchOS String <-> 10.14.x,10.15.x
Name String<-> IOPCIFamily
Replace Data<-> 483D0000 0080
 
I also have this issue with asus r6a board and 7900x when trying to do a 10.15.2 fresh install. EFI works totally fine with 10.15.1. But will encounter this issue when boot from 10.15.2 usb installer. After turn on the Above 4g Decoding in BIOS, everything seems fine. You can try it.
 
Did you try X99 5960X patch for X299X?

Find Data<-> 483D0000 0040
MatchOS String <-> 10.14.x,10.15.x
Name String<-> IOPCIFamily
Replace Data<-> 483D0000 0080
Hello @nmano, I will certainly try in a bit, at the office.

EDIT: Tried with no changes, TB error is persistent and shows no progress beyond the captures attached. Something is off with TB.
 
Last edited:
I also have this issue with asus r6a board and 7900x when trying to do a 10.15.2 fresh install. EFI works totally fine with 10.15.1. But will encounter this issue when boot from 10.15.2 usb installer. After turn on the Above 4g Decoding in BIOS, everything seems fine. You can try it.
I have tried with and without 4G enabled, no changes
 
What are the Thunderbolt settings in your BIOS, and what are they set to? Somewhere in the @kgp guides, it's mentioned that in order to install the Thunderbolt AIC you have to either have an SSDT in place at install, or install without the card present and then implement it afterwards. You'll notice that in his X299 Mojave guide it's done as a postinstall step. So for your motherboard, this means the practical thing to do is to disable Thunderbolt in the BIOS until you have OS X installed.

It also says: "you will not be able to configure your Thunderbolt 3 Adapter in the mainboard BIOS, until the Adapter has been successfully recognised and initialised by the UEFI Windows System." Yeah, Thunderbolt stuff is weird. So if you don't see anything for Thunderbolt in your BIOS, that's probably the culprit. Likely you'll need to install Windows for other things anyway: BIOS mods, firmware updates, etc.
 
Thanks for the comment, but KGP's guide is not related to GB boards since X299X Designare EX 10G has a built-in TitanRidge controller with two ports, so even if I load windows (which I have) and disable TB in BIOS or change settings to TB configuration, the exact same thing happens.

No idea what this is.
 
It's surprising that you still get it with the thunderbolt disabled. You never stated that.

Perhaps there's something weird going on with the console (I think it gets relocated around this point), and your error has nothing to do with thunderbolt. Please post a complete photo of verbose log and your config.plist.

Disable thunderbolt in BIOS before taking photo.
 
@dolgarrenan
Check in your Bios setting make sure
Sata=AHCI
CSM=Disable

TRY to disable thunderbolt in bios
Sent your DSDT files from windows.
 
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