GA-Z97M-D3H - Random freezing [SOLVED]

[VirtualRecess]

Looks fine. Although SSDT-LPC is not correct.

What would need editing to get it working again ? I'm using MiKM's edited version as I can't use the SSDT-LPC in your GitHub as it will cause major instabilities with various music software and other programs such as the intel power app.

 

[VioletDragon]

What would need editing to get it working again ? I'm using MiKM's edited version as I can't use the SSDT-LPC in your GitHub as it will cause major instabilities with various music software and other programs such as the intel power app.

Yes. But it is incorrect. Working on it atm. Bare with me.

 

[VirtualRecess]

Yes. But it is incorrect. Working on it atm. Bare with me.

wow that was a quick response! Thanks very much for the help.

 

[VioletDragon]

wow that was a quick response! Thanks very much for the help.

Can you remove SSDT-LPC reboot and attach ioreg.

 

[VirtualRecess]

Can you remove SSDT-LPC reboot and attach ioreg.

Attached

 

[VioletDragon]

Attached

Try this but let me know If Power Gadget works for you. It still doesn't load for me.

 

[VirtualRecess]

Try this but let me know If Power Gadget works for you. It still doesn't load for me.

Looks to be working as normal

 

[VirtualRecess]

Here is the ioreg attached with the new SSDT-LPC in place

 

[VioletDragon]

Looks to be working as normal

So Power Gadget works for you? Ive noticed that Z97, H97 uses two different ID here look at this. CC6 is H97 LPC Controller & CC3 is Z97 LPC Controller. Both has different IDs.

Scope (_SB.PCI0.LPCB)
    {
        OperationRegion (RMP2, PCI_Config, 0x02, 0x02)
        Field (RMP2, AnyAcc, NoLock, Preserve)
        {
            LDID,   16
        }

        Name (LPDL, Package (0x17)
        {
            0x9D48,
            0xA14E,
            0x8CC6,
            0x8CC3,
            Zero,
            Package (0x04)
            {
                "device-id",
                Buffer (0x04)
                {
                     0xC1, 0x9C, 0x00, 0x00                        
                },

                "compatible",
                Buffer (0x0D)
                {
                    "pci8086,9cc1"
                }
            }
        })

 

[VioletDragon]

Here is the ioreg attached with the new SSDT-LPC in place

Looking at ioreg you provided AppleLPC hasn't loaded.