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<< Solved >> AMD WX4170 dGPU on ZBook G5 17 Laptop

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H87M-PRO
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HD4600 + GTX 660 TI
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That's the standard hybrid configuration in Bios

Yup it changes the PowerPlay tables just for fun...(not funny)

Nice tip, thanks!

I didn't use auto before because it didn't work very well in MacOS, before I figured out the HDCP connector flag for the LCD, I would get snow on boot. But I guess that's not an issue now. Problem is I loose iGPU in MacOS, but for testing new ROMs is a good option.
I tried your way of patch, even your acpi. But no hybrid... the last possible reason to this is clover, as it also making internal injection of ports. I really know that this is possible, because hybrid is working fine with win10 and Ubuntu. Maybe it’s time to switch to OpecCore.
 
Joined
Jul 21, 2011
Messages
279
Motherboard
Zbook G5 17"
CPU
i7
Graphics
AMD WX-4170
Mac
  1. MacBook Pro
  2. Mac mini
  3. Mac Pro
New "successful" test, I edited the outputs of a Dell ROM (CRANE) for a RX560. And Catalina boots, performance is low and pretty much the same as PEGATRON. The core clock never goes above 1GHZ. But I believe this ROM is voltage unlocked, so I just need to read more on ROM tweaking, and it may be adjustable to get it up to 4170 spec.
 
Joined
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Messages
157
Motherboard
H87M-PRO
CPU
i5-4690K
Graphics
HD4600 + GTX 660 TI
Mac
  1. iMac
  2. MacBook Pro
New "successful" test, I edited the outputs of a Dell ROM (CRANE) for a RX560. And Catalina boots, performance is low and pretty much the same as PEGATRON. The core clock never goes above 1GHZ. But I believe this ROM is voltage unlocked, so I just need to read more on ROM tweaking, and it may be adjustable to get it up to 4170 spec.
Dells 4150 rom or 560? Dells 4150 has also 5 connectors and they are almost same as apples from vbioses of 13.3 and 14.3. I tried dells rom, and it was working fine on OS X, almost no patches (only two bytes patched in connectors of bios) but not working on Windows, has different ports hotplug action (if all 4 ports are connected and disconnecting in short period of time)

Rx560m must be supported by Polaris bios editor without bricking
 
Joined
Jul 21, 2011
Messages
279
Motherboard
Zbook G5 17"
CPU
i7
Graphics
AMD WX-4170
Mac
  1. MacBook Pro
  2. Mac mini
  3. Mac Pro
This one, only 4 connectors. (This is the unpatched version)
 

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  • Dell RX 560 4GB.ROM.zip
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Joined
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H87M-PRO
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i5-4690K
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HD4600 + GTX 660 TI
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  1. iMac
  2. MacBook Pro
This one, only 4 connectors. (This is the unpatched version)
I have a question! Take a look at Offset "229376"

In OEM MXM vbioses, maybe on pci vbioses this part is exist. What this part for?
 

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  • Dell RX 560 4GB-endpart.ROM.zip
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Joined
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Messages
279
Motherboard
Zbook G5 17"
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i7
Graphics
AMD WX-4170
Mac
  1. MacBook Pro
  2. Mac mini
  3. Mac Pro
I've wondered about that section as well, I read somewhere that it wasn't important, some redundant data tables for EFI GOP that get skipped because there's no signature or something like that. But if you find out, let me know
 
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1. I tried today Catalina and OpenCore. This bootloader destroyed my nvram, now even if I reset nvram in clover, delete nvram on efi partition, my system boot with arguments from OC. I see Open Core in boot menu in bios. I didn’t install it on zbook. I install it on another laptop to prevent something like this ((((( need your help to restore nvram
1. I found solution to restore NVRAM
Actualy the problem was - the long migration of clover EFIs through different Hackintoshes, and thats why i was used emulated nvram. But when i booted OpenCore even with different OS, the OpenCore chanced real Variables and here somehow conflict begins, as laptop always was using emulated nvram.

The only method worked for me is this:

1. Delete nvram.plist
2. Terminal "sudo nvram -c"
3. Delete "EmuVariableUefi.efi"
4. Delete RC Scripts (location on img)
Screen Shot 2021-05-16 at 14.03.06.png
5. Replace (if used) "OsxAptioFixDrv.efi" by "AptioMemoryFix.efi"
6. Restart by Hard Power Off
7. Clean NVRAM by pressing F11 in clover
8. Reset using Clover Icon
9. Press F2 to generate bootlog in EFI>CLOVER>misc (To be sure nvram is not reading from plist)
10. Boot OSX and restart once more time.
11. Native NVRAM is working. No more emulations :)




@theroadw
How is your progress with WX4170?



2.
I`ve looked G3 and G5 locigboard on the web and found 3 soldered simple hotplug detect mux chips "PI3WVR12412". But its unnusual, as laptop has 4 outputs. So i think that signal to eDP from dGPU is tunneling by pci lanes. I don't have any other explanations.

But if we look closer on CPU balls. We will find Digital Display Interface Pins. And CPU has 3 DDI ports. So possibly DDI are connected to ports, But how edp is connected? eDP directly connected to display.
 
Last edited:
Joined
Jul 21, 2011
Messages
279
Motherboard
Zbook G5 17"
CPU
i7
Graphics
AMD WX-4170
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  1. MacBook Pro
  2. Mac mini
  3. Mac Pro
11. Native NVRAM is working. No more emulations :)
Nice!
How is your progress with WX4170?
Stalled at the moment, I've had too much work, but I found a utility PolarisBiosEditor-xml that gives way more information about the ROM, and I'll try to edit and see if I can also get the new (MacOS 15+) variables to be reported, then I'll test all the ROM's I have that work either in Mojave and/or Catalina to try to narrow down the problem.
I believe the better solution will be to patch the driver with OpenCore plist patch for MacOS and leave the ROM as is.
2. I`ve looked G3 and G5 locigboard on the web and found 3 soldered simple hotplug detect mux chips "PI3WVR12412". But its unnusual, as laptop has 4 outputs. So i think that signal to eDP from dGPU is tunneling by pci lanes. I don't have any other explanations.
But if we look closer on CPU balls. We will find Digital Display Interface Pins. And CPU has 3 DDI ports. So possibly DDI are connected to ports, But how edp is connected? eDP directly connected to display.
Something that happens when you swap from Hybrid to Discrete, is that the Bios goes through a complete OFF/Detect/Configure/ON/OFF/ON cycle, and the DSDT and SSDT's change and routing changes, now the DGPU is directly patched to the LCD somehow.
It could be as simple as turning off the IGPU, and now a Mux get's the signal from DGPU. Or there could be another switch.
I may be wrong as I don't know for sure and it's pure speculation, but based on benchmarks, in Hybrid mode DGPU can only get signal to LCD using PCI tunnel, but in Discrete mode it's directly patched and you get about 5~12% increase in performance, which is in line with the different methods of patching.

Direct Out
Screen Shot 2021-05-16 at 5.14.19 PM.png

Through IGPU
Screen Shot 2021-05-16 at 5.13.27 PM.png


This would also explain why when I try to force a 0x80 to notify a change in the MUX or try to switch off the IGPU or tell DGPU to switch places 0x81 with IGPU in my SSDT tests I get a hardware crash. (same thing happens when I try to turn off the DGPU)
So maybe in discrete mode DGPU uses a completely different path, and in Hybrid Windows uses PCI tunnel and only lowers power state, but doesn't actually turn OFF the DGPU.
 
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Nice!

Stalled at the moment, I've had too much work, but I found a utility PolarisBiosEditor-xml that gives way more information about the ROM, and I'll try to edit and see if I can also get the new (MacOS 15+) variables to be reported, then I'll test all the ROM's I have that work either in Mojave and/or Catalina to try to narrow down the problem.
I believe the better solution will be to patch the driver with OpenCore plist patch for MacOS and leave the ROM as is.

Something that happens when you swap from Hybrid to Discrete, is that the Bios goes through a complete OFF/Detect/Configure/ON/OFF/ON cycle, and the DSDT and SSDT's change and routing changes, now the DGPU is directly patched to the LCD somehow.
It could be as simple as turning off the IGPU, and now a Mux get's the signal from DGPU. Or there could be another switch.
I may be wrong as I don't know for sure and it's pure speculation, but based on benchmarks, in Hybrid mode DGPU can only get signal to LCD using PCI tunnel, but in Discrete mode it's directly patched and you get a 8% increase in performance, which is in line with the different methods of patching.
This would also explain why when I try to force a 0x80 to notify a change in the MUX or try to switch off the IGPU or tell DGPU to switch places 0x81 with IGPU in my SSDT tests I get a hardware crash. (same thing happens when I try to turn off the DGPU)
So maybe in discrete mode DGPU uses a completely different path, and in Hybrid Windows uses PCI tunnel and only lowers power state, but doesn't actually turn OFF the DGPU.
I am not sure, but as I know, the bios is flash rom, some kind of os for chipset. So actually chipset is doing all stuff, even backlight control. The rom of bios is injects to chipset after power button is pressed. After chipset load system, it starts test of any connected hardware and compare its ids with rom, then inject devices. After successfully boot, the other drivers are starting, and after all devices are ready to do their job, chipset starting usual boot, search boot devices and we are in os. So bios will never be used until chipset is power on ( we test this force power on on really old PCs). So that’s why the chipset rom can’t be patched onthefly, but acpi instructions are accessible as they need for os to operate with hardware. My knowledge of acpi is really low, but actually it’s an short instructions of digital transistors in hardware chips.

But change values on the fly is also impossible, as after os load, the drivers are using those ways to operate. So possibly that’s why drivers are patched.

Chipset also as cpu has its own config puns (balls)



About muxes: I found zbook g2 schematic and it also connected igpu directly to edp display. When I was using m2000m on my laptop I have a problem with edp, it won’t work on OS X. My suggestion is Optimus related. I tried all patches to make it work, but non of method worked. The edp screen remains with verbose info at the moment before the graphics driver are start. But amd is using different way, it called Switchable Graphics. As I found info about this is simply power on and off device. As mxm pci x16 are connected directly to cpu, maybe there is internal mux and transcoder to edp signal. Or other way is signal goes to cpu, then to chipset and after backward. If we have a tool to measure pci traffic, we could understand what is happening. I didn’t find any info about how to power off igpu or make it sleep, also I didn’t find any info about interface used by igpu... so there is my thoughts...


Could you share this Polaris xml software?
 
Joined
Jul 21, 2011
Messages
279
Motherboard
Zbook G5 17"
CPU
i7
Graphics
AMD WX-4170
Mac
  1. MacBook Pro
  2. Mac mini
  3. Mac Pro
Could you share this Polaris xml software?

It may be different on G3, but on G5 Bios, whenever a hardware change is detected (more RAM, change in nvme or mxm) the Bios does this weird setup where the fans spin up to max and it cycles OFF/ON a couple of times.
I have a theory that it may be decrypting the Bios and storing a working Bios with the new config in the flash ROM or something.

Then also when you change the graphics config, it does a similar, but less extensive config, so I believe that the Bios could be setting the controllers in a particular state that can't be changed on the fly. (maybe writing to their respective ROMS)

I find this Bios is very glitchy, and sometimes you have to reset to defaults, or reset the EC controller, or take out an NVME drive and then go through a reboot, then put it back so it does it's thing, then everything works as expected.

It is definitely a complicated box, and has many unknown variables and trying to understand what is happening based on limited information is guesswork at best.

I like the fact that I now have 2 working Catalina ROMS for the WX-4170, and 4 Mojave ROMS, so hopefully using that xml polaris editor I can get enough info to compare , and maybe edit a ROM or patch the driver, whichever is easier.
 
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