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A Beginner's Guide to Creating a Custom USB SSDT

Hi, I created the SSDT-USB.aml file again and placed it under /EFI/CLOVER/ACPI/PATCHED but it looks like there is no effect even after restarting. I have attached the modified template file. I would be very thankful if you could look into it. Thank you

Okay.

A few problems with the addresses still ...

And also the "port count" field at the top - it should be "0a", more than likely. Address of highest port.

My suggestion is to put the ports in numerical order HS01 to HS14 and SS01 to SS10 then re-check addresses. For example HS09 = "25" ? That is very unlikely.

:)
 
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Ah Thanks.

I think i am going to keep it 100% XHC. Too lazy to go back and do port recovery again with EHC anyways.

I do also have another question though: in RehabMan's guide, he used the following code to disable EHC

Code:
//
// Disabling EHCI #1
//
    External(_SB.PCI0, DeviceObj)
    External(_SB.PCI0.LPCB, DeviceObj)
    External(_SB.PCI0.EH01, DeviceObj)
    Scope(_SB.PCI0)
    {
        // registers needed for disabling EHC#1
        Scope(EH01)
        {
            OperationRegion(PSTS, PCI_Config, 0x54, 2)
            Field(PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE, 2  // bits 2:0 are power state
            }
        }
        Scope(LPCB)
        {
            OperationRegion(RMLP, PCI_Config, 0xF0, 4)
            Field(RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1, 32, // Root Complex Base Address
            }
            // address is in bits 31:14
            OperationRegion(FDM1, SystemMemory, Add(And(RCB1,Not(Subtract(ShiftLeft(1,14),1))),0x3418), 4)
            Field(FDM1, DWordAcc, NoLock, Preserve)
            {
                ,15,    // skip first 15 bits
                FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
            }
        }
        Device(RMD1)
        {
            //Name(_ADR, 0)
            Name(_HID, "RMD10000")
            Method(_INI)
            {
                // disable EHCI#1
                // put EHCI#1 in D3hot (sleep mode)
                Store(3, ^^EH01.PSTE)
                // disable EHCI#1 PCI space
                Store(1, ^^LPCB.FDE1)
            }
        }
    }
}

Is this necessary? Do I have to do this? Can I disable EHC in BIOS instead of doing this?

Thanks!
 
Ah Thanks.

I think i am going to keep it 100% XHC. Too lazy to go back and do port recovery again with EHC anyways.

I do also have another question though: in RehabMan's guide, he used the following code to disable EHC

Code:
//
// Disabling EHCI #1
//
    External(_SB.PCI0, DeviceObj)
    External(_SB.PCI0.LPCB, DeviceObj)
    External(_SB.PCI0.EH01, DeviceObj)
    Scope(_SB.PCI0)
    {
        // registers needed for disabling EHC#1
        Scope(EH01)
        {
            OperationRegion(PSTS, PCI_Config, 0x54, 2)
            Field(PSTS, WordAcc, NoLock, Preserve)
            {
                PSTE, 2  // bits 2:0 are power state
            }
        }
        Scope(LPCB)
        {
            OperationRegion(RMLP, PCI_Config, 0xF0, 4)
            Field(RMLP, DWordAcc, NoLock, Preserve)
            {
                RCB1, 32, // Root Complex Base Address
            }
            // address is in bits 31:14
            OperationRegion(FDM1, SystemMemory, Add(And(RCB1,Not(Subtract(ShiftLeft(1,14),1))),0x3418), 4)
            Field(FDM1, DWordAcc, NoLock, Preserve)
            {
                ,15,    // skip first 15 bits
                FDE1,1, // should be bit 15 (0-based) (FD EHCI#1)
            }
        }
        Device(RMD1)
        {
            //Name(_ADR, 0)
            Name(_HID, "RMD10000")
            Method(_INI)
            {
                // disable EHCI#1
                // put EHCI#1 in D3hot (sleep mode)
                Store(3, ^^EH01.PSTE)
                // disable EHCI#1 PCI space
                Store(1, ^^LPCB.FDE1)
            }
        }
    }
}

Is this necessary? Do I have to do this? Can I disable EHC in BIOS instead of doing this?

Thanks!

No, it is not explicitly necessary. You don't even have to disable in BIOS. Just only configure the XHC controller by using the correct Device ID in the template.

By the way, questions about @RehabMan 's guide really should be asked of him, not me. He's the expert. Remember, this is only a Beginner's Guide.

:)
 
Hi Utter,
I'm redoing my ssdt following your guide and have hit a stumbling block...I think I have configured the the hs ports correctly but now I'm not sure where to go with the ss ports. I have hs 5, 6, 10(usb internal header for BT/wifi),12 (usb int. header for front panel), 13, 14. My ss ports will be 12, 13 and 14. I am unclear on what to enter for the port value and then the port count. If you don't mind having a look...thanks!
 

Attachments

  • SSDT-USB-042819.dsl
    2.2 KB · Views: 70
Hi Utter,
I'm redoing my ssdt following your guide and have hit a stumbling block...I think I have configured the the hs ports correctly but now I'm not sure where to go with the ss ports. I have hs 5, 6, 10(usb internal header for BT/wifi),12 (usb int. header for front panel), 13, 14. My ss ports will be 12, 13 and 14. I am unclear on what to enter for the port value and then the port count. If you don't mind having a look...thanks!

Hello there,

1) Chances are SS12 will be "0x1c, 0, 0, 0" as you have a full-size board, however you can easily check with IORegistryExplorer. As per the guide look to the right-hand panel and you'll see the address of SS12 etc. to confirm.

For each SS port do the same again to confirm the port address. You will see a constant difference.

2) Your "port count" will be the address of the final SS port.

3) When you are configuring USB3 physical ports (usually blue) as both HS and SS, they need to be "UsbConnector", 3,

USB2-only ports (usually black) need to be "UsbConnector", 0,

4) Remember your motherboard also features an ASMedia controller alongside the Intel one. These ports will not show up on the XHC part of the tree or be included in the 15-port limit.

:)
 
OK. I finished it and compiled with no errors. IOReg is not showing what I configured; it's showing HS 1-14 and SS01. Prior to this SSDT, it was showing HS01-14 and USR01. When you get a chance, see what I'm missing. BTW, I have noticed a change: prior to creating the SSDT, there was always a delay on my Apple BT keyboard connecting after boot, now the delay is gone, so something has changed with that port:eek:.
 

Attachments

  • SSDT-USB-aml042819.dsl
    2.7 KB · Views: 74
  • ioreg042819.ioreg
    17.8 MB · Views: 68
Is there a guide for Option 2?

Hi there.

Yes, @RehabMan 's guide I posted a link to in post #1 :thumbup:

All you would do is open up all ports with the PLRP and USBInjectAll.kext, configure each port fully, then use the "-uia" commands to exclude certain ones during boot to get down to your 15.

:)
 
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What are the USR* ports.

You can consider them "padding". They will not show in your completed SSDT.

Most port-limit removal patches increase the available ports from 15 to 26. As there are usually 14x HS ports and 10x SS ports the total is only 24. USR make up the other two because the patch actually mirrors what is embedded in the code of your PC's UEFI. That's where they originate.

I believe this was done because it was originally expected that no PC motherboard chipset would go beyond this and was set large enough to cater for all.

:)
 
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