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  1. losinka

    X299 Big Sur Support

    @CaseySJ Did I understand you correctly: you took this firmware and flashed it onto GC-Titan Ridge v1.0? And everything works fine?
  2. losinka

    X299 Big Sur Support

    I could not get a two TitanRidge v1.0 to run. One works perfectly (pcie slot-2 + pins1_3). When another card added to slot-3, or slot-4 - only TB on slot-2 still works. And I dont saw any working examples. I know about removing a device and adding another device with the right address... but it...
  3. losinka

    X299 Big Sur Support

    ioreg attached
  4. losinka

    X299 Big Sur Support

    ssdt for a tb2 & tb3 are disabled: the full ioreg is attached
  5. losinka

    X299 Big Sur Support

    Yes, I did it. I see the proper tree but don't see a TB anymore: Can you please check what's wrong? all acpi tables are attached too (from linux)
  6. losinka

    X299 Big Sur Support

    Thank you! SSDT-TB3-1.dsl - RP05, PCie_Slot-2, TB Bus-0, worked great with hotplug etc SSDT-TB3-2.dsl - PCie_Slot-3, TB Bus-1 SSDT-TB3-3.dsl - PCie_Slot-4, TB Bus-2 update: PXSX in SSDT-TB3-2 and in SSDT-TB3-3.dsl should be removed. Then UPSB and NHI are appear and TB-switch...
  7. losinka

    [SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

    @casey, may be do you have something to say to this?
  8. losinka

    X299 Big Sur Support

    My fight against three TB-cards has not yet been successful. The first card (RP05 / PCIe slot-2) works great. The problem is that the second and third cards share the port with other devices and I don't know how to describe it in the ssdt. Can somebody give me a hint? The full ioreg is attached...
  9. losinka

    [SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

    @casey & Co: the buffer 0x7b have exact 123 bytes, but other (0x17, 02d, etc) buffers always have 1 byte less. Is this ok?
  10. losinka

    X299 Big Sur Support

    djlild7hina, I know this, but ssdt need a absolute path.
  11. losinka

    X299 Big Sur Support

    About Thunderbolt. With one TB card it is easy: the path in the ssdt/ioreg is _SB_.PC00.RP05 (All is working, hotplug - too). But with a 3x TB cards (two cards are not yet reflashed) the ioreg go crazy (attached) and I don't know what the path is for a tb-1, what is for a tb-2 and what is for a...
  12. losinka

    X299 Big Sur Support

    After the BIOS update 3203 I no longer have the error 62... but the computer does not boot and stops during the boot process without any errors. It doesn't come to an apple logo. I tried: - without any TB cards - with and without SSDT-RTC0-NOAWAC.aml - with without quirk AppleXcpmExtraMsrs In...
  13. losinka

    X299- Adding multiple Titan Ridge cards (Thunderbolt 3)

    I still have error code 62. Bios 2002. Has anyone tried to use 6-pin (EATX12V3) additionally to 2x8-pin (EATX12V1 + EATX12V2)? I think there's not enough power on the PCIe with closed pins 3 and 5 on TB-card.
  14. losinka

    X299 Big Sur Support

    Ghostmac1969, the second PCIe slot is RP05
  15. losinka

    X299 Big Sur Support

    djlild7hina, your git is empty :( Where I can find a patched bios 3101 with a apple logo? For Sage/10g of course... Thanks!
  16. losinka

    [SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

    Can you please add a PCI selection? To example RP05/RP21/PEG0/PEG1/etc.
  17. losinka

    [SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

    CaseyJS, where is this guide?
  18. losinka

    [SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

    @CaseySJ: I asked here about ThunderboltConfig. Do you have something to say? Where does ThunderboltConfig come from? Thanks.
  19. losinka

    [SUCCESS] Gigabyte Designare Z390 (Thunderbolt 3) + i7-9700K + AMD RX 580

    Thank you, I'll be waiting for a guide! Other question... Do you have any news about decoding of "ThunderboltConfig"? I saw many different ThunderboltConfig's and I don't know which is the right one. All that I know - the first byte of ThunderboltConfig must be same as the second byte from...
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